VND5T050AK-E_V01 STM | Alldatasheet
Document overview
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- PDF pages: 31
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specification
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Electrical characteristics (curves)
- 3 Application information
- 3.1 GND protection network against reverse battery
- 3.1.1 Solution 1: resistor in the ground line (RGND only)
- 3.1.2 Solution 2: diode (DGND) in the ground line
- 3.2 Load dump protection
- 3.3 MCU I/Os protection
- 4 Maximum demagnetization energy (VCC = 24 V)
- 5 Package and PCB thermal data
- 5.1 PowerSSO-24 thermal data
- 6 Package information
- 6.1 PowerSSO-24 package information
- 6.2 PowerSSO-24 packing information
Features
Description Parameter Value Max. transient supply voltage VCC 58 V Operating voltage range VCC 8 to 36 V Typ. on-state resistance (per channel) RON 50 mΩ Current limitation (typ.) ILIM 34 A Off-state supply current IS 2 µA
- AEC-Q100 qualified
- General – Very low standby current – 3.0 V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – Compliant with European directive 2002/95/EC – Fault reset standby pin (FR_Stby)
- Diagnostic functions – Proportional load current sense – High current sense precision for wide range currents – Off-state openload detection – Output short to V CC detection – Overload and short to ground latch-off – Thermal shutdown latch-off – Very low current sense leakage
- Protections – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of V CC – Thermal shutdown – Electrostatic discharge protection
Applications
- All types of resistive, inductive and capacitive loads Product status link VND5T050AK-E Product summary Order code VND5T050AK-E Package PowerSSO-24 Packing Tube Order code VND5T050AKTR-E Package PowerSSO-24 Packing Tape and reel Double channel high-side driver with analog current sense for 24 V automotive applications VND5T050AK-E Datasheet DS8847 - Rev 5 - May 2022 For further information contact your local STMicroelectronics sales office.
Description
The VND5T050AK-E is a monolithic device made using STMicroelectronics VIPower technology, intended for driving resistive or inductive loads with one side connected to the ground. Active VCC pin voltage clamp protects the device against low energy spikes. The device integrates an analog current sense, which delivers a current proportional to the load current. Fault conditions such as overload, overtemperature, or short to VCC are reported via the current sense pin. Output current limitation protects the device in overload conditions. The device latches off in case of overload or thermal shutdown. The device is reset by a low level pass on the fault reset standby pin. A permanent low level on the inputs and on the fault reset standby pins disables all outputs and sets the device in standby mode. VND5T050AK-E DS8847 - Rev 5 page 2/31
1 Block diagram and pin description
Figure 1. Block diagram Table 1. Pin function IN1, 2 Voltage controlled input pins with hysteresis, CMOS compatible. They control output switch state. CS1, 2 Analog current sense pins, they deliver a current proportional to the load current. needed to reset the channel. The device enters in standby mode if all inputs and the FR_Stby pin are low.
Figure 2. Configuration diagram PowerSSO-24 (top view) Table 2. Suggested connections for unused and not connected pins
2 Electrical specification
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
extended periods may affect device reliability. Table 3. Absolute maximum ratings
2.2 Thermal data
Table 4. Thermal data
2.3 Electrical characteristics
8 V < VCC < 36 V, -40 °C < TJ < 150 °C, unless otherwise specified. Table 5. Power section
- Power MOSFET leakage included.
Table 6. Switching (VCC = 24 V, TJ = 25 °C) Table 7. Logic inputs
Electrical characteristics
Figure 4. treset definition Figure 5. tstby definition Table 8. Protections and diagnostics
5 V < VCC < 36 V 46
Table 9. Current sense (8 V < VCC < 36 V)
Figure 12. Device behavior in overload condition Table 11. Truth table
Table 12. Electrical transient requirements (part 1)
- The above test levels must be considered referred to V CC = 24.5 V except for pulse 5b.
- Valid in case of external load dump clamp: 58 V maximum referred to ground.
Table 13. Electrical transient requirements (part 2)
1 C C
4 C C
- In order to guarantee the ISO transient classes a minimum 10 kΩ protection resistors are needed on logic pins.
- Without capacitor between V CC and GND.
- With 10 nF between V CC and GND.
- External load dump clamp, 58 V maximum, referred to ground.
Table 14. Electrical transient requirements (part 3) C All functions of the device are performed as designed after exposure to disturbance. be returned to proper operation without replacing the device.
2.4 Electrical characteristics (curves)
Figure 13. Off-state output current Figure 14. High level input current Figure 15. Input clamp voltage Figure 16. Low level input voltage Figure 17. High level input voltage Figure 18. Input hysteresis voltage
3 Application information
Figure 24. Application schematic
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (RGND only)
This solution can be used with any load type. The following is an indication on how to dimension the RGND resistor. devices are ON in the case of several high side drivers sharing the same RGND. then ST suggests solution 2 is used (see below).
Application information
3.1.2 Solution 2: diode (DGND) in the ground line
A resistor (RGND = 4.7 kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (≈600 mV) in the input threshold and in the status output values, if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2 2004 (E) Table 12, Table 13 and Table 14.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient is present on the VCC line, the control pins are pulled negative. ST suggests that a resistor (Rprot) has to be inserted in line to prevent the microcontroller I/Os pins from latching-up. The value of these resistors is a compromise between the leakage current of the microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os. Equation: Rprot range calculation -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax Calculation example: For VCCpeak = -600 V and Ilatchup ≥ 20 mA; VOHμC ≥ 4.5 V 30 kΩ ≤ Rprot ≤ 180 kΩ. Recommended value: Rprot = 60 kΩ. VND5T050AK-E Load dump protection DS8847 - Rev 5 page 18/31
4 Maximum demagnetization energy (VCC = 24 V)
Figure 25. Maximum turn off current versus inductance demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
5 Package and PCB thermal data
5.1 PowerSSO-24 thermal data
Figure 26. PowerSSO-24 PCB Figure 27. RthJA vs PCB copper area in open box free air condition (one channel ON)
Table 15. Thermal parameters
6 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
6.1 PowerSSO-24 package information
Figure 30. PowerSSO-24 package dimensions
Package information
Table 16. PowerSSO-24 mechanical data Table 17. PowerSSO-24 tolerance of form and position
eee 0.10 fff 0.20 ggg 0.15 VND5T050AK-E PowerSSO-24 package information DS8847 - Rev 5 page 25/31
6.2 PowerSSO-24 packing information
Figure 31. PowerSSO-24 tube shipment (no suffix) Figure 32. PowerSSO-24 tape and reel shipment (suffix “TR”)
Revision history
Table 18. Document revision history 07-Feb-2012 1 Initial release. Updated Table 2: Suggested connections for unused and not connected pins. 18-Sep-2013 3 Updated Disclaimer. Updated Table 5. Power section. Updated Section 6.1 PowerSSO-24 package information.
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