VND5E050J-E_09 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 40
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Waveforms
- 2.5 Electrical characteristics curves
- 3 Application information
- 3.1 GND protection network against reverse battery
- 3.1.1 Solution 1: resistor in the ground line (RGND only)
- 3.1.2 Solution 2: diode (DGND) in the ground line
- 3.2 Load dump protection
- 3.3 MCU I/Os protection
- 3.4 Open-load detection in off-state
- 4 Package and PCB thermal data
- 4.1 PowerSSO-12 thermal data
- 4.2 PowerSSO-24 thermal data
- 5 Package and packing information
- 5.1 ECOPACK ® packages
- 5.2 PowerSSO-12 package information
- 5.3 PowerSSO-24 package information
- 5.4 PowerSSO-12 packing information
- 5.5 PowerSSO-24 packing information
- 6 Order codes
- 7 Revision history
Features
■ General – Inrush current active management by power limitation – Very low standby current – 3.0V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromag netic susceptibility – In compliance with the 2002/95/EC european directive ■ Diagnostic functions – Open Drain status output – On-state open-load detection – Off-state open-load detection – Output short to Vcc detection – Overload and short to ground (power limitation) indication – Thermal shutdown indication ■ Protections – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of V CC – Over temperature shutdown with auto restart (thermal shutdown) – Reverse battery protected (see Figure 32) – Electrostatic discharge protection
Applications
■ All types of resistive, inductive and capacitive loads
Description
The VND5E050J-E and VND5E050K-E are double channel high-side drivers manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-12 and PowerSSO-24 packages. The VND5E050J-E and VND5E050K-E are designed to drive automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS-compatible interface with any microcontroller. The devices integrate advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over temperature shut-off with auto-restart and over-voltage active clamp. A dedicated active low digital status pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground, over temperature indication, short-circuit to V CC diagnosis and on & off-state open-load detection. The diagnostic feedback of the whole device can be disabled by pulling the STAT_DIS pin up, thus allowing wired-ORing with other similar devices. Max supply voltage V CC 41V Operating voltage range V CC 4.5 to 28V Max On-State resistance (per ch.) RON 50 mΩ Current limitation (typ) I LIMH 27 A Off-state supply current I S 2 µA(1) 1. Typical value with all loads connected. PowerSSO-24 PowerSSO-12
Table 7. Status pin (V
1 Block diagram and pin description
Figure 1. Block diagram Table 1. Pin function STATUSn Open drain digital diagnostic pin. STAT_DIS Active high CMOS compatible pin, to disable the STATUS pin.
Figure 2. Configurati on diagram (top view) Table 2. Suggested connections for unused and not connected pins
2 Electrical specifications
Figure 3. Current and voltage conventions Note: V Fn = VOUTn - VCC during reverse battery condition.
2.1 Absolute maximum ratings
and other relevant quality document. Table 3. Absolute maximum ratings
2.2 Thermal data
Table 3. Absolute maximum ratings (continued) Table 4. Thermal data
2.3 Electrical characteristics
Table 5. Power section
- PowerMOS leakage included.
Table 6. Switching (V CC =1 3 V ; Tj = 25°C)
Table 7. Status pin (V SD=0V) Table 8. Protections (1)
- To ensure long term reliability under heavy overload or short circuit conditions, protection and related
abnormal conditions, this software must limit the duration and number of activation cycles. Table 9. Openload detection (8V<V CC<18V)
Table 10. Logic input Table 9. Openload detection (8V<V CC<18V) (continued)
Figure 6. Switching characteristics Table 11. Truth table
- If the V CSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
- The STATUS pin is low with a delay equal to t DSTKON after INPUT falling edge.
- The STATUS pin becomes hi gh with a delay equal to tPOL after INPUT falling edge.
Table 12. Electrical transient requirements (part 1/3)
- Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13. Electrical transient requirements (part 2/3)
- The above test levels must be considered referred to V CC = 13.5V except for pulse 5b.
- Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14. Electrical transient requirements (part 3/3) C All functions of the device are performed as designed after exposure to disturbance. disturbance and cannot be returned to proper operation without replacing the device.
2.4 Waveforms
Figure 7. Normal operation Figure 8. Undervoltage shutdown
2.5 Electrical char acteristics curves
Figure 15. Off-state output current Figure 16. High level input current Figure 17. Input clamp voltage Figure 18. Input high level Figure 19. Input low level Figure 20. Low level STAT_DIS current
3 Application information
Figure 32. Application schematic Note: Channel 2 has the same internal circuit as channel 1.
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resist or in the ground line (RGND only)
This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. maximum rating section of the device datasheet. maximum on-state currents of the different devices. high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2 Solution 2: diode (D GND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (≈600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC µand the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 180kΩ. Recommended values: Rprot =10kΩ.
3.4 Open-load detecti on in off-state
- no false open-load indication when load is connected: in this case we have to avoid
VOUT=(VPU/(RL+RPU))RL<VOlmin.
- no misdetection when load is di sconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU<(VPU–VOLmax)/IL(off2). Figure 33. Open-load detection in off-state
Figure 34. Maximum turn-off current versus inductance (for each channel) Note: Values are generated with R L =0 Ω. must not exceed the temperature specified above for curves A and B.
4 Package and PCB thermal data
4.1 PowerSSO-12 thermal data
Figure 35. PowerSSO-12 PC board Copper areas: from minimum pad lay-out to 8cm2). Figure 36. R thj-amb Vs. PCB copper area in open box free air condition (one channel
Table 15. PowerSSO-12 thermal parameters
4.2 PowerSSO-24 thermal data
Figure 39. PowerSSO-24 PC board Figure 40. R thj-amb Vs. PCB copper area in open box free air condition (one channel
Table 16. PowerSSO-24 thermal parameters
5 Package and packing information
5.1 ECOPACK ® packages
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
5.2 PowerSSO-12 pa ckage information
Figure 43. PowerSSO-12 package dimensions
Table 17. PowerSSO-12 mechanical data
5.3 PowerSSO-24 pa ckage information
Figure 44. PowerSSO-24 package dimensions
Table 18. PowerSSO-24™ mechanical data
5.4 PowerSSO-12 packing information
Figure 45. PowerSSO-12 tube shipment (no suffix) Figure 46. PowerSSO-12 tape and reel shipment (suffix “TR”)
5.5 PowerSSO-24 packing information
Figure 47. PowerSS0-24 tube shipment (no suffix) Figure 48. PowerSSO-24 tape and reel shipment (suffix “TR”)
6 Order codes
Table 19. Device summary
7 Revision history
Table 20. Document revision history 04-Feb-2008 1 Initial release. Updated Figure 44: PowerSSO-24 package dimensions.