VND5025BK-E STM | Alldatasheet
Document overview
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- PDF pages: 32
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specification
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Electrical characteristics curves
- 3 Application information
- 3.1 GND protection network against reverse battery
- 3.1.1 Solution 1: resistor in the ground line (RGND only)
- 3.1.2 Solution 2: diode (DGND) in the ground line
- 3.2 Load dump protection
- 3.3 MCU I/Os protection
- 4 Package and thermal data
- 4.1 PowerSSO-24™ thermal data
- 5 Package and packing information
- 5.1 ECOPACK ® packages
- 5.2 Package mechanical data
- 5.3 Packing information
- 6 Revision history
Features
■ Features – In-rush current active management by power limitation – Very low standby current – 3.0 V CMOS compatible input – Optimized electromagnetic emission – Very low electromag netic susceptibility – In compliance with the 2002/95/EC European directive – Two classes with different ‘K@3A’ ranges – Package: ECOPACK ® ■ Diagnostic functions – 3 A current sense precision of +/-8% – Proportional load current sense – High current sense precision for wide range currents – Current sense disable – Thermal shutdown indication – Very low current sense leakage ■ Protection – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self-limiting of fast thermal transients – Protection against loss of ground and loss of V CC – Thermal shutdown – Reverse battery protection – Electrostatic discharge protection
Description
The VND5025BK-E is a monolithic device made using STMicroelectronics™ VIPower™ M0-5 technology, intended for driving resistive or inductive loads with one side connected to ground, and suitable for driving LEDs. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears. Max transient supply voltage V CC 41 V Operating voltage range V CC 4.5 to 36 V Max on-state resistance (per ch.) R ON 25 mΩ Current limitation (typ) I LIMH 60 A Off-state supply current I S 2µ A(1) 1. Typical value with all loads connected. Table 1. Device summary
Table 7. Switching (V
1 Block diagram and pin description
Figure 1. Block diagram Table 2. Pin functions CS_DIS Active high CMOS compatible pin to disable the current sense pin.
Figure 2. Configurati on diagram (top view) Table 3. Suggested connections for unused and not connected pins
2 Electrical specification
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
and other relevant quality document. Note: VFn = VOUTn - VCC during reverse battery condition. Table 4. Absolute maximum ratings
2.2 Thermal data
- See Section 3.4 for details.
Table 4. Absolute maximum ratings (continued) Table 5. Thermal data
2.3 Electrical characteristics
8V<V CC <3 6V ; - 4 0° C<Tj < 150 °C, unless otherwise specified. Table 6. Power section
- PowerMOS leakage included.
Table 7. Switching (V CC =1 3 V ; Tj =2 5° C )
Table 8. Logic input Table 9. Protection and diagnostics (1)
- To ensure long term reliability under heavy overload or short circuit conditions, protection and related
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 10. Current sense (8 V < V CC <1 6V )
Figure 4. Current sense delay characteristics
- Parameter guaranteed by design; it is not tested.
- Current sense ratio drift is the deviation of factor K for a given device (measured over the range -40 °C to
150 °C and 8 V < VCC < 16 V) from its value measured at Tj =2 5° C , VCC =1 3V . Table 10. Current sense (8 V < V CC < 16 V) (continued)
Figure 5. Delay response time between rising edge of output current and rising
Figure 6. I OUT/ISENSE vs IOUT Note: See Table 10 for details.
Figure 7. Maximum current sense ratio drift vs load current Table 11. Truth table
- If the V CSD is high, the SENSE output is at a high impedance; its potential depends on leakage currents
Note: Parameter guaranteed by design; it is not tested.
Table 12. Electrical transient requirements (part 1/3)
- The above test levels must be considered referred to V CC = 13.5V except for pulse 5b.
- Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13. Electrical transient requirements (part 2/3)
- Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14. Electrical transient requirements (part 3/3) C All functions of the device performed as designed after exposure to disturbance.
Figure 10. Waveforms
2.4 Electrical char acteristics curves
Figure 11. Off-state output current Figure 12. High level input current Figure 13. Input clamp voltage Figure 14. Input high level Figure 15. Input low level Figure 16. Input hysteresis voltage
3 Application information
Figure 26. Application schematic
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (R GND only)
This first solution can be used with any type of load. maximum rating section of the device datasheet. state currents of the different devices. Note: Channel 2 has the same internal circuit as channel 1.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor, then ST suggests to utilize the following Solution 2.
3.1.2 Solution 2: diode (D GND) in the ground line
If the device drives an inductive load, insert a resistor (RGND =1k Ω) in parallel to DGND. This small signal diode can be safely shared among several different HSDs. Also in this case, the presence of the ground network produces a shift (≈600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2:2004E table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert an in-line resistor (Rprot) to prevent the microcontroller I/O pins from latch-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak = -100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V 5k Ω ≤ Rprot ≤ 65 kΩ Recommended values: Rprot =1 0k Ω, CEXT =1 0n F . Obsolete Product(s) - Obsolete Product(s)
Figure 27. Maximum turn-off current versus inductance (for each channel) pulse must not exceed the temperature specified above for curves A and B.
4 Package and thermal data
4.1 PowerSSO-24™ thermal data
Figure 28. PowerSSO-24™ PC board Figure 29. R thj-amb vs PCB copper area in open box free air condition (one channel thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), Copper areas: from minimum pad layout to 8 cm2).
Table 15. Thermal parameters
5 Package and packing information
5.1 ECOPACK ® packages
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
5.2 Package mechanical data
Figure 32. PowerSSO-24™ package dimensions
Table 16. PowerSSO-24™ mechanical data
5.3 Packing information
Figure 33. PowerSSO-24™ tube shipment (no suffix) Figure 34. PowerSSO-24™ tape and reel shipment (suffix “TR”)
6 Revision history
Table 17. Document revision history Updated Figure 32: PowerSSO-24™ package dimensions . Updated Table 1: Device summary. – Updated K2 values and test conditions.