VND1NV04_V01 STM | Alldatasheet
Document overview
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- PDF pages: 33
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Electrical characteristics curves
- 3 Protection features
- 4 Package and PCB thermal data
- 4.1 DPAK thermal data
- 4.2 SOT-223 thermal data
- 4.3 SO-8 thermal data
- 5 Package and packing information
- 5.1 DPAK mechanical data
- 5.2 SOT-223 mechanical data
- 5.3 SO8 mechanical data
- 5.4 DPAK packing information
- 5.5 SOT-223 packing information
- 5.6 SO8 packing information
- 6 Revision history
Features
■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET
Description
The VND1NV04, VNN1NV04, VNS1NV04 are monolithic devices designed in STMicroelectronics ® VIPower® M0-3 Technology, intended for replacement of standard Power MOSFETs from DC up to 50 KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. Parameter Symbol Value Max on-state resistance (per ch.) R ON 250 mΩ Current limitation (typ) I LIMH 1.7 A Drain-source clamp voltage V CLAMP 40 V TO-252 (DPAK) SOT-223 SO-8 Table 1. Device summary
1 Block diagram and pin description
Figure 1. Block diagram Figure 2. Configuration diagram (top view)
- For the pins configuration related to SOT-223 and DPAK see outline at page 1.
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
conditions above those indicated in the operating sections of this specification is not implied. Table 2. Absolute maximum ratings
2.2 Thermal data
2.3 Electrical characteristics
Table 3. Thermal data
- When mounted on a standard single-sided FR4 board with 50 mm 2 of Cu (at least 35 μm thick) connected
Table 4. Electrical characteristics
- Pulsed: pulse duration = 300 µs, duty cycle 1.5 %
Table 4. Electrical characteristics (continued)
Figure 4. Switching time test circuit for resistive load
2.4 Electrical characteristics curves
Figure 9. Source-drain diode forward Figure 10. Static drain-source on resistance Figure 11. Derating curve Figure 12. Static drain-source on resistance Figure 13. Static drain-source on resistance Figure 14. Transconductance
Protection features VND1NV04 - VNN1NV04 - VNS1NV04 16/33 Doc ID 7381 Rev 4
3 Protection features
During normal operation, the input pin is electrically connected to the gate of the internal Power MOSFET through a low impedance path. The device behaves like a standard Power MOSFET and it can be used as a switch from DC up to 50 KHz. The only difference from the user’s point of view is that a small DC current IISS (typ. 100 µA) flows into the input pin in order to supply the internal circuitry. The device integrates:
- Overvoltage clamp protection gives – Internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.
- Linear current limiter circuit – Limits the drain current I D to Ilim whatever the input pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold T jsh.
- Overtemperature and short circuit protection – These are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout ranges is from 150 to 190 °C, a typical value is 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature.
- Status feedback – In the case of an overtemperature fault condition (T j > Tjsh), the device tries to sink a diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current I gf, the input pin falls to 0 V. This does not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current I ISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL logic circuit.
4 Package and PCB thermal data
4.1 DPAK thermal data
Figure 30. DPAK PC board
- Layout condition of R th and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from minimum pad layout to 16 cm 2). Figure 31. DPAK R thj-amb vs. PCB copper area in open box free air condition
Table 5. DPAK thermal parameter
4.2 SOT-223 thermal data
Figure 34. SOT-223 PC board
- Layout condition of R th and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from minimum pad layout to 0.8 cm 2).
Figure 37. SOT-223 thermal fitting model of a single channel Table 6. SOT-223 thermal parameter
4.3 SO-8 thermal data
Figure 38. SO-8 PC board
- Layout condition of R th and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from minimum pad layout to 2 cm 2). Figure 39. SO-8 R thj-amb vs. PCB copper area in open box free air condition
Table 7. SO-8 thermal parameter
5 Package and packing information
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
5.1 DPAK mechanical data
Figure 42. DPAK package dimensions
Table 8. DPAK mechanical data
5.2 SOT-223 mechanical data
Figure 43. SOT-223 mechanical data & package outline
5.3 SO8 mechanical data
Table 9. SO-8 mechanical data
Figure 44. SO-8 package dimension
- Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
- Dimension “E1” does not include interlead flash or pr otrusions. Interlead flash or protrusions shall not
Table 9. SO-8 mechanical data (continued)
5.4 DPAK packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Device summary ). DPAK FOOTPRINT TUBE SHIPMENT (no suffix) A C B All dimensions are in mm. Base Q.ty 75 Bulk Q.ty 3000 Tube length (± 0.5) 532 A 6 B 21.3 C (± 0.1) 0.6 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (+ 2 / -0) 16.4 N (min) 60 T (max) 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 All dimensions are in mm. Tape width W 16 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 8 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 7.5 Compartment Depth K (max) 6.5 Hole Spacing P1 (± 0.1) 2 Top cover tape End Start No componentsNo components Components 500mm min 500mm minEmpty components pockets saled with cover tape. User direction of feed
5.5 SOT-223 packing information
Figure 45. SOT-223 tape and reel shipment (suffix “TR”)
5.6 SO8 packing information
Figure 46. SO-8 tube shipment (no suffix) Figure 47. SO-8 tape and reel shipment (suffix “TR”)
6 Revision history
Table 10. Document revision history 01-Dic-2011 3 Upadate Table 1: Device summary. Update the entire document using the new coorporate template. 20-Sep-2013 4 Updated Disclaimer.