Single channel high-side solid-state relay
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 34
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Electrical characteristics curves
- 3 Application information
- 3.1 GND protection network against reverse battery
- 3.1.1 Solution 1: resistor in the ground line (RGND only)
- 3.1.2 Solution 2: diode (DGND) in the ground line
- 3.2 Load dump protection
- 3.3 MCU I/Os protection
- 4 Package and PCB thermal data
- 4.1 SO-16L thermal data
- 4.2 P 2PAK thermal data
- 5 Package and packing information
- 5.1 ECOPACK ® packages
- 5.2 PENTAWATT mechanical data
- 5.3 P 2PAK mechanical data
- 5.4 SO-16L packing information
- 5.5 PENTAWATT packing information
- 5.6 P 2PAK packing information
- 6 Revision history
Features
■ CMOS compatible input ■ Proportional load current sense ■ Shorted load protection ■ Under-voltage and over-voltage shutdown ■ Over-voltage clamp ■ Thermal shutdown ■ Current limitation ■ Protection against loss of ground and loss of VCC ■ Very low standby power dissipation ■ Reverse battery protected (see Application schematic )
Description
The VN920 is a monolithic device designed in STMicroelectronics VIPower M0-3 technology. The VN920 is intended for driving any type of load with one side connected to ground. The active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against over-load. The device integrates an analog current sense output which delivers a current proportional to the load current. The device automatically turns off in the case where the ground pin becomes disconnected. Type R DS(on) IOUT VCC VN920 VN920-B5 VN920SO 16 mΩ 30 A 36 V PENTAWATT P2PAK SO-16L Table 1. Device summary
Table 6. Switching (V Table 17. P
1 Block diagram and pin description
Figure 1. Block diagram Figure 2. Configuration diagram (top view) Table 2. Suggested connections for unused and not connected pins
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
program and other relevant quality document. Table 3. Absolute maximum ratings
2.2 Thermal data
Table 3. Absolute maximum ratings (continued) Table 4. Thermal data
- When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins.
- When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick).
- When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick) connected to all VCC pins.
- When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick).
2.3 Electrical characteristics
Note: V CLAMP and VOV are correlated. Typical difference is 5V. Table 5. Power Table 6. Switching (V CC=13V)
Table 7. Logic inputs Table 8. Current sense (9V ≤ VCC ≤ 16V)
- Current sense signal delay after positive input slope.
Table 9. V CC output diode Table 10. Protections (1)
- To ensure long term reliability under heavy over-load or short circuit conditions, protection and related
abnormal conditions this software must limit the duration and number of activation cycles. Table 8. Current sense (9V ≤ VCC ≤ 16V) (continued)
Table 11. Truth table Table 12. Electrical transient requirements
- All functions of the device are performed as designed after exposure to disturbance.
- One or more functions of the device is not perfor med as designed after exposure and cannot be returned to
proper operation without replacing the device.
Figure 6. Waveforms
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High-level input current Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope Figure 11. Over-voltage shutdown Figure 12. Turn-off voltage slope
3 Application information
Figure 19. Application schematic
3.1 GND protection networ k against reverse battery
3.1.1 Solution 1: resist or in the ground line (RGND only)
This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. maximum rating section of the device datasheet. maximum on-state currents of the different devices. high-side drivers sharing the same RGND. the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2 Solution 2: diode (D GND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (≈ 600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended values: Rprot =10kΩ . Obsolete Product(s) - Obsolete Product(s)
Figure 20. P2PAK maximum turn-off current versus inductance
Figure 21. SO-16L maximum turn-off current versus inductance
4 Package and PCB thermal data
4.1 SO-16L thermal data
Figure 22. SO-16L PC board thickness = 2mm, Cu thickness = 35µm, Copper areas: 0.5cm2, 6cm2). Figure 23. SO-16L R thj-amb Vs PCB copper area in open box free air condition
4.2 P 2PAK thermal data
Figure 26. P 2PAK PC board thickness = 2 mm, Cu thickness = 35µm , Copper areas: 0.97cm2, 8cm2). Table 13. SO-16L thermal parameters
Figure 29. Thermal fitting model of a single channel HSD in P 2PAK Table 14. P 2PAK thermal parameter
5 Package and packing information
5.1 ECOPACK ® packages
specifications, grade definitions and product status are available at: www.st.com. Figure 30. SO-16L package dimensions Table 15. SO-16L mechanical data
5.2 PENTAWATT mechanical data
Figure 31. PENTAWATT package dimensions Table 15. SO-16L mechanical data (continued)
Table 16. PENTAWATT mechanical data
5.3 P 2PAK mechanical data
Figure 32. P 2PAK package dimensions
Table 17. P 2PAK mechanical data
5.4 SO-16L packing information
Figure 33. SO-16L tube shipment (no suffix) Figure 34. SO-16L tape and reel shipment (suffix “TR”)
5.5 PENTAWATT packing information
Figure 35. PENTAWATT tube shipment (no suffix)
5.6 P 2PAK packing information
Figure 36. P 2PAK tube shipment (no suffix)
Figure 37. P 2PAK tape and reel (suffix “13TR”)
6 Revision history
Table 18. Document revision history 22-Jun-2004 1 Initial release. Current and voltage convention update (page 2). and n.c. pins insertion (page 2). 6cm2 Cu condition insertion in thermal data table (page 3). VCC - output diode section update (page 5). Protections note insertion (page 5). Revision history table insertion (page 24). Disclaimers update (page 25). 03-May-2006 4 Suggested connections for unused and n.c.pins? correction (page 2). Document reformatted and restructured. Added content, list of figures and tables. 24-Sep-2013 6 Updated Disclaimer.