VN751PT.fm
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 23
Technical content
Datasheet sections
- 1 Block diagram
- 2 Pin connection
- 3 Maximum ratings
- 4 Electrical characteristics
- 5 Test circuits
- 6 Switching time waveforms and truth table
- 7 Application schematic
- 8 Reverse polarity protection
- 9 Active VDS clamp
- 10 Package information
- 10.1 PPAK package information
- 10.2 PPAK packing information
- 11 Revision history
Features
8 V to 36 V supply voltage range Up to IOUT = 2.5 A operating current RDS(on): 60 m CMOS compatible input Thermal shutdown Shorted load protection Undervoltage and overvoltage shutdown Protection against loss of ground Fast demagnetization of inductive loads Very low standby current Compliance to 61000-4-4 IEC test up to 4 kV Open drain status output
Description
The VN751PT is a monolithic device developed using STMicroelectronics' VIPower M03 technology, intended to drive any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes. Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device automatically turns off in case of ground pin disconnection. This device is especially suitable for industrial applications in conformity with IEC 61131-2 programmable controller international standard. Table 1. Device summary
1 Block diagram
Figure 1. Block diagram
2 Pin connection
Figure 2. Connection diagram (top view) Figure 3. Current and voltage conventions
3 Maximum ratings
Table 2. Absolute maximum ratings Table 3. Thermal data
- When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 m) thick connected
4 Electrical characteristics
8 V < VCC < 36 V; -40 °C < TJ < 125 °C; unless otherwise specified. Table 4. Power Table 5. Switching (VCC = 24 V) Table 6. Input pin
Table 7. Status pin Table 8. Protection
5 Test circuits
Figure 4. Peak short-circuit current Figure 5. Avalanche energy test circuit
6 Switching time waveforms and truth table
Figure 6. Switching time waveforms Table 9. Truth table
Figure 7. Waveforms
7 Application schematic
Figure 8. Application schematic
8 Reverse polarity protection
A schematic solution to protect the IC against a reverse polarity condition is proposed. maximum rating section of the device datasheet. This resistor can be shared by several different ICs. Figure 9. Reverse polarity protection
9 Active VDS clamp
Active clamp is also known as fast demagnetization of inductive loads or fast current decay. When a high-side driver turns off an inductance, an undervoltage is detected on output. dissipated. The energy is dissipated both in IC internal switch and in load resistance. Figure 10. Active clamp equivalent principle schematic
Figure 11. Fast demagnetization waveforms The demagnetization of inductive load causes a huge electrical and thermal stress to the IC. demagnetization is inhibited.
Figure 12. Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 °C
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
10.1 PPAK package information
Figure 13. PPAK package outline(1), (2), (3), (4), (5)
- Burrs larger than 0.25 mm are not allowed on the upper surface of the dissipater (FRONT). On the lower
surface (REAR) the maximum allowed is: 0.05 mm.
- The side of the dissipater to be connected to the external dissipater must be flat within 30 micron.
- The leads size is comprehensive of the th ickness of the leads finishing material.
- Package outline exclusive of any mold flashes dimensions.
- Package outline exclusive of metal burrs dimensions.
- Max. resin gate protrusion: 0.5 mm.
- Max. resin protrusion: 0.25 mm.
Table 10. PPAK package mechanical data
10.2 PPAK packing information
Figure 14. PPAK tape outline
Figure 15. PPAK reel outline Table 11. PPAK tape and reel mechanical data Symbol Min. Max. Symbol Min. Max.
Table 12. Document revision history 07-Mar-2006 1 Initial release. 10-Jul-2006 3 Updated V CC value table 1, Ilim min. value table 7. 12-Mar-2007 4 Typo in table 4, updated Ptot value table 1. 15-May-2007 5 Typo in table 1, VESD. 18-Sep-2007 6 Added I STAT value in table 1. 08-Jul-2008 7 Added section 7. 30-Nov-2009 8 Updated cover page and section 6. 12-Jul-2016 9 Updated Table 4: “Power”. Updated Section : Features on page 1. Updated Table 2 on page 7 (updated EAS parameter and value). Updated Figure 8 on page 13 (removed output values). Added notes below Figure 13 on page 18. Minor modifications throughout document.