High-side driver

Document overview

  • Manufacturer or author: STMICROELECTRONICS
  • PDF pages: 38

Technical content

Datasheet sections

  • 1 Block diagram and pin description
  • 2 Electrical specifications
  • 2.1 Absolute maximum ratings
  • 2.2 Thermal data
  • 2.3 Electrical characteristics
  • 2.4 Electrical characteristics curves
  • 2.5 GND protection network against reverse battery
  • 2.5.1 Solution 1: resistor in the ground line (RGND only)
  • 2.5.2 Solution 2: diode (DGND) in the ground line
  • 2.6 Load dump protection
  • 2.7 Microcontroller I/Os protection
  • 2.8 Open-load detection in off-state
  • 3 Package and PCB thermal data
  • 3.1 P 2PAK thermal data
  • 3.2 PPAK thermal data
  • 4 Package and packing information
  • 4.1 ECOPACK ® packages
  • 4.2 PENTAWATT mechanical data
  • 4.2.1 PENTAWATT (in-line) mechanical data
  • 4.3 P 2PAK mechanical data
  • 4.4 PPAK mechanical data
  • 4.5 PENTAWATT packing information
  • 4.6 P 2PAK packing information
  • 4.7 PPAK packing information
  • 5 Revision history

Features

■ ECOPACK®: lead free and RoHS compliant ■ Automotive Grade: compliance with AEC guidelines ■ CMOS compatible input ■ On-state open-load detection ■ Off-state open-load detection ■ Shorted load protection ■ Undervoltage and overvoltage shutdown ■ Protection against loss of ground ■ Very low standby current ■ Reverse battery protection

Description

The VN750-E is a monolithic device designed in STMicroelectronics ® VIPower® M0-3 technology intended for driving any kind of load with one side connected to ground. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart help protect the device against overload. The device detects open load condition in on-state and off-state. Output shorted to V CC is detected in the off-state. Device automatically turns off in case of ground pin disconnection. Type R DS(on) IOUT VCC VN750-E VN750PT-E VN750B5-E VN750-12-E 60 mΩ 6 A 36 V 3(17$:$77 LQOLQH *$3*5, 33$. *$3*5, 3(17$:$77 *$3*5, 33$. *$3*5, Table 1. Device summary

Table 7. Electrical transient requirements on V Table 14. P

1 Block diagram and pin description

Figure 1. Block diagram Figure 2. Configuration diagram (top view) Table 2. Suggested connections for unused and not connected pins

2 Electrical specifications

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratings

program and other relevant quality documents. Table 3. Absolute maximum ratings

2.2 Thermal data

2.3 Electrical characteristics

Table 3. Absolute maximum ratings (continued) Table 4. Thermal data

  1. When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35µm thick). Horizontal

mounting and no artificial air flow.

  1. When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35µm thick). Horizontal

mounting and no artificial air flow. Table 5. Electrical characteristics

Table 5. Electrical characteristics (continued)

Figure 4. Status timings

  1. To ensure long term reliability under heavy overload or shor t circuit conditions, protection and related diagnostic signals

limit the duration and number of activation cycles.

Figure 5. Switching time waveforms Table 6. Truth table Table 7. Electrical transient requirements on V CC pin (part 1/3)

Table 8. Electrical transient requirements on V CC pin (part 2/3)

1 CCCC

2 CCCC

4 CCCC

5 CEEE

Table 9. Electrical transient requirements on V CC pin (part 3/3) C All functions of the device are performed as designed after exposure to disturbance. disturbance and cannot be returned to proper operation without replacing the device. Table 7. Electrical transient requirements on V CC pin (part 1/3) (continued)

Figure 6. Waveforms

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current Figure 9. Input clamp voltage Figure 10. Status leakage current Figure 11. Status low output voltage Figure 12. Status clamp voltage

Figure 24. Application schematic

2.5 GND protection network against reverse battery

2.5.1 Solution 1: resistor in the ground line (R GND only)

This can be used with any type of load. The following is an indication on how to size the RGND resistor. maximum rating section of the device datasheet. maximum on-state currents of the different devices.

2.5.2 Solution 2: diode (D GND) in the ground line

A resistor (RGND=1 kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (≈600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network. Series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. The safest configuration for unused input and status pin is to leave them unconnected.

2.6 Load dump protection

Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

2.7 Microcontroller I/Os protection

If a ground protection network is used and negative transient are present on the V CC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with from latching-up limit of µC I/Os. CCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V 5k Ω ≤ Rprot ≤ 65 kΩ. Recommended values: Rprot =10 kΩ.

2.8 Open-load detection in off-state

Off-state open-load detection requires an external pull-up resistor (RPU) connected between output pin and a positive supply voltage (VPU) like the +5 V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open-load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL<VOlmin. 2. no misdetection when load is disconnected: in this case the V OUT has to be higher than VOLmax; this results in the following condition RPU<(VPU–VOLmax)/IL(off2).

Figure 25. Open-load detection in off-state

Figure 26. PPAK /P 2PAK maximum turn-off current versus inductance

3 Package and PCB thermal data

3.1 P 2PAK thermal data

Figure 27. P 2PAK PC board thickness = 2 mm, Cu thickness=35 µm, Copper areas: 0.97 cm 2, 8 cm2). Figure 28. P 2PAK Rthj-amb Vs. PCB copper area in open box free air condition

3.2 PPAK thermal data

Figure 31. PPAK PC board thickness = 2 mm, Cu thickness=35 µm, Copper areas: 0.44 cm 2, 8 cm2). Table 10. P 2PAK thermal parameter

Figure 34. PPAK thermal fitting model of a single channel Table 11. PPAK thermal parameter

4 Package and packing information

4.1 ECOPACK ® packages

ECOPACK® is an ST trademark.

4.2 PENTAWATT mechanical data

Figure 35. PENTAWATT package dimensions Table 12. PENTAWATT mechanical data

Table 12. PENTAWATT mechanical data (continued)

4.2.1 PENTAWATT (in-line) mechanical data

Figure 36. PENTAWATT (in-line) package dimensions Table 13. PENTAWATT (in-line) mechanical data

Table 13. PENTAWATT (in-line) mechanical data (continued)

4.3 P 2PAK mechanical data

Figure 37. P 2PAK package dimensions

Table 14. P 2PAK mechanical data

4.4 PPAK mechanical data

Figure 38. PPAK package dimensions

Table 15. PPAK mechanical data

4.5 PENTAWATT packing information

Figure 39. PENTAWATT tube shipment (no suffix)

4.6 P 2PAK packing information

Figure 40. P 2PAK tube shipment (no suffix)

Figure 41. P 2PAK tape and reel (suffix “13TR”)

4.7 PPAK packing information

Figure 42. PPAK suggested pad layout Figure 43. PPAK tube shipment (no suffix)

Figure 44. PPAK tape and reel

5 Revision history

Table 16. Document revision history 07-Oct-2004 1 Initial release. Document reformatted and restructured. Added content, list of figures and tables. Table 1, Table 3 and Table 4. Figure 2: Removed SO-8 package top view. – Added Section 4.2.1: PENTAWATT (in-line) mechanical data. 11-May-2012 6 – Update entire document following ST template. – Update Table 15 and Figure 38. 19-Sep-2013 7 Updated Disclaimer.