VN340SP-E STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Maximum ratings
  • 2 Pin connections
  • 3 Electrical characteristics
  • 4 Test circuits
  • 5 Switching time waveforms and tr uth table
  • 6 Package mechanical data
  • 7 Order code
  • 8 Revision history

Features

■ Output current : 0.7A per channel ■ Digital I/O‘s clamped at 32V minimum voltage ■ Shorted load and overtemperature protections ■ Protection against loss of ground ■ Built-in current limiter ■ Undervoltage shut-down ■ Open drain diagnostic output ■ Fast demagnetization of inductive loads ■ Conforms to IEC 61131-2

Description

The VN340SP-E is a monolithic device made using STMicroelectronics VIPower technology, intended for driving four indipendent resistive or inductive loads with one side connected to ground. Active current limitation avoids dropping the system power supply in case of shorted load. Built-in thermal shut-down protects the chip from overtemperature and short circuit. The open drain diagnostic output indicates overtemperature conditions. Each I/O is pulled down when overtemperature condition of the relative channel is verified. Type Vdemag (1) 1. Per channel. RDSon (1) Iout (1) VCC VN340SP-E VCC-55V 0.2Ω 0.7A 36V PowerSO-10TM Figure 1. Block diagram

1 Maximum ratings

Table 1. Absolute maximum rating Table 2. Thermal data Figure 4. 400 mJ

  1. When mounted using minimum recommended pad size on FR-4 board

2 Pin connections

Figure 2. Connection diagram (top view) Figure 3. Current and voltage conventions

3 Electrical characteristics

Table 3. Power section Table 4. Switching ( VCC = 24V) Table 5. Logical input Tamb = - 25°C to 85°C Figure 6.

  1. The input voltage is internally clamped at 32V minimum, it is possible to connect the input pins to an higher voltage via an

Table 6. Protection and diagnostic disconnected, the channel will switch OFF provided VCC not exceed 36V.

  1. Status determination > 100 µs after the switching edge.

4 Test circuits

Figure 4. Avalance energy test circuit Figure 5. Peak short circuit test diagram

Figure 6. I LGND test configuration

5 Switching time waveforms and truth table

Figure 7. Switching waveforms Figure 8. Switching parameter test conditions

Table 7. Truth table Figure 9. Driving circuit

6 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

Figure 10. Package dimension Table 8. PowerSO-10 Mechanical data

7 Order code

Table 9. Order code

8 Revision history

Table 10. Revision history