VN16118 VAISH | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 10
Technical content
Features
- IEEE 802.3z Gigabit Ethernet Compliant
- Supports 1.25 Gbps Using NRZ Coding over uncompensated twin-coax cable
- Fully integrated CMOS IC
- Low Power Consumption
- ESD rating >2000V (Human Body Model) or >200V (Machine Model)
- 5-Volt Input Tolerance
- Fully Compatible with HP HDMP- 1636/HDMP-1646 and Vitesse VCS7135 transceivers
- Available in both 10 mm x 10 mm and 14 mm x 14 mm LQFP Packages
Figure 1. Functional Block Diagram
125 MHz
62.5 MHz
Figure 2. Pin Configuration (Top View)
47 COM_DET
46 GND_RXT
45 RX<0>
44 RX<1>
43 RX<2>
42 VCC_RXT
41 RX<3>
40 RX<4>
39 RX<5>
38 RX<6>
37 VCC_RXT
36 RX<7>
35 RX<8>
34 RX<9>
33 GND_RXT
64 GND_TX_HS
63 VCC_TX_HS
61 DOUT-
60 VCC_TX_ECL
59 VCC_RXA
58 GND_RXA
56 GND_RX_ESD
54 DIN+
53 VCC_RX_ESD
52 DIN-
51 GND_RXF
Table 1. Pin Description Power Power and ground pairs for pad ESD structure. Power Power and ground pair for TX PLL analog circuits. Power Power and ground pair for TX digital circuits. Power Power and ground pair for digital circuits in the receiver portion. set to LOW when differential inputs are less than 50 mV. Power Power and ground pair for the clock signal of the receiver portion. comma character when detected.
1999-12-15 Page 5 MDSN-0001-00 Table1. (Continued) Name Pin# Type Description GND_RXT VCC_RXT 46, 37, Power Power and ground pairs for ESD structure. RX<9> RX<8> RX<7> RX<6> RX<5> RX<4> RX<3> RX<2> RX<1> RX<0> TTL Output Received Parallel Data Output. RX<0> is the least significant bit and is received first. When DIN ± lose input data, all RX pins will be held HIGH. COM_DET 47 TTL Output Comma detect. This pin is active HIGH. When asserted, it indicates the detection of comma character (0011111XXX). It is active only when EN_CEDT is enabled. VCC_RXF GND_RXF Power Power and ground pair for the front-end of the receiver section. DIN+ DIN- Input High-speed serial data input. Serial data input is received when EWRAP is disabled. VCC_RXESD GND_RXESD 53,55 Power Power and ground pair for ESD structure. VCC_RXA GND_RXA 57, Power Power and ground pair for analog circuits of the receiver section. VCC_TX_ECL 60 Power Power supply to line driver circuits. Ground supply is from pin 64. DOUT- DOUT+ Output High-speed serial data output. These pins are active when EWRAP is disabled and are held static at logic 1 when EWRAP is enable. VCC_TX_HS GND_TX_HS Power Power and ground pair for high-speed transmit logic in the parallel-to-serial section.
edge of the 125 MHz user-provided TX_CLK into the holding registers. the parallel-to-serial block, and is transmitted differentially to the line driver block at 1.25 Gbps. The 8b/10b encoded data is transmitted sequentially with bit 0 being sent first. based on the user-provided TX_CLK. This clock should have a ±100 ppm tolerance. mode, a static logic 1 is transmitted at the line driver (DOUT+ is HIGH and DOUT- is LOW). directed to the receive path. recovery and data re-timing. Table 2. Absolute Maximum Ratings Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. to absolute maximum rating conditions for extended periods may affect product reliability.
Table 3. Guaranteed Operating Rates Table 4. AC Electrical Characteristics
- Output Peak-to-Peak Differential Voltage specified as DOUT+ minus DOUT-
Table 5. DC Electrical Characteristics
- Measurement Conditions: Tested sending 1250 MBd PRBS 2 7-1 sequence from a serial Bit Error Rate
Tester (BERT) with DOUT ± outputs terminated with 150 Ω resistors to GND.
- Typical values are at Vcc = 3.3 volts.
Table 6. Transceiver Reference Clock Requirements Table 7. Transmitter Timing Characteristics
- The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the
Figure 4. Transmitter Latency Figure 3. Transmitter Section
1999-12-15 Page 10 MDSN-0001-00 Figure 7. Mechanical Dimensions
Ordering Information
Part Number No. of Pins Package Temperature VN16118L1 64 LQFP 0°C to +70 °C VN16118L2 64 LQFP 0°C to +70 °C D D E1 E TOP VIEW A e b c