VEMI35AA-HA3 VISHAY | Alldatasheet

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Technical content

Document Number: 81715 For technical questions, contact: EMIFilter@vishay.com www.vishay.com Rev. 1.3, 14-Sep-09 1 3-Channel EMI-Filter with ESD-Protection VEMI35AA-HA3 Vishay Semiconductors MARKING (example only) Dot = pin 1 marking YY = type code (see table below) XX = date code

FEATURES

  • Ultra compact LLP75-7A package  3-channel EMI-filter and ESD-protection  Low leakage current  Line resistance R S = 100 Ω  Typical cut off frequency f 3dB = 100 MHz  ESD-protection acc. IEC 61000-4-2 ± 30 kV contact discharge ± 30 kV air discharge e 3 - S n  Compliant to RoHS directive 2002/95/EC and in accordance to WEEE 2002/96/EC 19369 19423 1 23 65 4 21001 XX YY

ORDERING INFORMATION

DEVICE NAME ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VEMI35AA-HA3 VEMI35AA-HA3-GS08 3000 15 000 PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VEMI35AA-HA3 LLP75-7A 9C 5 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT Peak pulse current All I/O pin to pin 7; acc. IEC 61000-4-5; tp = 8/20 µs; single shot IPPM 4A ESD immunity Contact discharge acc. IEC61000-4-2; 10 pulses VESD ± 30 kVAir discharge acc. IEC61000-4-2; 10 pulses ± 30 Operating temperature Junction temperature T J - 40 to + 125 °C Storage temperature T STG - 55 to + 150 °C ** Please see document “Vishay Material Category Policy”: www.vishay.com/doc?99902

www.vishay.com For technical questions, contact: EMIFilter@vishay.com Document Number: 81715 2 Rev. 1.3, 14-Sep-09 VEMI35AA-HA3 Vishay Semiconductors 3-Channel EMI-Filter with ESD-Protection APPLICATION NOTE With the VEMI35AA-HA3 3 different signal or data lines can be filtered and clamped to ground. Due to the different clamping levels in forward and reverse direction the clamping behavior is Bi directional and As ymmetric (BiAs). The 3 independent EMI-filter are placed between pin 1 and pin 6 pin 2 and pin 5, and pin 3 and pin 4. They all are connected to a common ground pin 7 on the backside of the package. Each filter is symmetrical so that all ports (pin 1 to 6) can be used as input or output. The circuit diagram of one EMI-filter-channel shows two identical Z-diodes at the input to ground and the output to ground. These Z-diodes are characterized by the breakthrough voltage level (V BR) and the diode capacitance (C D). Below the breakthrough voltage level the Z-diodes can be considered as capacitors. Together with these capacitors and the line resistance RS between input and output the device works as a low pass filter. Low frequency signals (f < f3dB) pass the filter while high frequency signals (f > f3dB) will be shorted to ground through the diode capacitances CD. Each filter is symmetrical so that both ports can be used as input or output. 19420 19421 19424 L1IN L2IN L3IN L1OUT L2OUT L3OUT 21060 RS Out (pin 4, 5, 6) In (pin 1, 2, 3) GND (pin 7) CD CD

Document Number: 81715 For technical questions, contact: EMIFilter@vishay.com www.vishay.com Rev. 1.3, 14-Sep-09 3 VEMI35AA-HA3 3-Channel EMI-Filter with ESD-Protection Vishay Semiconductors Note Ratings at 25 °C, ambient temperature unless otherwise specified. TYPICAL CHARACTERISTICS Tamb = 25 °C, unless otherwise specified Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 Ω/150 pF) Fig. 2 - 8/20 µs Peak Pulse Current Wave Form acc. IEC 61000-4-5 ELECTRICAL CHARACTERISTICS VEMI35AA-HA3 PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Protection paths Number of ch annels which can be protected N channel - - 3 channel Reverse stand off voltage at I R = 1 µA each input to pin 2 V RWM 5--V Reverse current at V R = 5 V each input to pin 2 I R --1 µ A Reverse break down voltage Each input to pin 2 at I R = 1 mA V BR 6--V Pos. clamping voltage at IPP = 1 A applied at the input, measured at the output; acc. IEC 61000-4-5 VC-out -- 7 . 8 V at IPP = IPPM = 4 A applied at the input, measured at the output; acc. IEC 61000-4-5 VC-out --8 V Neg. clamping voltage at IPP = - 1 A applied at the input, measured at the output; acc. IEC 61000-4-5 VC-out - 1 - - V at IPP = IPPM = - 4 A applied at the input, measured at the output; acc. IEC 61000-4-5 VC-out - 1.2 - - V Input capacitance at VR = 0 V; f = 1 MHz C IN -6 0-p F at VR = 2.5 V; f = 1 MHz C IN -3 7-p F ESD-clamping voltage at ± 30 kV ESD-pulse acc. IEC 61000-4-2 V CESD -7 . 5- V Line resistance Measured between input and output; IS = 10 mA RS 90 100 110 Ω Cut-off frequency V IN = 0 V; measured in a 50 Ω system f 3dB - 100 - MHz 0 % 20 % 40 % 60 % 80 % 100 % 120 % - 10 0 10 20 30 40 50 60 70 80 90 100 Time (ns) Discharge Current IESD Rise time = 0.7 ns to 1 ns 53 % 27 % 20557 0 % 20 % 40 % 60 % 80 % 100 % 01 0 2 0 3 0 4 0 Time (µs) IPPM 20 µs to 50 % 8 µs to 100 % 20548

www.vishay.com For technical questions, contact: EMIFilter@vishay.com Document Number: 81715 4 Rev. 1.3, 14-Sep-09 VEMI35AA-HA3 Vishay Semiconductors 3-Channel EMI-Filter with ESD-Protection Fig. 3 - Typical Forward Current IF vs. Forward Voltage VF Fig. 4 - Typical Reverse Voltage VR vs. Reverse Current IR Fig. 5 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP Fig. 6 - Typical Capacitance CD vs. Reverse Voltage VR Fig. 7 - Typical Small Signal Transmission (S21) at ZO = 50 Ω 0.001 0.01 0.1 100 VF (V) IF (mA) 21086 0.01 0.1 1 10 100 1000 10 000 IR (µA) VR (V) 21087 0123456 IPP (A) VC (V) 21088 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) Input clamping voltage Output clamping voltage VC 012345 VR (V) CD (pF) 21089 f = 1 MHz - 40 - 35 - 30 - 25 - 20 - 15 - 10 - 5 1 10 100 1000 10 000 Frequency in MHz Transmission (S21) in dB VINPUT = 5 V VINPUT = 0 V Measured in a 50 Ω system 21090

Document Number: 81715 For technical questions, contact: EMIFilter@vishay.com www.vishay.com Rev. 1.3, 14-Sep-09 5 VEMI35AA-HA3 3-Channel EMI-Filter with ESD-Protection Vishay Semiconductors PACKAGE DIMENSIONS in millimeters (inches): LLP75-7A 1.05 (0.041) 0.5 (0.020) 0.95 (0.037) Heat sink 0.3 (0.012) 0.2 (0.008) 0.3 (0.012) 0.2 (0.008) 0.3 (0.012) 0.2 (0.008) 0.55 (0.022) 0.45 (0.018) 0.6 (0.024) 0.25 (0.010) 0.05 (0.002) 0 (0.000) 0.2 (0.008) 0.8 (0.031) 0.7 (0.028) 1.65 (0.065) 1.55 (0.061) 1.65 (0.065) 1.55 (0.061) Pin 1 marking 0.5 (0.020) 0.5 (0.020) 1 (0.039) 0.25 (0.010) Solder resist mask Solder pad Document no.:S8-V-3906.02-002 (4) Rev. 3 - Date: 21. March 2006 20459 Created - Date: 20. December 2004 Foot print recommendation: 1 (0.039) 1 (0.039)

Document Number: 91000 www.vishay.com Revision: 18-Jul-08 1 Disclaimer Legal Disclaimer Notice Vishay All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all li ability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permit ted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.