VCUT0714A-HD1_V01 VISHAY | Alldatasheet

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www.vishay.com Vishay Semiconductors Rev. 2.5, 04-May-2020 1 Document Number: 81801 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Bidirectional Asymmetrical (BiAs) Single Line ESD Protection Diode in LLP1006-2L MARKING (example only) Bar = pin 1 marking Y = type code (see table below) X = date code LINKS TO ADDITIONAL RESOURCES

FEATURES

  • Ultra compact LLP1006-2L
  • Low package height < 0.4 mm
  • 1-line ESD protection
  • Working range -7 V up to +14 V or -14 V up to +7 V
  • Low leakage current < 0.1 μA
  • Low load capacitance typical C D = 8 pF
  • ESD immunity acc. IEC 61000-4-2 ± 25 kV contact discharge ± 30 kV air discharge
  • e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn)
  • PATENT(S): www.vishay.com/patents
  • Material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 PATENT(S): www.vishay.com/patents This Vishay product is protected by one or more United States and international patents. 20855 20950 1 2 21121 XY 333DDD3 D 3D Models

ORDERING INFORMATION

PIN PLATING DEVICE NAME ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY e4 VCUT0714A-HD1 VCUT0714A-HD1-GS08 8k 8k PACKAGE DATA DEVICE NAME PACKAGE NAME PIN PLATING TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VCUT0714A-HD1 LLP1006-2L e4 B 0.72 mg UL 94 V-0 MSL level 1 (according J-STD-020) Peak temperature max. 260 °C ABSOLUTE MAXIMUM RATINGS PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT Peak pulse current Pin 1 to pin 2, acc. IEC 61000-4-5, 8/20 μs/single shot I PPM Pin 2 to pin 1, acc. IEC 61000-4-5, 8/20 μs/single shot 2 A Peak pulse power Pin 1 to pin 2, acc. IEC 61000-4-5, 8/20 μs/single shot PPP 63 W Pin 2 to pin 1, acc. IEC 61000-4-5, 8/20 μs/single shot 54 W ESD immunity Contact discharge acc. IEC 61000-4-2; 10 pulses VESD ± 25 kV Air discharge acc. IEC 61000-4-2; 10 pulses ± 30 kV Storage temperature TSTG -55 to +150 °C Operating temperature Junction temperature T J -40 to +125 °C

www.vishay.com Vishay Semiconductors Rev. 2.5, 04-May-2020 2 Document Number: 81801 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 CUT THE SPIKES The VCUT0714A-HD1 is a bidirectional but asymmetrical (BiAs) ESD protection devi ce which clamps positive and negative overvoltage transients to ground. Connected between the signal or data line and the ground the VCUT0714A-HD1 offers a high isolation (low leakage current, small capacitance) within the specified working range of -7 V to +14 V or -14 V and +7 V. Due to the short leads and small package size of the tiny LLP1006 package the line inductance is very low, so that fast transients like an ESD strike can be clamped with minimal over- or undershoots. ELECTRICAL CHARACTERISTICS (pin 2 to pin 1) (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Protection paths Number of li nes which can be protected N channel - - 1 lines Reverse stand-off voltage Max. reverse working voltage V RWM -- 1 4 V Reverse voltage At I R = 0.1 μA V R 14 - - V Reverse current At V RWM = 14 V I R -- 0 . 1 μ A Reverse breakdown voltage At I R = 1 mA V BR 14.5 - - V Reverse clamping voltage At IPP = 1 A V C -- 2 7 V At IPP = IPPM = 2 A V C -- 3 0 V Capacitance At VR = 0 V; f = 1 MHz C D -8 8 . 5 p F At VR = 7 V; f = 1 MHz C D -4- p F ELECTRICAL CHARACTERISTICS (pin 1 to pin 2) (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Protection paths Number of li nes which can be protected N channel - - 1 lines Reverse stand-off voltage Max. reverse working voltage V RWM --7 V Reverse voltage At I R = 0.1 μA V R 7--V Reverse current At V RWM = 7 V I R -- 0 . 1 μ A Reverse breakdown voltage At I R = 1 mA V BR 7.3 - - V Reverse clamping voltage At IPP = 1 A V C -- 1 3 V At IPP = IPPM = 5 A V C -- 1 7 V Capacitance At V = 0 V; f = 1 MHz C D -8 8 . 5 p F At V = 3.5 V; f = 1 MHz C D -6 . 4-p F 1 2 Ground Ground - 7 V ≤ VRW ≤ + 14 V - 14 V ≤ V RW ≤ + 7 V 22286

www.vishay.com Vishay Semiconductors Rev. 2.5, 04-May-2020 3 Document Number: 81801 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 Ω/150 pF) Fig. 2 - 8/20 μs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR Fig. 4 - Typical Reverse Voltage VR vs. Reverse Current IR Fig. 5 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP Fig. 6 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 2nd line 2nd line 20557 100 1000 10000 100 120 -10 0 10 20 30 40 50 60 70 80 90 100 Axis Title 1st line 2nd line 2nd line IESD (%) t (ns) Rise time = 0.7 ns to 1 ns 100 1000 10000 100 01 0 2 0 3 0 4 0 Axis Title 1st line 2nd line 2nd line IPPM (%) t (µs) 2nd line 20 µs to 50 % 8 µs to 100 % 20548 0 2 4 6 8 1 01 21 41 6 VR (V) CD (pF) f = 1 MHz Pin 1 to 2 Pin 2 to 1 20576 0.01 0.1 1 10 100 1000 10 000 I R (µA) VR (V) Pin 1 to 2 Pin 2 to 1 20577 01234567 IPP (A) VC (V) Measured acc. IEC 61000-4-5 (8/20 µs - wave form) VC Pin 1 to 2 Pin 2 to 1 20578 -10 - 1 00 1 02 03 04 05 06 07 08 09 0 t (ns) VC-ESD (V) Acc. IEC 61000-4-2 +8 kV contact discharge Pin 1 to 2 20579

www.vishay.com Vishay Semiconductors Rev. 2.5, 04-May-2020 4 Document Number: 81801 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 7 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) Fig. 8 - Typical Peak Clamping Voltage vs. Peak Pulse Current PACKAGE DIMENSIONS in millimeters (inches): LLP1006-2L -10 0 10 20 30 40 50 60 70 80 90 t (ns) VC-ESD (V) Acc. IEC 61000-4-2 -8 kV contact discharge Pin 1 to 2 20580 -80 -70 -60 -50 -40 -30 -20 -10 0 1 02 03 0 2nd line VC-TLP (V) ITLP (A) 2nd line Transmission line pulse (TLP): tp = 100 ns Pi n 1-2 Pi n 2-1 23105 0.3 [0.012] 0.2 [0.008] 0.45 [0.018] 0.35 [0.014] 0.65 [0.026] 0.55 [0.022] 1.05 [0.041] 0.95 [0.037] Foot print recommendation: 1 [0.039] Solder resist mask Solder pad Document no.: S8-V-3906.04-005 (4) Rev. 7 - Date: 11.May 2016 20812 0.55 [0.022] 0.45 [0.018] 0.4 [0.016] 0.33 [0.013] 0.6 [0.024] 0.5 [0.020] 0.25 [0.010] 0.15 [0.006] 0.05 [0.002] 0 [0.000] 0.2 [0.008] 0.125 [0.005] ref. Orientation identification 0.25 [0.010] Pad Design Patented: US 9.018.537 B2)P(

www.vishay.com Vishay Semiconductors Rev. 2.5, 04-May-2020 5 Document Number: 81801 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 LLP1006-2X Top view Pad layout - view from top seen at bottom side Unreeling direction Orientation identification 02.05.2017 22965

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