VCNL4040_V01 VISHAY | Alldatasheet
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www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 1 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fully Integrated Proximity and Ambient Light Sensor With Infrared Emitter, I2C Interface, and Interrupt Function LINKS TO ADDITIONAL RESOURCES
DESCRIPTION
VCNL4040 integrates a proximi ty sensor (PS), ambient light sensor (ALS), and a high power IRED into one small package. It incorporates ph otodiodes, amplifiers, and analog to digital converting circuits into a single chip by CMOS process. The 16-bit hi gh resolution ALS offers excellent sensing capabilities with sufficient selections to fulfill most applications whether dark or high transparency lens design. High and low in terrupt thresholds can be programmed for both ALS and PS, allowing the component to use a minimal amount of the microcontrollers resources. The proximity sensor features an intelligent cancellation scheme, so that cross talk phenomenon is eliminated effectively. To accelerate the PS response time, smart persistence prevents the misjudgment of proximity sensing but also keeps a fast response time. In active force mode, a single measurement can be re quested, allowing another good approach for more design flexibility to fulfill different kinds of applications with more power saving. The patented Filtron TM technology achieves ambient light spectral sensitivity closest to real human eye response and offers the best background light cancellation capability (including sunlight) without utilizing the microcontrollers’ resources. VCNL4040 provides an excellent temperature compensation capability for keeping output stable under various temperature configurations. ALS and PS functions are easily set via the simple command format of I 2C (SMBus compatible) interface protocol. Operating voltage ranges from 2.5 V to 3.6 V. VCNL4040 is packaged in a lead (Pb)-free 8-pin molding package, which offers the best market-proven reliability quality.
FEATURES
- Package type: surface-mount
- Dimensions (L x W x H in mm): 4.0 x 2.0 x 1.1
- Integrated modules: i nfrared emitter (IRED), ambient light sensor (ALS), proximity sensor (PS), and signal conditioning IC
- Operates ALS and PS in parallel structure
- F i l t r o n TM technology adoption for robust background light cancellation
- Temperature compensation: -40 °C to +85 °C
- Low power consumption I 2C (SMBus compatible) interface
- Floor life: 168 h, MSL 3, according to J-STD-020
- Output type: I 2C bus (ALS / PS)
- Operation voltage: 2.5 V to 3.6 V
- Material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 PROXIMITY FUNCTION
- Immunity to red glow (940 nm IRED)
- Programmable IRED sink current
- Intelligent cancellation to reduce cross talk phenomenon
- Smart persistence scheme to reduce PS response time
- Selectable for 12- / 16-bit PS output data AMBIENT LIGHT FUNCTION
- High accuracy of ALS ±10 %
- Fluorescent light flicker immunity
- Spectrum close to real human eye responses
- Selectable maximum detection range (819 / 1638 / 3277 / 6553) lux with highest sensitivity 0.0125 lux/step INTERRUPT
- Programmable interrupt function for ALS and PS with upper and lower thresholds
- Adjustable persistence to prevent false triggers for ALS and PS
APPLICATIONS
- Handheld device
- Notebook, tablet PC
- Consumer device
- Industrial application 333DDD3 D 3D Models Design Tools Related Documents
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 2 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Note (1) Adjustable through I2C interface Notes (1) MOQ: minimum order quantity (2) The interposers are necessary when the component needs to be brou ght closer to a cover glass and the customers mechanical stack up does not allow for this with the standard height component (VCNL4040M3OE) PRODUCT SUMMARY PART NUMBER OPERATING RANGE (mm) OPERATING VOLTAGE RANGE (V) I2C BUS VOLTAGE RANGE (V) IRED PULSE CURRENT (1) (mA) AMBIENT LIGHT RANGE (lx) AMBIENT LIGHT RESOLUTION (lx) OUTPUT CODE ADC RESOLUTION PROXIMITY / AMBIENT LIGHT
ORDERING INFORMATION
ORDERING CODE PACKAGING VOLUME (1) REMARKS VCNL4040M3OE Tape and reel MOQ: 2500 pcs 4.0 mm x 2.0 mm x 1.1 mm VCNL4040M3OE-H3 (2) MOQ: 1500 pcs 4.34 mm x 2.35 mm x 3.25 mm VCNL4040M3OE-H5 (2) 4.34 mm x 2.35 mm x 3.65 mm ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT Supply voltage V DD 2.5 3.6 V Operation temperature range T amb -40 +85 °C Storage temperature range T stg -40 +100 °C RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT Supply voltage V DD 2.5 3.6 V Operation temperature range T amb -40 +85 °C I2C bus operating frequency f (I2CCLK) 10 400 kHz PIN DESCRIPTIONS PIN ASSIGNMENT SYMBOL TYPE FUNCTION
1 GND I Ground
2 CATHODE I Cathode (sensor) connection
4A N O D E I A n o d e f o r I R E D
5 CATHODE I Cathode (LED) connection
6 INT O Interrupt pin
7 SDAT I / O (open drain) I
2C data bus data input / output 8S C L K I I 2C digital bus clock input
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 3 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 BLOCK DIAGRAM Notes (1) Test condition: VDD = 3.3 V, temperature: 25 °C (2) Maximum detection range to ambient light can be determined by ALS refresh time adjustment. Refer to table “ALS Resolution and Maximum Detection Range” (3) Based on IRED on / off duty ratio = 1/40, 1/80, 1/160, and 1/320 BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT Supply voltage V DD 2.5 3.6 V Supply current Excluded LED driving I DD 300 μA Light condition = dark, VDD = 3.3 V I DD (SD) 0.2 μA I2C supply voltage V PULL UP 1.8 3.6 V ALS shut down ALS disable, PS enable I ALSSD 200 μA PS shut down ALS enable, PS disable I PSSD 260 μA I2C signal input Logic high VDD = 3.3 V VIH 1.55 VLogic low V IL 0.4 Logic high VDD = 2.6 V VIH 1.4 VLogic low V IL 0.4 Peak sensitivity wavelength of ALS λ p 550 nm Peak sensitivity wavelength of PS λpps 940 nm Full ALS counts 16-bit resolution 65 535 steps Full PS counts 12-bit / 16-bit resolution 4096 / 65 535 steps ALS sensing tolerance White LED light source ± 10 % Detectable intensity Minimum I T = 640 ms, 1 step (1)(2) 0.0125 lxMaximum I T = 80 ms, 65 535 step (1)(2) 6553 ALS dark offset I T = 80 ms, normal sensitivity (1) 03 s t e p s PS detection range Kodak white card 0 200 mm Operating temperature range T amb -40 +85 °C Cathode (sensor) voltage 2.5 3.6 V IRED driving current (3) 200 mA GND I2C bus logic control ALS PD PS PD LED driver PD buffer LED_CATHODE VDD SCLK SDAT INT Anode IRED PD timing controller DSP Oscilator Temperature compensation Low pass filter ALS 16-bits data buffer
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 4 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 1 - I2C Bus Timing Diagram I2C BUS TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER SYMBOL STANDARD MODE FAST MODE UNITMIN. MAX. MIN. MAX. Clock frequency f (SMBCLK) 10 100 10 400 kHz Bus free time between start and stop condition t (BUF) 4.7 1.3 μs Hold time after (repeated) start condition; after this period, the first clock is generated t(HDSTA) 4.0 0.6 μs Repeated start condition setup time t (SUSTA) 4.7 0.6 μs Stop condition setup time t (SUSTO) 4.0 0.6 μs Data hold time t (HDDAT) 3450 900 ns Data setup time t (SUDAT) 250 100 ns I2C clock (SCK) low period t (LOW) 4.7 1.3 μs I2C clock (SCK) high period t (HIGH) 4.0 0.6 μs Clock / data fall time t (F) 300 300 ns Clock / data rise time t (R) 1000 300 ns VIH VIH t(LOW) VIL t(R) t(HDSTA) t(BUF) VIL t(HDDAT) t(F) t(HIGH) t(SUSTA) t(SUDAT) t(SUSTO) P Stop Condition S Star Condition PS t(LOSEXT) t(LOWMEXT)t(LOWMEXT) SCLKACK SDAACK Start Stop t(LOWMEXT) I2C bus CLOCK (SCLK) I2C bus DATA (SDAT) I2C bus CLOCK (SCLK) I2C bus DATA (SDAT)
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 5 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PARAMETER TIMING INFORMATION Fig. 2 - I2C Bus Timing for Sending Word Command Format Fig. 3 - I2C Bus Timing for Receiving Word Command Format WSA6 SA5 SA4 SA3 SA2 SA1SA7 I2CBus Slave Address Byte Start by Master ACK by SA6 SA5 SA4 SA3 SA2 SA0SA7 Command Code SA1 ACK by SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 ACK by SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 Stop by Master ACK by Data Byte Low Data Byte High I2C bus CLOCK (SCLK) I2C bus DATA (SDAT) I2C bus CLOCK (SCLK) I2C bus DATA (SDAT) VCNL4040 VCNL4040 VCNL4040 VCNL4040 I2CBus CLOCK (SCLK) I2CBus DATA (SDAT) WSA6 SA5 SA4 SA3 SA2 SA1SA7 I2CBus Slave Address Byte Start by Master ACK by SA6 SA5 SA4 SA3 SA2 SA0SA7 Command Code SA1 ACK by SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 Stop by Master ACK by Master Data Byte High I2CBus CLOCK (SCLK) I2CBus DATA (SDAT) I2CBus CLOCK (SCLK) I2CBus DATA (SDAT) RSA6 SA5 SA4 SA3 SA2 I2CBus Slave Address Byte Start by Master ACK by SA6 SA5 SA4 SA3 SA2 SA0SA7 Data Byte Low SA1 ACK by Master SA1SA7 VCNL4040 VCNL4040 VCNL4040
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 6 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) Fig. 4 - Normalized Spectral Response Fig. 5 - Forward Current IF = f (VF) Fig. 6 - ALS Refresh Time vs. Maximum Detection Range Fig. 7 - IDD vs.Temperature Fig. 8 - ALS View Angle Fig. 9 - White Channel Spectral Response 100 1000 10000 100 400 500 600 700 800 900 1000 Axis Title 1st line 2nd line 2nd line Normalized Output (%) λ - Wavelength (nm) 2nd line PS-CHALS-CH 100 1000 10000 0.1 100 1000 Axis Title 1st line 2nd line 2nd line Forward Current (mA) Forward Voltage (V) 5.0 DC current Pulse current 4.03.53.0 100 1000 10000 10 000 20 000 30 000 40 000 50 000 60 000 70 000 0 2000 4000 6000 8000 10 000 Axis Title 1st line 2nd line Step 1st line Lux 2nd line 80 ms 160 ms 320 ms 640 ms 100 1000 10000 150 160 250 - 4 0 2 04 06 08 0 Axis Title 1st line 2nd line 2nd line IDD - Supply Current (A) Tamb - Ambient Temperature (°C) 100 240 230 220 210 200 190 180 170 0-20 100 1000 10000 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -90 -60 -30 0 30 60 90 Axis Title 1st line 2nd line 1st line 2nd line ALS View Angle /g77 - Angular Displacement (°) 100 1000 10000 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400 500 600 700 800 900 1000 Axis Title 1st line 2nd line Normalized Output 1st line Wavelength (nm) 2nd line
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 7 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 10 - IRED Profile
APPLICATION INFORMATION
Pin Connection with the Host VCNL4040 integrates proximity sensor, ambient light Sensor, and IRED all together with I 2C interface. It is very easy for the baseband (CPU) to access PS and ALS output data via I2C interface without extra software algorithms. The hardware schematic is shown in the following diagram. Two additional capacitors in the circuit can be used for the following purposes: (1) the 0.1 μF capacitor near the V DD pin is used for power supply noise rejection, (2) the 2.2 μF capacitor - connected to the anode - is used to prevent the IRED voltage from instantly dropping when the IRED is turned on, and (3) 2.2 k Ω is suitable for the pull up resistor of I 2C except for the 8.2 k Ω applied on the INT pin. Note
- Cathode (LED) and cathode (sensor): pins need to be connected together externally Fig. 11 - Hardware Pin Connection Diagram 1st line 2nd line 100 1000 10000 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -90 -60 -30 0 30 60 90 Axis Title 1st line 2nd line Relative Radiant Intensity Angle (deg) 0° 20° 40° 60° 80° 0.6 0.7 0.8 0.9 1.0 Radiant Intensity Angle (deg) INT INT SCLK 0.1 μF GND SDAT SCK SDA 2.2 kΩ2.2 kΩ VDD_LED 2.2 μF 8.2 kΩ Cathode (LED) Anode 4 VCNL4040 Cathode (sensor) VDD VPull_up Baseband
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 8 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Digital Interface VCNL4040 applies single slave address 0x60 (HEX) of 7-bit addressing following I 2C protocol. As figure 12 shows, VCNL4040’s I2C command format is simple for read and write operations between VCNL4040 and the host. The white sections indicate host activity and the gray sections indicate VCNL4040’s acknowledg ement of the host access activity. Write word and read word protocol is suitable for accessing registers particularly for 16-bit data ALS and 12-bit / 16-bit PS data. Interrupt can be cleared by reading data out from register: INT_Flag. All command codes should follow read word and write word protocols. Fig. 12 - Write Word and Read Word Protocol Function Description VCNL4040 applies a 16-bit high resolution ALS that provides the best ambient light sensing capa bility down to 0.01 lux/step which works well under a low transm ittance lens design (dark lens ). A flexible interrupt functio n of ALS (register: ALS_CONF) is also supported. The INT signal will not be triggered by VCNL4040 if the ALS value is not over high INT threshold window level, or lower than low INT threshold window level of ALS. VCNL4 040 detects different light sources such as fluorescent light, incandescent light, sunlight, and white LED with high accuracy ALS data output after detecting algorithm is implemented. For proximity sensor function, VCNL4040 supports different kinds of mechanical designs to achieve the best proximity detection performance for any color of object with mo re flexibility. The basic PS function settin gs, such as duty ratio, integration time , interrupt, and PS enable / disable, and persistence, are handled by the register: PS_CONF1. Duty ratio controls the PS response time. Integration time represents the durati on of the energy being received. The interrupt is triggered when the PS detection levels over the high threshold level setting (register: PS_THDH) or lower than low threshold (register: PS_THDL). If the interrupt function is enabled, the host can react to the interrupt pin, in stead of polling the PS data registers. The INT flag (register: INT_Flag) indicates the type of interrupt that has been tri ggered, depending on the interrupt settings in the configuration registers. PS persistence (PS_PERS) sets up the PS INT trigger conditions, defining the amount of consecutive hits required before an interrupt event occurs . The intelligent cancellation level can be set on register: PS_CANC to reduce the cross talk phenomenon. VCNL4040 also supports an easy to use proximity detection logic mode, that triggers when the PS high threshold is exceeded and automatically resets the interrupt pin when the proximity reading falls beneath the PS low threshold. This functionality can be set in the register: PS_MS. A smart pe rsistence is provided to be able to pr event false PS interrupt trigger events. Descriptions of each of these parameters are shown in table 1. S Slave address Wr A Command code A Data byte low A Data byte high A 17 8 11 1 8 1 8 P Send byte /g111 write command to VCNL4040 Slave address Wr A Command code A S Slave address Rd A Data byte low A Data byte high N P 11 8 11 7 11 8 1 8 1 1 S Receive byte /g111 read data from VCNL4040 S = start condition P = stop condition A = acknowledge N = not acknowledge Host action VCNL4040 acknowledge
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- All of reserved register are used for internal test. Please keep as default setting. Command Register Format VCNL4040 provides an 8-bit command register for ALS and PS controlling independently. The description of each command format is shown in following tables. TABLE 1 - COMMAND CODE AND REGISTER DESCRIPTION COMMAND CODE DATE BYTE LOW / HIGH REGISTER NAME R / W DEFAULT VALUE FUNCTION DESCRIPTION 0x00 L ALS_CONF R / W 0x01 ALS integration time, persiste nce, interrupt, and function enable / disable H Reserved R / W 0x00 Reserved 0x01 L ALS_THDH_L R / W 0x00 ALS high interrupt threshold LSB byte H ALS_THDH_M R / W 0x00 ALS high interrupt threshold MSB byte 0x02 L ALS_THDL_L R / W 0x00 ALS low interrupt threshold LSB byte H ALS_THDL_M R / W 0x00 ALS low interrupt threshold MSB byte 0x03 L PS_CONF1 R / W 0x01 PS duty ratio, integration time, persistence, and PS enable / disable H PS_CONF2 R / W 0x00 PS output resolution selection, PS interrupt trigger method 0x04 L PS_CONF3 R / W 0x00 PS multi pulse, active force mode, sunlight immunity setting H PS_MS R / W 0x00 White channel enable / disable, PS mode selection, PS protection setting, and LED current selection 0x05 L PS_CANC_L R / W 0x00 PS cancellation level setting H PS_CANC_M R / W 0x00 PS cancellation level setting 0x06 L PS_THDL_L R / W 0x00 PS low interr upt threshold setting LSB byte H PS_THDL_M R / W 0x00 PS low interr upt threshold setting MSB byte 0x07 L PS_THDH_L R / W 0x00 PS high inte rrupt threshold setting LSB byte H PS_THDH_M R / W 0x00 PS high inte rrupt threshold setting MSB byte 0x08 L PS_Data_L R 0x00 PS LSB output data H PS_Data_M R 0x00 PS MSB output data 0x09 L ALS_Data_L R 0x00 ALS LSB output data H ALS_Data_M R 0x00 ALS MSB output data 0x0A L White_Data_L R 0x00 White LSB output data H White_Data_M R 0x00 White MSB output data 0x0B L Reserved R 0x00 Reserved H INT_Flag R 0x00 ALS, PS interrupt flags 0x0C L ID_L R 0x86 Device ID LSB H ID_M R 0x01 Device ID MSB TABLE 2 - REGISTER: ALS_CONF DESCRIPTION REGISTER NAME COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW) C o m m a n d B i t 76543210 REGISTER: ALS_CONF COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW) Command Bit Description ALS integration time setting, longer integration time has higher sensitivity Reserved 5 : 4 Default = (0 : 0) ALS interrupt persistence setting ALS_INT_EN 1 0 = ALS interrupt disable, 1 = ALS interrupt enable ALS_SD 0 0 = ALS power on, 1 = ALS shut down, default = 1
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 10 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TABLE 3 - REGISTER: 00H_H DESCRIPTION REGISTER: Reserved COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH) Command Bit Description Reserved 7 : 0 Default = (0 : 0 : 0 : 0 : 0 : 0 : 0 : 0) TABLE 4 - REGISTER ALS_THDH_L AND ALS_THDH_M DESCRIPTION COMMAND CODE: 0x01_L (0x01 DATA BYTE LOW) OR 0x01_H (0x01 DATA BYTE HIGH) Register Bit Description ALS_THDH_L 7 : 0 0x00 to 0xFF, ALS high interrupt threshold LSB byte ALS_THDH_M 7 : 0 0x00 to 0xFF, ALS high interrupt threshold MSB byte TABLE 5 - REGISTER: ALS_THDL_L AND ALS_THDL_M DESCRIPTION COMMAND CODE: 0x02_L (0x02 DATA BYTE LOW) AND 0x02_H(0x02 DATA BYTE HIGH) Register Bit Description ALS_THDL_L 7 : 0 0x00 to 0xFF, ALS low interrupt threshold LSB byte ALS_THDL_M 7 : 0 0x00 to 0xFF, ALS low interrupt threshold MSB byte TABLE 6 - REGISTER: PS_CONF1 DESCRIPTION REGISTER: PS_CONF1 COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW) Command Bit Description PS IRED on / off duty ratio setting PS interrupt persistence setting (1 : 1 : 0) = 4T, (1 : 1 : 1) = 8T, PS integration time setting PS_SD 0 0 = PS power on, 1 = PS shut down, default = 1 TABLE 7 - REGISTER: PS_CONF2 DESCRIPTION REGISTER: PS_CONF2 COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH) Command Bit Description Reserved 7 : 6 (0 : 0), reserved Reserved 5 : 4 (0 : 0), reserved PS_HD 3 0 = PS output is 12 bits; 1 = PS output is 16 bits Reserved 2 Default = 0 PS_INT 1 : 0 (0 : 0) = interrupt disable, (0 : 1) = trigger when close, (1 : 0)= trigger when away, (1 : 1)= trigger when close or away TABLE 8 - REGISTER: PS_CONF3 DESCRIPTION REGISTER: PS_CONF3 COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW) Command Bit Description Reserved 7 0 PS_MPS 6 : 5 Proximity multi pulse numbers PS_SMART_PERS 4 0 = disable; 1 = enable PS smart persistence PS_AF 3 0 = active force mode disable (normal mode), 1 = active force mode enable PS_TRIG 2 0 = no PS active force mode trigger, 1 = trigger one time cycle VCNL4040 output one cycle data every time host writes in ‘1’ to sensor. The state returns to ‘0’ automatically. Reserved 1 0 PS_SC_EN 0 PS sunlight cancel enable setting, 1 = sunlight cancellation function enable
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 11 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TABLE 9 - REGISTER: PS_MS DESCRIPTION REGISTER: PS_MS COMMAND CODE: 0x04_H (0x04 DATA BYTE HIGH) Command Bit Description White_EN 7 0 = white channel enabled 1 = white channel disabled PS_MS 6 0 = proximity normal operation with interrupt function 1 = proximity detection logic output mode enable Reserved 5 : 3 ( 0 : 0 : 0 ) LED_I 2 : 0 LED current selection setting TABLE 10 - REGISTER PS_CANC_L AND PS_CANC_M DESCRIPTION COMMAND CODE: 0x05_L (0x05 DATA BYTE LOW) AND 0x05_H(0x05 DATA BYTE HIGH) Register Bit Description PS_CANC_L 7 : 0 0x00 to 0xFF, PS ca ncellation level setting_LSB byte PS_CANC_M 7 : 0 0x00 to 0xFF, PS ca ncellation level setting_MSB byte TABLE 11 - REGISTER: PS_THDL_L AND PS_THDL_M DESCRIPTION COMMAND CODE: 0x06_L (0x06 DATA BYTE LOW) AND 0x06_H(0x06 DATA BYTE HIGH) Register Bit Description PS_THDL_L 7 : 0 0x00 to 0xFF, PS inte rrupt low threshold setting_LSB byte PS_THDL_M 7 : 0 0x00 to 0xFF, PS inte rrupt low threshold setting_MSB byte TABLE 12 - REGISTER: PS_THDH_L AND PS_THDH_M DESCRIPTION COMMAND CODE: 0x07_L (0x07 DATA BYTE LOW) AND 0x07_H(0x07 DATA BYTE HIGH) Register Bit Description PS_THDH_L 7 : 0 0x00 to 0xFF, PS inte rrupt high threshold setting_LSB byte PS_THDH_M 7 : 0 0x00 to 0xFF, PS inte rrupt high threshold setting_MSB byte TABLE 13 - READ OUT REGISTER DESCRIPTION Register Command Code Bit Description PS_Data_L 0x08_L (0x08 data byte low) 7 : 0 0x00 to 0xFF, PS LSB output data PS_Data_M 0x08_H (0x08 data byte high) 7 : 0 0x00 to 0xFF, PS MSB output data ALS_Data_L 0x09_L (0x09 data byte low) 7 : 0 0x00 to 0xFF, ALS LSB output data ALS_Data_M 0x09_H (0x09 data byte high) 7 : 0 0x00 to 0xFF, ALS MSB output data White_Data_L 0x0A_L (0x0A da ta byte low) 7 : 0 0x00 to 0xFF, white LSB output data White_Data_M 0x0A_H (0x0A da ta byte high) 7 : 0 0x00 to 0xFF, white LSB output data Reserved 0x0B_L (0x0B data by te low) 7 : 0 Default = 0x00 INT_Flag 0x0B_H (0x0B data byte high) Reserved PS_SPFLAG, PS entering protection mode ALS_IF_L, ALS crossing low THD INT trigger event ALS_IF_H, ALS crossing high THD INT trigger event Reserved Reserved PS_IF_CLOSE, PS rises above PS_THDH INT trigger event PS_IF_AWAY, PS drops below PS_THDL INT trigger event ID_L 0CH_L (0CH data byte lo w) 7 : 0 86H for MP version sample, device ID LSB byte ID_M 0CH_H (0CH data byte high) 7 : 6 5 : 4 3 : 0 (0 : 0) (0 : 0) Slave address = 0x60 (7-bit) Version code (0 : 0 : 0 : 1), device ID MSB byte
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 12 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Adjustable Sampling Time VCNL4040’s LED driver drives the internal IRED with the “LED CATHODE” pin by a pulsed duty cycle. The IRED on / off duty ratio can be set in register: PS_Duty which is related to th e current consumption and PS resp onse time. The higher the duty ratio, the faster the response time achieved with higher power consumption. For example, PS_Duty = 1/320, peak IRED current = 100 mA, averaged current consumption is 100 mA/320 = 0.3125 mA. Initialization VCNL4040 includes default values for each register. As long as power is on, it is ready to be controlled by host via I 2C bus. Threshold Window Setting
- ALS Threshold Window Setting (Applying ALS INT) Register: ALS_THDH_L and ALS_THDH_M defines 16-bit ALS hi gh threshold data for LSB by te and MSB byte. Register: ALS_THDL_L and ALS_THDL_M defines 16-bit ALS low threshol d data for LSB byte and MSB byte. As long as ALS INT function is enabled, INT will be triggered once the ALS data exceeds ALS_THDH or goes below ALS_THDL. To easily define the threshold range, multiply the value of the resolution (lux/step) by the threshold level (refer to table 14).
- A L S P e r s i s t e n c e The ALS INT is triggered once the ALS value is higher or lower than the threshold window. The ALS_PERS (1, 2, 4, 8 times) parameter, sets the amount of consecutive hits needed, in order for an interrupt event to trigger.
- Programmable PS Threshold VCNL4040 provides both high and low thresholds setting for PS (register: PS_THDL, PS_THDH).
- P S P e r s i s t e n c e The PS persistence function (PS_PERS, 1, 2, 3, 4) helps to avoid false trigger of the PS INT. It defines the amount of consecutive hits needed in order for a PS interrupt event to be triggered.
- PS Active Force mode An extreme power saving way to use PS is to apply PS active force (r egister: PS_CONF3 command: PS_AF = 1) mode. Anytime host would like to request one proximity measurement, write a ‘1’ into register: PS_CONF3 command: PS_Trig. This triggers a single PS measurement, which can be read from the PS result registers. V CNL4040 stays in standby mode constantly. Data Access All of VCNL4040 16 bit command registers are readable. The result data for ALS, white, and PS measurements can be read out form their respective registers. Each result is made of 2 bytes. Intelligent Cancellation VCNL4040 provides an intelligent cancellation method to reduce cross talk phenomenon for the proximity sensor. The output data will be subtracted by the value set in register: PS_CANC. TABLE 14 - ALS RESOLUTION AND MAXIMUM DETECTION RANGE ALS_IT SENSITIVITY MAXIMUM DETECTION RANGE ALS_IT (7 : 6) INTEGRATION TIME (typ.) UNIT (lux/step) UNIT (lux) (0, 0) 80 ms 0.10 6553.5 (0, 1) 160 ms 0.05 3276.8 (1, 0) 320 ms 0.025 1638.4 (1, 1) 640 ms 0.0125 819.2 TABLE 15 - 16-BIT ALS DATA FORMAT VCNL4040 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Register ALS_DataM ALS_DataL
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 13 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Interruption (INT) The VCNL4040 has an interrupt feature for both the PS and ALS channel. The purpose of the interrupt feature is to actively inform the host once INT has been triggered. When the interrupt is enabled, the host does not need to continuously read the data registers of the sensor, but instead can simply react to the interrupt pin. As long as the host enables ALS interrupt (register: ALS_INT_EN) or PS interrupt (register: PS_INT) function, the level of INT pin (pin 6) is pulled low once an interrupt event has been triggered. All registers are accessible even if INT is triggered. ALS INT is triggered when ALS value cr osses over the value set in register: ALS_THDH or below the value set by register: ALS_THDL. PS INT is triggered when the PS value crosses over the value set in register: PS_THDH or falls below the value set in register: PS_THDL. Which of these thresholds to react to, can be set by the PS_INT bits in the register: PS_CONF2. Interruption Flag Register: INT_Flag represents all of the inte rrupt trigger statuses for ALS and PS. If any of these flags trigger from “0” to “ 1”, the INT pin will be pulled low. Once the host reads INT_Flag register, all the flags are cleared (reset to "0"), and the INT pi n is reset to high. PROXIMITY DETECTION LOGIC OUTPUT MODE VCNL4040 has a proximity detection logic mode, enabling the host to read the state of PS (near or far) simply by monitoring the INT pin (pin 6). When this mode is selected, the INT pin is pulled low when an object is close to the sensor (value is above high threshold) and is reset to high when the object moves away (value is below low threshold). Register: PS_THDH / PS_THDL define where these threshold levels are set. It should be noted that whenever the pro ximity detection logic mode has been enab led, the INT pin only reacts to proximity interrupt events. If the host would like to use ALS INT function, the bit PS_MS in the register: PS_MS needs to be set to normal operation mode (PS_MS = 0). In order for the proximity detection logic mode to func tion, one of the PS_INT bits in register: PS_CONF2 must be enabled (“trigger when cl ose”, “trigger when away”, or “trigger wh en close or away”). If PS_INT is set to “INT Disable” the proximity detection logic mode will not function. PROXIMITY DETECTION HYSTERESIS A hysteresis is created by setting the low and high threshold values. With proximity detection logic mode disabled, an interrupt event will trigger and stay triggered until it is cleared in the INT_Flag register. The register is cleared automatically once it is read. If the interrupt flags are not cleared after an interrupt event has occurred, the VCNL4040 will not react to another interrupt event until the INT-Flag register has been cleared. An example of this could be when turning on and off a backlight of a mobile display. First the PS INT triggers when the PS value is over PS_THDH. Th e host switches off the panel backlight and then clears INT. When PS value is less than PS_THDL, host switches on panel backlight. Fig. 13 - VCNL4040 Reference Circuit Connection with Host (Proximity Detection Logic Output Mode) (VCNL4040 INT pin connecting to BB GPIO instead of INT pin) GPIO INT SCLK 0.1 μF GND SDAT SCK SDA 2.2 kΩ2.2 kΩ VDD_LED 2.2 μF 8.2 kΩ Cathode (LED) Anode 4 VCNL4040 Cathode (sensor) VDD VPull_up Baseband
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 14 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PACKAGE INFORMATION (VCNL4040M3OE) in millimeters Fig. 14 - VCNL4040 Package Dimensions LAYOUT PAD INFORMATION (VCNL4040M3OE) in millimeters Fig. 15 - VCNL4040M3OE PCB Layout Footprint GND Cathode (sensor) VDD Anode Cathode (LED) INT SDAT SCLK Top View Side View Bottom View 1.075 0.9 0.675 x 8 1.1 ± 0.05 0.5 0.75 0.85 0.55 1.45 Ø 1.2 Ø 1.1 8 1 2.6 4 ± 0.1 LED Sensor 1.075 1.075 2 ± 0.1 Pad Center to Center 1.4 Pad Center to Center 0.725 x 8 0.7 x 8 0.35 0.7 1.075 1.0751.075
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 15 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PACKAGE INFORMATION (VCNL4040M3OE-H3) in millimeters Fig. 16 - VCNL4040M3OE-H3 Package Dimensions PACKAGE INFORMATION (VCNL4040M3OE-H5) in millimeters Fig. 17 - VCNL4040M3OE-H5 Package Dimensions 3.25 ± 0.2 4.34 ± 0.2 1.022.6 Ø 1.2 Ø 1.1 2.35 ± 0.2 0.7 (x 8) 1 0.575 0.8 Top View Side View Bottom View GND Cathode (sensor) VDD Anode Cathode (LED) INT SDAT SCLK 1.075 1.075 1.075 3.65 ± 0.2 4.34 ± 0.2 1.022.6 Ø 1.2 Ø 1.1 2.35 ± 0.2 0.7 (x 8) 1 0.575 0.8 Top View Side View Bottom View GND Cathode (sensor) VDD Anode Cathode (LED) INT SDAT SCLK 1.075 1.075 1.075
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 16 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 LAYOUT PAD INFORMATION (VCNL4040M3OE-H3, VCNL4040M3OE-H5) in millimeters Fig. 18 - VCNL4040M3OE-H3 and H5 PCB Layout Footprint APPLICATION CIRCUIT BLOCK REFERENCE Fig. 19 - VCNL4040 Application Circuit (VDD (sensor and LED) suggestion circuit) Pad Center to Center 1.7 Pad Center to Center 0.725 x 8 0.9 x 8 0.45 0.8 1.075 1.0751.075 INT INT SCLK 0.1 μF GND SDAT SCK SDA 2.2 kΩ2.2 kΩ VDD 2.2 μF 8.2 kΩ Cathode (sensor) Anode 4 VCNL4040 Cathode (LED) VPull_up Baseband 22 Ω
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 17 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RECOMMENDED INFRARED REFLOW Soldering conditions which are based on J-STD-020 C Recommend Normal Solder Reflow is 235 °C to 265 °C Fig. 20 - VCNL4040 Solder Reflow Profile Chart RECOMMENDED STORAGE AND REBAKING CONDITIONS PARAMETER CONDITIONS MIN. MAX. UNIT Storage temperature 5 50 °C Relative humidity 60 % Open time 168 h Total time From the date code on the aluminized envelope (unopened) 12 months Rebaking Tape and Reel: 60 °C 22 h Tube: 60 °C 22 h IR REFLOW PROFILE CONDITION PARAMETER CONDITIONS TEMPERATURE TIME Peak temperature 260 °C + 5 °C / - 5 °C (max.: 265 °C) 10 s Preheat temperature range and timing 150 °C to 200 °C 60 s to 180 s Timing within 5 °C to peak temperature 10 s to 30 s Timing maintained above temperature / time 217 °C 60 s to 150 s Timing from 25 °C to peak temperature 8 minutes (max.) Ramp-up rate 3 °C/s (max.) Ramp-down rate 6 °C/s (max.) 200 150 217 260 Max. Temperature 260+5/-50C / 10 seconds Soldering Zone 60-150 seconds Temperature (ºC) Time (second)t2t1 Ramp-up Rate 3 0C / seconds (max) Ramp-down Rate 6 0C / seconds (max) Ramp-up Rate 3 0C / seconds (max) Pre-Heating Time t2 -t 1 = 60 - 180 secons
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 18 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RECOMMENDED IRON TIP SOLDERING CONDITION AND WARNING HANDLING 1. Solder the device with the following conditions: 1.1.Soldering temperature: 400 °C (max.) 1.2.Soldering time: 3 s (max.) 2. If the temperature of the method portion rises in addition to the re sidual stress between the le ads, the possibility that an open or short circuit occurs due to the deformation or destruction of the resin increases. 3. The following methods: VPS and wave soldering, have not been suggested for the component assembly. 4. Cleaning method conditions: 4.1. Solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol 4.2.Solvent temperature < 45 °C (max.) 4.3.Time: 3 minutes (min.) TAPE PACKAGING INFORMATION in millimeters
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 19 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TAPE PACKAGING INFORMATION (VCNL4040M3OE-H3) in millimeters
www.vishay.com Vishay Semiconductors Rev. 1.7, 04-Nov-2020 20 Document Number: 84274 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TAPE PACKAGING INFORMATION (VCNL4040M3OE-H5) in millimeters
Footprint and Schematic Information www.vishay.com Vishay Semiconductors Rev. 1.0, 05-Oct-16 1 Document Number: 84396 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Footprint and Schematic Information for VCNL4040 The footprint and schematic symbols for the following parts can be accessed using the link to the SnapEDA website. They are available in Eagle, Altium, KiCad, OrCAD / Allegro, Pulsonix, and PADS. Note that the 3D models for these parts can be found on the Vishay product page. The links are included here for convenience. For technical issues and product support, please contact sensorstechsupport@vishay.com PART NUMBER FOOTPRINT / SCHEMATIC 3D MODEL VCNL4040-M30E-H3 www.snapeda.com/parts/VCNL4040M3OE-H3/Vishay/view-part/ - VCNL4040-M30E-H5 www.snapeda.com/parts/VCNL4040M3OE-H5/Vishay/view-part/ - VCNL4040-M30E www.snapeda.com/parts/VCNL4040M3OE/Vishay/view-part/ www.vishay.com/doc?84352
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