VCA822

VCA822 Wideband, > 40-dB Gain Adjust Range, Linear in V/V Variable Gain Amplifier datasheet (Rev. D)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SBOS343,D]
• PDF pages: 50

Technical content

/c45 24 Frequency□(Hz) Gain□(dB) 1M 1G /c45 21 /c45 3 100M10M /c45 18 /c45 15 /c45 12 /c45 9 /c45 6 Initial□Frequency□Response of□VCA822□with□RC□Load Equalized□Frequency Response R =□75 C =□100pF /c87L F RF +VIN RG+ RG/c45 /c45 VIN FB RS 20/c87 VIN1 VCA822RG RS VIN2 RL CL VOUT Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community VCA822 SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 VCA822Wideband,>40-dBGainAdjustRange,LinearinV/V VariableGainAmplifier

1 Features 3 Description

The VCA822 device is a DC-coupled, wideband, 1• 150-MHz Small-Signal Bandwidth linear in V/V, continuously variable, voltage-controlled(G = +10 V/V) gain amplifier. It provides a differential input to single-• 137 MHz, 5 VPP Bandwidth (G = +10 V/V) ended conversion with a high-impedance gain control

• 0.1-dB Gain Flatness to 28 MHz input used to vary the gain down 40dB from the nominal maximum gain set by the gain resistor (RG)• 1700 V/μs Slew Rate and feedback resistor (RF).• > 40-dB Gain Adjust Range The internal architecture of the VCA822 device• High Gain Accuracy: 20 dB ±0.3 dB consists of two input buffers and an output current• High Output Current: ±160 mA feedback amplifier stage integrated with a multiplier core to provide a complete variable gain amplifier

2 Applications (VGA) system that does not require external

buffering. The maximum gain is set externally with• Differential Line Receivers two resistors, providing flexibility in designs. The• Differential Equalizers maximum gain is intended to be set between +2 V/V

• Pulse Amplitude Compensation and +100 V/V. Operating from ±5-V supplies, the gain control voltage for the VCA822 device adjusts the• Variable Attenuators gain linearly in V/V as the control voltage varies from• Voltage-Tunable Active Filters +1 V to 1 V. For example, set for a maximum gain of• Drop-In Upgrade to LMH6503 +10 V/V, the VCA822 device provides 10 V/V, at 1-V input, to 0.1 V/V at –1 V input of gain control range. The VCA822 device offers excellent gain linearity. For a 20-dB maximum gain and a gain- control input voltage varying between 0 V and 1 V, the gain does not deviate by more than ±0.3 dB (maximum at +25°C). Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SOIC (14) 8.65 mm × 3.91 mm VCA822 VSSOP (10) 3.00 mm × 3.00 mm (1) For more information, see Mechanical Packaging and Orderable Information. Differential Equalizer Differential Equalization of an RC Load An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 www.ti.com Table of Contents

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (December 2008) to Revision D Page

• Added Pin Configuration and Functions section, ESD Ratings table, Recommended Operating Conditions table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Changes from Revision B (August 2008) to Revision C Page Changes from Revision A (October 2007) to Revision B Page
• Changed storage temperature range rating in Absolute Maximum Ratings table from –40°C to +125°C to –65°C to Changes from Original (September 2007) to Revision A Page
• Changed Figure 7, the title of Figure 8, the title of Figure 9, the title of Figure 10, and Figure 11 in the ±5V, DC and
• Changed Figure 78, Figure 18, Figure 20, Figure 22, and Figure 27 in the ±5V, AVMAX = +2V/V Typical

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• Changed 2200V/μs to 1700V/μs in first paragraph of the Wideband Variable Gain Amplifier Operation Application Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: VCA822

+VCC NC FB GND V OUT VREF /c45VCC +VCC VG +VIN +RG /c45RG /c45VIN /c45VCC GND V OUT /c45VCC /c45VIN /c45RG FB +VCC VG +VIN +RG VCA822 SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 www.ti.com

5 Device Comparison Table

GAIN ADJUST RANGE INPUT NOISESINGLES DUALS SIGNAL BANDWIDTH (MHz)(dB) (nV/√Hz) VCA810 — 80 2.4 35 — VCA2612 45 1.25 80 — VCA2613 45 1 80 — VCA2615 52 0.8 50 — VCA2617 48 4.1 50 VCA820 — 40 8.2 150 VCA821 — 40 7.0 420 VCA822 — 40 8.2 150 VCA824 — 40 7.0 420

6 Pin Configuration and Functions

D Package DGS Package14-Pin SOIC 10-Pin VSSOPTop View Top View NC = No Connection Pin Functions PIN I/O DESCRIPTION NAME SOIC VSSOP FB 12 1 I Feedback Resistor Input GND 11 10 — Ground NC 13 — — No Connect +RG 4 5 I Gain Set Resistor –RG 5 6 I Gain Set Resistor –VCC 7, 8 8 P Negative Supply +VCC 1, 14 2 P Positive Supply VG 2 3 I Gain Control –VIN 6 7 I Inverting Input +VIN 3 4 I Noninverting Input VOUT 10 9 O Output VREF 9 — I Output Voltage Reference

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7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range, unless otherwise noted.(1) MIN MAX UNIT Power supply ±6.5 V Internal power dissipation See Thermal Information Input voltage ±VS V Lead temperature (soldering, 10 s) 260 °C Junction temperature (TJ) 150 °C Junction temperature (TJ), maximum continuous operation 140 °C Storage temperature –65 125 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 V Machine model (MM) ±200 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Operating voltage 7 10 12 V Operating temperature –40 25 85 °C

7.4 Thermal Information

THERMAL METRIC(1) D [SOIC] DGS [VSSOP] UNIT

14 PINS 10 PINS

RθJA Junction-to-ambient thermal resistance 90.3 173.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 49.8 46.6 °C/W RθJB Junction-to-board thermal resistance 44.9 94.3 °C/W ψJT Junction-to-top characterization parameter 13.8 2.2 °C/W ψJB Junction-to-board characterization parameter 44.6 92.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: VCA822

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7.5 Electrical Characteristics: VS = ±5 V

At AVMAX = +10 V/V, RF = 1 kΩ, RG = 200 Ω, and RL = 100 Ω, 25°C, unless otherwise noted. TESTPARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1) AC PERFORMANCE AVMAX = +2V/V, VO = 1 VPP, VG = 1 V 168 MHz C Small-signal bandwidth (SOIC-14 AVMAX = +10V/V, VO = 1 VPP, VG = 1 V 150 MHz CPackage) AVMAX = +100V/V, VO = 1 VPP, VG = 1 V 118 MHz C Large-signal bandwidth AVMAX = +10V/V, VO = 5VPP, VG = 1 V 137 MHz C 25°C(2) 170 200 Gain control bandwidth VG = 0VDC + 10 mVPP 0°C to 70°C(3) 170 MHz B Bandwidth for 0.1dB flatness AVMAX = +10V/V, VO = 1VPP, VG = 1 V 28 MHz C 25°C(2) 1500 1700 AVMAX = +10V/V, VO = 5-V Step, VG = 1Slew rate 0°C to 70°C(3) 1500 V/μs BV 25°C(2) 2.5 3.1 AVMAX = +10V/V, VO = 5-V Step, VG = 1Rise-and-fall time 0°C to 70°C(3) 3.2 ns BV Settling time to 0.01% AVMAX = +10V/V, VO = 5V Step, VG = 1 V 11 ns C 25°C(2) –60 –62 Harmonic distortion, 2nd-harmonic VO = 2VPP, f = 20MHz, VG = 1 V 0°C to 70°C(3) –60 dBc B 25°C(2) –66 –68 Harmonic distortion, 3rd-harmonic VO = 2VPP, f = 20MHz, VG = 1 V 0°C to 70°C(3) –66 dBc B Input voltage noise f > 100kHz, VG = 1 V 8.2 nV/√Hz C Input current noise f > 100kHz, VG = 1 V 2.6 pA/√Hz C GAIN CONTROL 25°C(2) ±0.1 ±0.4 Absolute gain error AVMAX = +10V/V, VG = 1 V 0°C to 70°C(3) ±0.5 dB A 25°C(2) ±0.05 ±0.3 Gain deviation AVMAX = +10V/V, 0 < VG < 1 V 0°C to 70°C(3) ±0.34 dB A 25°C(2) ±1.06 ±1.9 Gain deviation AVMAX = +10V/V, –0.8 < VG < 1 V 0°C to 70°C(3) ±2.1 dB A 25°C(2) –26 –24 Gain at VG = –0.9V Relative to maximum gain 0°C to 70°C(3) –24 dB A 25°C(2) 22 30 Gain control bias current VG = 0 V 0°C to 70°C(3) 35 μA A Average gain control bias current drift VG = 0 V nA/°C B Gain control input impedance 70 || 1 kΩ || pF C DC PERFORMANCE 25°C(2) ±4 ±17 Input offset voltage AVMAX = +10V/V, VCM = 0 V, VG = 0 V 0°C to 70°C(3) ±17.8 mV A 0°C to 70°C(3) ±30 Average input offset voltage drift AVMAX = +10V/V, VCM = 0 V, VG = 0 V μV/°C B (1) Test levels: (A) 100% tested at 25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (2) Junction temperature = ambient for +25°C tested specifications. (3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over temperature specifications.

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Product Folder Links: VCA822

www.ti.com SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 Electrical Characteristics: VS = ±5 V (continued) At AVMAX = +10 V/V, RF = 1 kΩ, RG = 200 Ω, and RL = 100 Ω, 25°C, unless otherwise noted. TESTPARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1) 25°C(2) 19 25 Input bias current AVMAX = +10V/V, VCM = 0 V, VG = 0 V 0°C to 70°C(3) 29 μA A 0°C to 70°C(3) ±90 Average input bias current drift AVMAX = +10V/V, VCM = 0 V, VG = 0 V nA/°C B 25°C(2) ±0.5 ±2.5 Input offset current AVMAX = +10V/V, VCM = 0 V, VG = 0 V 0°C to 70°C(3) ±3.2 μA A 0°C to 70°C(3) ±16 Average input offset current drift AVMAX = +10V/V, VCM = 0 V, VG = 0 V nA/°C B 25°C(2) ±2.6 ±2.55 Maximum current through gainIRG MAX 0°C to 70°C(3) ±2.55 mA Bresistance INPUT 25°C(2) +1.6 +1.6 Most positive input voltage RL = 100Ω 0°C to 70°C(3) +1.6 V A 25°C(2) –2.1 –2.1 Most negative input voltage RL = 100Ω 0°C to 70°C(3) –2.1 V A 25°C(2) 65 80 Common-mode rejection ratio VCM = ±0.5V 0°C to 70°C(3) 60 dB A Input impedance, differential 0.5 || 1 MΩ || pF C Input impedance, common-mode 0.5 || 2 MΩ || pF C OUTPUT 25°C(2) ±3.8 ±4.0 RL = 1kΩ 0°C to 70°C(3) ±3.75 V A Output voltage swing 25°C(2) ±3.7 ±3.9 RL = 100Ω 0°C to 70°C(3) ±3.6 V A 25°C(2) ±140 ±160 Output current VO = 0V, RL = 5Ω 0°C to 70°C(3) ±130 mA A Output impedance AVMAX = +10V/V, f > 100kHz, VG = 1V 0.01 Ω C POWER SUPPLY Specified operating voltage ±5 V C Minimum operating voltage ±3.5 V C 25°C(2) Maximum operating voltage 0°C to 70°C(3) V A –40°C to +85°C(3) 25°C(2) 36 37 Maximum quiescent current VG = 0V 0°C to 70°C(3) 37.5 mA A 25°C(2) 36 34.5 Minimum quiescent current VG = 0V 0°C to 70°C(3) 34 mA A 25°C(2) –61 –68 –PSRR Power-supply rejection ratio VG = +1V 0°C to 70°C(3) –59 dB A Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: VCA822

SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 www.ti.com Electrical Characteristics: VS = ±5 V (continued) At AVMAX = +10 V/V, RF = 1 kΩ, RG = 200 Ω, and RL = 100 Ω, 25°C, unless otherwise noted. TESTPARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1) THERMAL CHARACTERISTICS Specified operating range, D package –40 to +85 °C C MSOP-10 (DGS) 130 °C/W CJunction-to-ambient ThermalθJA resistance SOIC-14 (D) 80 °C/W C

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Product Folder Links: VCA822

7.6 Typical Characteristics: VS = ±5 V, DC Parameters

At TA = 25°C, RL = 100 Ω, VG = 1 V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. Figure 1. Maximum Differential Input Voltage vs RG Figure 2. Maximum Gain Adjust Range vs RF Figure 4. Gain Error Band vsFigure 3. Maximum Gain Adjust Range vs Figure 5. Gain Error Band vs Figure 6. Gain Error Band vs

NOTE: 3dB□bandwidth□varies□with□package□type. See□the section□for□more□details.

7.7 Typical Characteristics: VS = ±5 V, DC and Power-Supply Parameters

At TA = +25°C, RL = 100 Ω, VG = +1 V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted. Figure 8. Supply Current vs Control VoltageFigure 7. Recommended RF vs AVMAX Figure 9. Supply Current vs Control Voltage Figure 10. Supply Current vs Control Voltage Figure 11. Typical DC Drift vs Temperature

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7.8 Typical Characteristics: VS = ±5 V, AVMAX = +2 V/V

SOIC-14 package, unless otherwise noted. Figure 13. Small-Signal Pulse ResponseFigure 12. Large-Signal Frequency Response Figure 15. Composite Video dG/dPFigure 14. Large-Signal Pulse Response Figure 16. Gain Flatness, Deviation From Linear Phase Figure 17. Harmonic Distortion vs Frequency

SOIC-14 package, unless otherwise noted. Figure 18. Harmonic Distortion vs Load Resistance Figure 19. Harmonic Distortion vs Figure 20. Harmonic Distortion vs Figure 21. Two-Tone, Third-Order Figure 22. Two-Tone, Third-Order Intermodulation Intercept Figure 23. Gain Control Frequency Response

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SOIC-14 package, unless otherwise noted. Figure 30. Output Voltage Noise Density Figure 31. Input Current Noise Density

7.9 Typical Characteristics: VS = ±5 V, AVMAX = +10 V/V

Figure 33. Large-Signal Frequency ResponseFigure 32. Small-Signal Frequency Response Figure 34. Small-Signal Pulse Response Figure 35. Large-Signal Pulse Response

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Figure 43. Two-Tone, Third-Order Intermodulation InterceptFigure 42. Two-Tone, Third-Order Figure 44. Gain vs Gain Control Voltage Figure 45. Gain Control Frequency Response Figure 47. Output Voltage and Current LimitationsFigure 46. Gain Control Pulse Response

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7.10 Typical Characteristics: VS = ±5 V, AVMAX = +100 V/V

SOIC-14 package, unless otherwise noted. Figure 54. Large-Signal Frequency ResponseFigure 53. Small-Signal Frequency Response Figure 55. Small-Signal Pulse Response Figure 56. Large-Signal Pulse Response Figure 57. Gain Flatness Figure 58. Output Voltage Noise Density

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SOIC-14 package, unless otherwise noted. Figure 66. Gain Control Frequency ResponseFigure 65. Gain vs Gain Control Voltage Figure 68. Fully-Attenuated ResponseFigure 67. Gain Control Pulse Response Figure 69. IRG Limited Overdrive Recovery Figure 70. Output Limited Overdrive Recovery

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SOIC-14 package, unless otherwise noted. Figure 71. Group Delay vs Gain Control Voltage Figure 72. Group Delay vs Frequency

8 Parameter Measurement Information

Figure 73. Test Circuit

I =RG VOUT A R /c180VMAX G VCA822 SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 www.ti.com

9 Detailed Description

9.1 Overview

The VCA822 is a voltage controlled variable gain amplifier with differential inputs and a single ended output. The maximum gain is set by external resistors while the gain range is controlled by an external analog voltage. The maximum gain is designed for gains of 2 V/V up to 100 V/V and the analog control allows a gain range of over 40 dB. The VCA822 input consists of two buffers which together create a fully symmetrical, high impedance differential input with a typical common mode rejection of 80 dB. The gain set resistor is connected between the two input buffer output pins, so that the input impedance is independent of the gain settings. The bipolar inputs have a input voltage range of +1.6 and –2.1 V on ±5 V supplies. The amplifier maximum gain is set by external resistors, but the internal gain control circuit is controlled by a continuously variable, analog voltage. The gain control is a multiplier stage which is linear in V/V. The gain control input pin operates over a 2-V voltage range (–1 V to +1 V). The VCA822 contains a high speed, high current output buffer. The output stage can typically swing ±3.9 V and source/sink ±160 mA. The VCA822 can be operated over a voltage range of ±3.5 V to ±6 V.

9.2 Feature Description

The VCA822 can be operated with both single ended or differential input signals. The inputs present consistently high impedance across all gain configurations. By using an analog control signal the amplifier gain is continuously variable for smooth, glitch free gain changes. With a large signal bandwidth of 137 Mhz and a slew rate of 1700 V/us the VCA822 offers linear performance over a wide range of signal amplitudes and gain settings. The low impedance/high current output buffer can drive loads ranging from low impedance transmission lines to high-impedance, switched-capacitor analog to digital converters. By using closely matched internal components the VCA822 offers a typical gain accuracy of ±0.1 dB.

9.3 Device Functional Modes

The VCA822 functions as a differential input, single-ended output variable gain amplifier. This functional mode is enabled by applying power to the amplifier supply pins and is disabled by turning the power off. The gain is continuously variable through the analog gain control input. While the gain range is fixed the maximum gain is set by two external components, Rf and Rg as shown in the Parameter Measurement Information. The maximum gain is equal to 2x (Rf / Rg). This gain is achieved with a 2-V voltage on the gain adjust pin VG. As the voltage decreases on the VG pin, the gain decreases in a linear in dB fashion with over 40 dB of gain range from 2-V to 0-V control voltage. As with most other differential input amplifiers, inputs can be applied to either one or both of the amplifier inputs. The amplifier gain is controlled through the gain control pin.

9.3.1 Maximum Gain of Operation

This section describes the use of the VCA822 device in a fixed-gain application in which the VG control pin is set at VG = +1 V. The tradeoffs described here are with bandwidth, gain, and output voltage range. In the case of an application that does not make use of the VGAIN, but requires some other characteristic of the VCA822, the RG resistor must be set such that the maximum current flowing through the resistance IRG is less than ±2.6 mA typical, or 5.2 mAPP as defined in Electrical Characteristics: VS = ±5 V, and must follow Equation 1. (1) As demonstrated by Equation 1, when the output dynamic range and maximum gain are defined, the gain resistor is set. This gain setting in turn affects the bandwidth because in order to achieve the gain (and with a set gain element), the feedback element of the output stage amplifier is set as well. Keeping in mind that the output amplifier of the VCA822 device is a current-feedback amplifier, the larger the feedback element, the lower the bandwidth as the feedback resistor is the compensation element. Limiting the discussion to the input voltage only and ignoring the output voltage and gain, Figure 1 illustrates the tradeoff between the input voltage and the current flowing through the gain resistor.

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R =GMIN =□615.4/c87 3.2VPP 5.2mAPP V =□R I /c180IN(PP) RG(PP)G VCA822 www.ti.com SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 Device Functional Modes (continued)

9.3.2 Output Current and Voltage

The VCA822 device provides output voltage and current capabilities that are unsurpassed in a low-cost monolithic VCA. Under no-load conditions at +25°C, the output voltage typically swings closer than 1 V to either supply rails; the +25°C swing limit is within 1.2 V of either rails. Into a 15-Ω load (the minimum tested load), it is tested to deliver more than ±160 mA. The specifications described previously, though familiar in the industry, consider voltage and current limits separately. In many applications, it is the voltage × current, or V-I product, that is more relevant to circuit operation. Refer to the Output Voltage and Current Limitations plot (Figure 47) in the Typical Characteristics section. The X-axis and Y-axis of this graph show the zero-voltage output current limit and the zero-current output voltage limit, respectively. The four quadrants give a more detailed view of the VCA822 device output drive capabilities, noting that the graph is bounded by a Safe Operating Area of 1-W maximum internal power dissipation. Superimposing resistor load lines onto the plot shows that the VCA822 device can drive ±2.5 V into 25 Ω or ±3.5 V into 50 Ω without exceeding the output capabilities or the 1 W dissipation limit. A 100-Ω load line (the standard test circuit load) shows the full ±3.9 V output swing capability, as shown in the Typical Characteristics. The minimum specified output voltage and current over-temperature are set by worst-case simulations at the cold temperature extreme. Only at cold start-up do the output current and voltage decrease to the numbers shown in Electrical Characteristics: VS = ±5 V. As the output transistors deliver power, the respective junction temperatures increase, increasing the available output voltage swing, and increasing the available output current. In steady-state operation, the available output voltage and current is always greater than that temperature shown in the over-temperature specifications because the output stage junction temperatures are higher than the specified operating ambient.

9.3.3 Input Voltage Dynamic Range

The VCA822 device has a input dynamic range limited to +1.6 V and –2.1 V. Increasing the input voltage dynamic range can be done by using an attenuator network on the input. If the VCA822 device is trying to regulate the amplitude at the output, such as in an AGC application, the input voltage dynamic range is directly proportional to Equation 2. (2) As such, for unity-gain or under-attenuated conditions, the input voltage must be limited to the CMIR of ±1.6 V (3.2 VPP) and the current (IRQ) must flow through the gain resistor, ±2.6 mA (5.2 mAPP). This configuration sets a minimum value for RE such that the gain resistor has to be greater than Equation 3. (3) Values lower than 615.4Ω are gain elements that result in reduced input range, as the dynamic input range is limited by the current flowing through the gain resistor RG (IRG). If the IRG current is limiting the performance of the circuit, the input stage of the VCA822 device goes into overdrive, resulting in limited output voltage range. Such IRG-limited overdrive conditions are shown in Figure 49 for the gain of +10 V/V and Figure 69 for the +100 V/V gain.

9.3.4 Output Voltage Dynamic Range

With its large output current capability and its wide output voltage swing of ±3.9-V typical on a 100-Ω load, it is easy to forget other types of limitations that the VCA822 device can encounter. For these limitations, careful analysis must be done to avoid input stage limitation, either voltage or IRG current; also, consider the gain limitation, as the control pin VG varies, affecting other aspects of the circuit.

9.3.5 Bandwidth

The output stage of the VCA822 device is a wideband current-feedback amplifier. As such, the feedback resistance is the compensation of the last stage. Reducing the feedback element and maintaining the gain constant limits the useful range of IRG, and therefore reducing the gain adjust range. For a given gain, reducing the gain element limits the maximum achievable output voltage swing. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: VCA822

9.3.6 Offset Adjustment

stage compensation, set VG = –1 V to eliminate all offset contribution of the input stage and multiplier core. multiplier core, some residual output offset voltage remains.

9.3.7 Noise

This model is formulated in Equation 4 and Figure 90. noise terms, please contact the High-Speed Product Application Support team at www.ti.com.

9.3.8 Input and ESD Protection

Figure 74. Internal ESD Protection

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validate and test their design implementation to confirm system functionality.

10.1 Application Information

with over 40 dB of gain range from 2-V to 0-V control voltage.

10.1.1 Design-In Tools

10.1.1.1 Demonstration Boards

delivered with a user's guide. The summary information for these fixtures is shown in Table 1. Table 1. EVM Ordering Information The demonstration fixtures can be requested at the TI's web site through the VCA822 device product folder.

10.1.1.2 Macromodels and Applications Support

the relevant product data sheet.

10.1.1.3 Operating Suggestions

• VS = ±5 V DC Parameters and VS = ±5 V DC and Power-Supply Parameters, which include dc operation and the intrinsic limitation of a VCA822 device design
• VS = ± 5 V, AVMAX = +2 V/V Gain of +2V/V Operation
• VS = ±5 V, AVMAX = +10 V/V Gain of +10V/V Operation
• VS = ±5 V, AVMAX = +100 V/V Gain of +100V/V Operation Where the Typical Characteristics describe the actual performance that can be achieved by using the amplifier properly, the following sections describe in detail the trade-offs needed to achieve this level of performance. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Links: VCA822

10.1.1.4 Package Considerations

in Electrical Characteristics: VS = ±5 V. SOIC-14 and MSOP-10 package. Table 2. SOIC-14 and MSOP-10 RF and RG Configurations There are no differences between the packages in the recommended values for the gain and feedback resistors. V/V, as can be seen in Figure 75 and Figure 76. The scale must be changed to a linear scale to view the details. Figure 75. SOIC-14 Recommended RF and RG vs AVMAX Figure 76. MSOP-10 Recommended RF and RG vs AVMAX

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0.1 F/c109

10.2 Typical Applications

10.2.1 Wideband Variable Gain Amplifier Operation Application

Figure 77. DC-Coupled, AVMAX = +10 V/V, Bipolar Supply Specification and Test Circuit

10.2.1.1 Design Requirements

requires a maximum gain of 10 V/V and low noise.

10.2.1.2 Detailed Design Procedure

places the transconductance element between two input buffers, using the output currents as the forward signal. total effective load is 100 Ω ∥ 1 kΩ.

distortion reported in Electrical Characteristics: VS = ±5 V. More information on how the VCA822 device operates can be found in the Operating Suggestions section.

10.2.1.3 Application Curve

Figure 79. Gain vs Gain Control VoltageFigure 78. Small-Signal Frequency Response

10.2.2 Four-Quadrant Multiplier Application

Figure 80. Four-Quadrant Multiplier Circuit

10.2.2.1 Design Requirements

quadrant operation both positive and negative inputs must be supported on the X and Y inputs.

10.2.2.2 Detailed Design Procedure

VIN, the transfer function depends upon both VIN and VG, as shown in Equation 5.

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depends on both VG and VIN. VOUT then follows Equation 6. varying the VG voltage (100kHz, 2VPP) gives the modulated output voltage shown in Figure 81.

10.2.2.3 Application Curves

Figure 81. Modulated Output Signal of the Four-Quadrant Multiplexer Circuit

10.2.3 Difference Amplifier Application

Figure 82. Difference Amplifier

10.2.3.1 Design Requirements

load drive capability. This circuit delivers differential gain of 2* (Rf/Rg), and CMRR as shown in Figure 83.

10.2.3.2 Detailed Design Procedure

10.2.3.3 Application Curve

Figure 83. Common-Mode Rejection Ratio

10.2.4 Differential Equalizer Application

Figure 84. Differential Equalizer

10.2.4.1 Design Requirements

stages can be added as shown in Figure 85.

10.2.4.2 Detailed Design Procedure

equalized frequency response are shown in Figure 85.

30 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

75 Load/c87

10.2.4.3 Application Curve

Figure 85. Differential Equalization of an RC Load

10.2.5 Differential Cable Equalizer Application

Figure 86. Differential Cable Equalizer

10.2.5.1 Design Requirements

Figure 84, but is much more accurate in replicating the 1/(sqrt(f)) frequency response shape.

10.2.5.2 Detailed Design Procedure

Figure 87. This implementation has a maximum error of 0.2dB from dc to 40MHz.

10.2.5.3 Application Curve

Figure 87. Cable Attenuation versus Equalizer Gain

10.2.6 Voltage-Controlled Low-Pass Filter Application

Figure 88. Voltage-Control Low-Pass Filter

10.2.6.1 Design Requirements

the VCA822 to provide an electronically controlled cutoff frequency.

10.2.6.2 Detailed Design Procedure

32 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

2 R C/c1122

OPA690 to +2 V/V, ensuring stability and providing flat frequency response. take into consideration the open-loop gain limitation of the OPA690. < +0.8 V, as shown in Figure 89.

10.2.6.3 Application Curve

Figure 89. VCA822 as a Voltage-Control, Low-Pass Filter

10.3 System Examples

Figure 90. Simple Noise Model Figure 91. Adjusting the Input and Output Voltage Sources

34 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

Figure 92. Full Noise Model

SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 www.ti.com

11 Power Supply Recommendations

High-speed amplifiers require low inductance power supply traces and low ESR bypass capacitors. The power supply voltage should be centered on the desired amplifier output voltage, so for ground referenced output signals, split supplies are required. The power supply voltage should be from 7 V to 12 V.

12 Layout

12.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier such as the VCA822 device requires careful attention to printed circuit board (PCB) layout parasitics and external component types. Recommendations to optimize performance include: a. Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. This recommendation includes the ground pin (pin 2). Parasitic capacitance on the output can cause instability: on both the inverting input and the noninverting input, it can react with the source impedance to cause unintentional band limiting. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. Place a small series resistance (greater than 25 Ω) with the input pin connected to ground to help decouple package parasitics. b. Minimize the distance (less than 0.25”) from the power-supply pins to high-frequency 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. Larger (2.2-μF to 6.8-μF) decoupling capacitors, effective at lower frequencies, should also be used on the main supply pins. These capacitors may be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB. c. Careful selection and placement of external components preserve the high-frequency performance of the VCA822. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high- frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wire- wound type resistors in a high-frequency application. Because the output pin is the most sensitive to parasitic capacitance, always position the series output resistor, if any, as close as possible to the output pin. Other network components, such as inverting or non-inverting input termination resistors, should also be placed close to the package. d. Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils, or 1.27 mm to 2.54 mm) should be used, preferably with ground and power planes opened up around them. e. Socketing a high-speed part like the VCA822 device is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the VCA822 device onto the board.

36 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

Product Folder Links: VCA822

12.2 Layout Example

Figure 93. Layout Recommendation

12.3 Thermal Considerations

the maximum junction temperature be allowed to exceed +150°C. Operating junction temperature (TJ) is given by Equation 12. operating at maximum gain and at the maximum specified ambient temperature of +85°C. is beyond the output voltage range for the VCA822 device.

SBOS343D –SEPTEMBER 2007–REVISED OCTOBER 2015 www.ti.com

13 Device and Documentation Support

13.1 Device Support

13.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

13.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

13.3 Trademarks

E2E is a trademark of Texas Instruments. X2Y is a registered trademark of X2Y ATTENUATORS, LLC . All other trademarks are the property of their respective owners.

13.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

13.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

38 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated

Product Folder Links: VCA822

www.ti.com 10-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) VCA822ID Active Production SOIC (D) | 14 50 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 VCA822ID VCA822ID.A Active Production SOIC (D) | 14 50 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 VCA822ID VCA822IDGST Active Production VSSOP (DGS) | 10 250 | SMALL T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 85 BOS VCA822IDGST.A Active Production VSSOP (DGS) | 10 250 | SMALL T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 85 BOS VCA822IDR Active Production SOIC (D) | 14 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 VCA822ID VCA822IDR.A Active Production SOIC (D) | 14 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 VCA822ID VCA822IDRG4 Active Production SOIC (D) | 14 2500 | LARGE T&R - Call TI Call TI -40 to 85 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 10-Nov-2025 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) VCA822IDR SOIC D 14 2500 353.0 353.0 32.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) VCA822ID D SOIC 14 50 506.6 8 3940 4.32 VCA822ID.A D SOIC 14 50 506.6 8 3940 4.32 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C TYP6.2 5.8

1.75 MAX

12X 1.27 14X 0.51 0.31 7.62 TYP0.25 0.13 0 - 8 0.25 0.10 0.25 GAGE PLANE 1.27 0.40 A NOTE 3 8.75 8.55 B NOTE 4 4.0 3.8 4220718/A 09/2016 SOIC - 1.75 mm max heightD0014A SMALL OUTLINE INTEGRATED CIRCUIT NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm, per side. 5. Reference JEDEC registration MS-012, variation AB. 1 14

0.25 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 1.800

www.ti.com EXAMPLE BOARD LAYOUT (5.4)

0.07 MAX

0.07 MIN

14X (1.55) 14X (0.6) 12X (1.27) (R0.05) TYP 4220718/A 09/2016 SOIC - 1.75 mm max heightD0014A SMALL OUTLINE INTEGRATED CIRCUIT SYMM SYMM LAND PATTERN EXAMPLE SCALE:8X 7 8 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (5.4) 12X (1.27) 14X (0.6) 14X (1.55) 4220718/A 09/2016 SOIC - 1.75 mm max heightD0014A SMALL OUTLINE INTEGRATED CIRCUIT NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 7 8 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:8X

www.ti.com PACKAGE OUTLINE C TYP5.05 4.75

1.1 MAX

8X 0.5 10X 0.27 0.17 0.15 0.05 TYP0.23 0.13 0 - 8 0.25 GAGE PLANE 0.7 0.4 A NOTE 3 3.1 2.9 B NOTE 4 3.1 2.9 4221984/A 05/2015 VSSOP - 1.1 mm max heightDGS0010A SMALL OUTLINE PACKAGE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187, variation BA.

0.1 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 3.200

www.ti.com EXAMPLE BOARD LAYOUT (4.4)

0.05 MAX

0.05 MIN

10X (1.45) 10X (0.3) 8X (0.5) (R ) TYP 0.05 4221984/A 05/2015 VSSOP - 1.1 mm max heightDGS0010A SMALL OUTLINE PACKAGE SYMM SYMM LAND PATTERN EXAMPLE SCALE:10X 5 6 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (4.4) 8X (0.5) 10X (0.3) 10X (1.45) (R ) TYP0.05 4221984/A 05/2015 VSSOP - 1.1 mm max heightDGS0010A SMALL OUTLINE PACKAGE NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 5 6 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X

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