VCA2613

VCA2613 TI1 | Alldatasheet

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G LOW NOISE PREAMP: Low Input Noise: 1.0nV/√Hz Active Termination Noise Reduction Switchable Termination Value 80MHz Bandwidth 5dB to 25dB Gain Differential In and Out G LOW NOISE VARIABLE GAIN AMPLIFIER: Low Noise VCA: 3.3nV/√Hz, Differential Programming Optimizes Noise Figure 24dB to 45dB Gain 40MHz Bandwidth Differential In and Out G LOW CROSSTALK: 52dB at Max Gain, 5MHz G HIGH-SPEED VARIABLE GAIN ADJUST G SWITCHABLE EXTERNAL PROCESSING APPLICA TIONS G ULTRASOUND SYSTEMS G WIRELESS RECEIVERS G TEST EQUIPMENT

DESCRIPTION

The VCA2613 is a dual, Low-Noise Preamplifier (LNP), plus low-noise Variable Gain Amplifier (VGA). The combination of Active Termination (AT) and Maximum Gain Select (MGS) allow for the best noise performance. The VCA2613 also features low crosstalk and outstanding distortion perfor- mance. The LNP has differential input and output capability and is strappable for gains of 5dB, 17dB, 22dB or 25dB. Low input impedance is achieved by AT, resulting in as much as a 4.6dB improvement in noise figure over conventional shunt termina- tion. The termination value can also be switched to accommo- date different sources. The output of the LNP is available for external signal processing. The variable gain is controlled by an analog voltage whose gain varies from 0dB to the gain set by the MGS. The ability to program the variable gain also allows the user to optimize dynamic range. The VCA input can be switched from the LNP to external circuits for different applications. The output can be used in either a single-ended or differential mode to drive high-performance Analog-to-Digital (A/D) converters, and is cleanly limited for optimum overdrive recovery. The combination of low noise, gain, and gain range program- mability makes the VCA2613 a versatile building block in a number of applications where noise performance is critical. The VCA2613 is available in a TQFP-48 package. Dual, VARIABLE GAIN AMPLIFIER with Low-Noise Preamp Low Noise Preamp 5dB to 25dB Programmable Gain Amplifier 24 to 45dB Voltage Controlled Attenuator Analog Control Maximum Gain Select RF 2 RF 1 FB FBSW LNP INP LNP INN LNP GS1 LNP GS2 LNP GS3 LNP Gain Set Input LNP OUT P SELVCA INP LNP OUT N VCA INNV C A CNTLFB CNTL VCA OUT P VCA OUT N MGS 0 MGS 1 MGS 2 Maximum Gain Select VCA2613 (1 of 2 Channels) VCA2613 SBOS179D – DECEMBER 2000 – REVISED OCTOBER 2004 www.ti.com PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000-2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.

SBOS179Dwww.ti.com PACKAGE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR MARKING NUMBER MEDIA, QUANTITY VCA2613Y TQFP-48 PFB VCA2613 VCA2613Y/250 Tape and Reel, 250 "" " " VCA2613Y/2K Tape and Reel, 2000 NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PACKAGE/ORDERING INFORMATION (1)

ELECTRICAL CHARACTERISTICS

At TA = +25°C, VDDA = VDDB = VDDR = +5V, load resistance = 500Ω on each output to ground, MGS = 011, LNP = 22dB and fIN = 5MHz, unless otherwise noted. The input to the preamp (LNP) is single-ended, and the output from the VCA is single-ended unless otherwise noted. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. VCA2613Y PARAMETER CONDITIONS MIN TYP MAX UNITS PREAMPLIFIER Input Resistance 600 k Ω Input Capacitance 15 pF Input Bias Current 1n A CMRR f = 1MHz, VCA CNTL = 0.2V 50 dB Maximum Input Voltage Preamp Gain = +5dB 1 V PP Preamp Gain = +25dB 112 mV PP Input Voltage Noise(1) Preamp Gain = +5dB 3.5 nV/ √Hz Preamp Gain = +25dB 1.0 nV/ √Hz Input Current Noise Independent of Gain 0.35 pA/ √Hz Noise Figure, RS = 75Ω , RIN = 75Ω (1) R F = 550Ω , Preamp Gain = 22dB, 6.2 dB PGA Gain = 39dB Bandwidth Gain = 22dB 80 MHz PROGRAMMABLE VARIABLE GAIN AMPLIFIER Peak Input Voltage Differential 2 V PP –3dB Bandwidth 40 MHz Slew Rate 300 V/ µs Output Signal Range R L ≥ 500Ω Each Side to Ground 2 V PP Output Impedance f = 5MHz 1 Ω Output Short-Circuit Current ±40 mA Third Harmonic Distortion f = 5MHz, V OUT = 1VPP , VCACNTL = 3.0V –45 –71 dBc Second Harmonic Distortion f = 5MHz, V OUT = 1VPP , VCACNTL = 3.0V –45 –63 dBc IMD, Two-Tone V OUT = 2VPP , f = 1MHz –80 dBc VOUT = 2VPP , f = 10MHz –80 dBc 1dB Compression Point f = 5MHz, Output Referred, Differential 6 V PP Crosstalk V OUT = 1VPP , f = 1MHz, Max Gain Both Channels –68 dB Group Delay Variation 1MHz < f < 10MHz, Full Gain Range ±2n s DC Output Level, VIN = 0 2.5 V ACCURACY Gain Slope 10.9 dB/V Gain Error ±1(2) dB Output Offset Voltage ±50 mV Total Gain CNTL = 0.2V 18 21 24 dB CNTL = 3.0V 47 50 53 dB GAIN CONTROL INTERFACE Input Voltage (VCACNTL ) Range 0.2 to 3.0 V Input Resistance 1M Ω Response Time 45dB Gain Change, MGS = 111 0.2 µs POWER SUPPLY Operating Temperature Range –40 +85 °C Specified Operating Range 4.75 5.0 5.25 V Power Dissipation Operating, Both Channels 410 495 mW NOTE: (1) For preamp driving VGA. (2) Referenced to best fit dB-linear curve. ABSOLUTE MAXIMUM RATINGS (1) NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

SBOS179D www.ti.com PIN CONFIGURATION VDD B NC NC VCA INNB VCA INPB LNP OUT NB LNP OUT PB SWFBB FBB COMP1B COMP2B LNP INNB GNDA VCA OUT NA VCA OUT PA FBSW CNTL VCA INSEL VCA CNTL MGS 1 MGS 2 MGS 3 VCA OUT PB VCA OUT NB GNDB LNP GS3 A LNP GS2 A LNP GS1 A LNP INPA VDD R VBIAS VCM GNDR LNP INPB LNP GS1 B LNP GS2 B LNP GS3 B VDD A NC NC VCA INNA VCA INPA LNP OUT NA LNP OUT PA SWFBA FBA COMP1A COMP2A LNP INNA 48 47 46 45 44 43 42 41 40 39 38 13 14 15 16 17 18 19 20 21 22 23 VCA2613 1V DD A Channel A +Supply

2 NC Do Not Connect

3 NC Do Not Connect

4 VCA

INNA Channel A VCA Negative Input

5 VCA INPA Channel A VCA Positive Input

6L N P OUT NA Channel A LNP Negative Output 7L N P OUT PA Channel A LNP Positive Output

8 SWFBA Channel A Switched Feedback Output

9 FBA Channel A Feedback Output

10 COMP1A Channel A Frequency Compensation 1

11 COMP2A Channel A Frequency Compensation 2

12 LNP

INNA Channel A LNP Inverting Input

13 LNP GS3 A Channel A LNP Gain Strap 3

14 LNP GS2 A Channel A LNP Gain Strap 2

15 LNP GS1 A Channel A LNP Gain Strap 1

16 LNP INPA Channel A LNP Noninverting Input

17 V DD R +Supply for Internal Reference

18 V BIAS 0.01µF Bypass to Ground 19 V CM 0.01µF Bypass to Ground

20 GNDR Ground for Internal Reference

21 LNP

INPB Channel B LNP Noninverting Input

22 LNP GS1 B Channel B LNP Gain Strap 1

23 LNP GS2 B Channel B LNP Gain Strap 2

24 LNP GS3 B Channel B LNP Gain Strap 3

25 LNP INNB Channel B LNP Inverting Input

26 COMP2B Channel B Frequency Compensation 2

27 COMP1B Channel B Frequency Compensation 1

28 FBB Channel B Feedback Output

29 SWFBB Channel B Switched Feedback Output

30 LNP

OUT PB Channel B LNP Positive Output

31 LNP OUT NB Channel B LNP Negative Output

32 VCA INPB Channel B VCA Positive Input

33 VCA INNB Channel B VCA Negative Input

34 NC Do Not Connect

35 NC Do Not Connect

DD B Channel B +Analog Supply

37 GNDB Channel B Analog Ground

38 VCA

OUT NB Channel B VCA Negative Output

39 VCA OUT PB Channel B VCA Positive Output

40 MGS 3 Maximum Gain Select 3 (LSB)

41 MGS 2 Maximum Gain Select 2

42 MGS 1 Maximum Gain Select 1 (MSB)

43 VCA CNTL VCA Control Voltage

44 VCA INSEL VCA Input Select, HI = External

45 FBSW CNTL Feedback Switch Control: HI = ON

46 VCA OUT PA Channel A VCA Positive Output

47 VCA OUT NA Channel A VCA Negative Output

48 GNDA Channel A Analog Ground

PIN DESIGNATOR DESCRIPTION PIN DESIGNATOR DESCRIPTION PIN DESCRIPTIONS

SBOS179Dwww.ti.com TYPICAL PERFORMANCE CURVES At TA = +25°C, VDDA = VDDB = VDDR = +5V, load resistance = 500Ω on each output to ground, MGS = 011, LNP = 22dB and fIN = 5MHz, unless otherwise noted. The input to the preamp (LNP) is single-ended, and the output from the VCA is single-ended unless otherwise noted. This results in a 6dB reduction in signal amplitude compared to differential operation. GAIN vs VCACNTL VCA CNTL (V) Gain (dB) MGS = 111 MGS = 110 MGS = 101 MGS = 100 MGS = 011 MGS = 010 MGS = 001 MGS = 000 OUTPUT REFERRED NOISE vs VCA CNTL VCA CNTL (V) Noise (nV/√Hz) 2000 1800 1600 1400 1200 1000 800 600 400 200 R S = 50Ω MGS = 111 MGS = 011 VCA CNTL (V) Noise (nV/√Hz) MGS = 111 MGS = 011 INPUT REFERRED NOISE vs VCA CNTL R S = 50Ω R S (Ω ) 10.0 1.0 0.1 1 10 100 1000 Noise (nV/√Hz) INPUT REFERRED NOISE vs R S R S (Ω ) 10 100 1000 Noise Figure (dB) NOISE FIGURE vs RS VCA CNTL (V) Noise Figure (dB) NOISE FIGURE vs VCA CNTL

each circuit block are provided in the following sections. large bias currents required in both input and output stages. the same role for signals on the –IN side. FIGURE 4. Schematic of the Low Noise Preamplifier (LNP). 59µs at the lowest gain (25dB).

SBOS179D www.ti.com LNP GAIN (dB) Input-Referred Output-Referred 25 1.54 2260 22 1.59 1650 17 1.82 1060 5 4.07 597 The LNP is capable of generating a 2VPP differential signal. The maximum signal at the LNP input is therefore 2VPP divided by the LNP gain. An input signal greater than this would exceed the linear range of the LNP, an especially important consideration at low LNP gain settings. ACTIVE FEEDBACK WITH THE LNP One of the key features of the LNP architecture is the ability to employ active-feedback termination to achieve superior noise performance. Active-feedback termination achieves a lower noise figure than conventional shunt termination, es- sentially because no signal current is wasted in the termina- tion resistor itself. Another way to understand this is as follows: Consider first that the input source, at the far end of the signal cable, has a cable-matching source resistance of R S. Using conventional shunt termination at the LNP input, a second terminating resistor of value RS is connected to ground. Therefore, the signal loss is 6dB due to the voltage divider action of the series and shunt RS resistors. The effective source resistance has been reduced by the same factor of 2, but the noise contribution has been reduced by only the √2, only a 3dB reduction. Therefore, the net theoreti- cal SNR degradation is 3dB, assuming a noise-free amplifier input. (In practice, the amplifier noise contribution will de- grade both the unterminated and the terminated noise fig- ures, somewhat reducing the distinction between them.) See Figure 5 for an amplifier using active feedback. This diagram appears very similar to a traditional inverting ampli- fier. However, the analysis is somewhat different because the gain A in this case is not a very large open-loop op amp gain; rather it is the relatively low and controlled gain of the LNP itself. Thus, the impedance at the inverting amplifier terminal will be reduced by a finite amount, as given in the familiar relationship of Equation (3): R R 1AIN F= +( ) where RF is the feedback resistor (supplied externally be- tween the LNPINP and FB terminals for each channel), A is the user-selected gain of the LNP, and RIN is the resulting amplifier input impedance with active feedback. In this case, unlike the conventional termination above, both the signal voltage and the R S noise are attenuated by the same factor It is also possible to create other gain settings by connecting an external resistor between LNPGS1 on one side, and LNPG S2 and/or LNPGS3 on the other. In that case, the internal resistor values shown in Figure 4 should be com- bined with the external resistor to calculate the effective value of R S for use in Equation (1). The resulting expression for external resistor value is given in Equation (2). R RR R R G a i nRR Gain R REXT S L FIX L S FIX S L = +• where REXT is the externally selected resistor value needed to achieve the desired gain setting, RS1 is the fixed parallel resistor in Figure 4, and RFIX is the effective fixed value of the remaining internal resistors: RS2, RS3, or (RS2 || RS3) depend- ing on the pin connections. Note that the best process and temperature stability will be achieved by using the pre-programmed fixed gain options of Table I, since the gain is then set entirely by internal resistor ratios, which are typically accurate to ±0.5%, and track quite well over process and temperature. When combining exter- nal resistors with the internal values to create an effective R S value, note that the internal resistors have a typical tempera- ture coefficient of +700ppm/°C and an absolute value toler- ance of approximately ±5%, yielding somewhat less predict- able and stable gain settings. With or without external resis- tors, the board layout should use short Gain Strap connec- tions to minimize parasitic resistance and inductance effects. The overall noise performance of the VCA2613 will vary as a function of gain. Table II shows the typical input- and output-referred noise densities of the entire VCA2613 for maximum VCA and PGA gain; i.e., VCA CNTL set to 3.0V and all MGS bits set to 1. Note that the input-referred noise values include the contribution of a 50Ω fixed source imped- ance, and are therefore somewhat larger than the intrinsic input noise. As the LNP gain is reduced, the noise contribu- tion from the VCA/PGA portion becomes more significant, resulting in higher input-referred noise. However, the output- referred noise, which is indicative of the overall SNR at that gain setting, is reduced. NOISE (nV/√ Hz) TABLE II. Noise Performance for MGS = 111 and VCACNTL = 3.0V. LNP PIN STRAPPING LNP GAIN (dB) LNPG S1, LNPGS2, LNPGS3 Connected Together 25 LNPG S1 Connected to LNPGS3 22 LNPG S1 Connected to LNPGS2 17 All Pins Open 5 TABLE I. Pin Strappings of the LNP for Various Gains. (3) (2) where RL is the load resistor in the drains of Q3 and Q8, and R S is the resistor connected between the sources of the input transistors Q4 and Q7. The connections for various RS com- binations are brought out to device pins LNPGS1, LNPGS2, and LNPG S3 (pins 13-15 for channel A, 22-24 for channel B). These Gain Strap pins allow the user to establish one of four fixed LNP gain options as shown in Table I. To preserve the low noise performance of the LNP, the user should take care to minimize resistance in the input lead. A parasitic resistance of only 10Ω will contribute 0.4nV/ √Hz .

very low value resistors to maintain good voltage noise. dling at both input and output. R of the RC time constant is approximately 186Ω .

2 C(R )(R )

tance that is a function of the devices shown in Figure 4. that prevents unstable behavior. FIGURE 9. Open-Loop Gain Characteristic of LNP . FIGURE 10. LNP with Compensation Capacitor. FIGURE 11. VCA2613 Input Impedance. will be positive, and there will be no observed instability.

SBOS179Dwww.ti.com The capacitance that is determined in Equation 5 should be added to the capacitance shown in Equation 4 to determine the overall bandwidth of the LNP. The LNP INNA (pin 12) and the LNPINNB (pin 25) should be bypassed to ground by the shortest means possible to avoid any inductance in the lead. LNP OUTPUT BUFFER The differential LNP output is buffered by wideband class AB voltage followers which are designed to drive low impedance loads. This is necessary to maintain LNP gain accuracy, since the VCA input exhibits gain-dependent input imped- ance. The buffers are also useful when the LNP output is brought out to drive external filters or other signal processing circuitry. Good distortion performance is maintained with buffer loads as low as 135Ω . As mentioned previously, the buffer inputs are AC coupled to the LNP outputs with a 3.6kHz high-pass characteristic, and the DC common mode level is maintained at the correct V CM for compatibility with the VCA input. VOLTAGE-CONTROLLED ATTENUATOR (VCA) — DETAIL The VCA is designed to have a dB-linear attenuation charac- teristic, i.e. the gain loss in dB is constant for each equal increment of the VCA CNTL control voltage. See Figure 1 for a block diagram of the VCA. The attenuator is essentially a variable voltage divider consisting of one series input resistor, R S, and ten identical shunt FETs, placed in parallel and controlled by sequentially activated clipping amplifiers. Each clipping amplifier can be thought of as a specialized voltage comparator with a soft transfer character- istic and well-controlled output limit voltages. The reference voltages V1 through V10 are equally spaced over the 0V to 3.0V control voltage range. As the control voltage rises through the input range of each clipping amplifier, the ampli- fier output will rise from 0V (FET completely ON ) to VCM –VT (FET nearly OFF ), where VCM is the common source voltage and VT is the threshold voltage of the FET. As each FET approaches its OFF state and the control voltage continues to rise, the next clipping amplifier/FET combination takes over for the next portion of the piecewise-linear attenuation characteristic. Thus, low control voltages have most of the FETs turned ON , while high control voltages have most turned OFF . Each FET acts to decrease the shunt resistance of the voltage divider formed by RS and the parallel FET network. The attenuator is comprised of two sections, with five parallel clipping amplifier/FET combinations in each. Special refer- ence circuitry is provided so that the (V CM –VT) limit voltage will track temperature and IC process variations, minimizing the effects on the attenuator control characteristic. In addition to the analog VCA CNTL gain setting input, the attenuator architecture provides digitally programmable ad- justment in eight steps, via the three Maximum Gain Setting (MGS) bits. These adjust the maximum achievable gain (corresponding to minimum attenuation in the VCA, with VCA CNTL = 3.0V) in 3dB increments. This function is accom- plished by providing multiple FET sub-elements for each of the Q 1 to Q10 FET shunt elements (see Figure 12). In the simplified diagram of Figure 13, each shunt FET is shown as two sub-elements, Q NA and QNB . Selector switches, driven by the MGS bits, activate either or both of the sub-element FETs to adjust the maximum R ON and thus achieve the stepped attenuation options. The VCA can be used to process either differential or single- ended signals. Fully differential operation will reduce 2nd- harmonic distortion by about 10dB for full-scale signals. Input impedance of the VCA will vary with gain setting, due to the changing resistances of the programmable voltage divider structure. At large attenuation factors (i.e., low gain settings), the impedance will approach the series resistor value of approximately 135Ω . As with the LNP stage, the VCA output is AC coupled into the PGA. This means that the attenuation-dependent DC com- mon-mode voltage will not propagate into the PGA, and so the PGA’s DC output level will remain constant. Finally, note that the VCA CNTL input consists of FET gate inputs. This provides very high impedance and ensures that multiple VCA2613 devices may be connected in parallel with no significant loading effects. The nominal voltage range for the VCA CNTL input spans from 0V to 3V. Over driving this input (≤ 5V) does not affect the performance. OVERLOAD RECOVERY CIRCUITRY — DETAIL With a maximum overall gain of 70dB, the VCA2613 is prone to signal overloading. Such a condition may occur in either the LNP or the PGA depending on the various gain and attenuation settings available. The LNP is designed to pro- duce low-distortion outputs as large as 1V PP single-ended (2VPP differential). Therefore the maximum input signal for linear operation is 2VPP divided by the LNP differential gain setting. Clamping circuits in the LNP ensure that larger input amplitudes will exhibit symmetrical clipping and short recov- ery times. The VCA itself, being basically a voltage divider, is intrinsically free of overload conditions. However, the PGA post-amplifier is vulnerable to sudden overload, particularly at high gain settings. Rapid overload recovery is essential in many signal processing applications such as ultrasound imaging. A special comparator circuit is provided at the PGA input which detects overrange signals (detection level de- pendent on PGA gain setting). When the signal exceeds the

FIGURE 12. Piecewise Approximation to Logarithmic Control Characteristics.

www.ti.com 7-Sep-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples VCA2613Y/250 LIFEBUY TQFP PFB 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 VCA2613Y VCA2613Y/2K OBSOLETE TQFP PFB 48 TBD Call TI Call TI VCA2613Y VCA2613Y/2KG4 ACTIVE TQFP PFB 48 TBD Call TI Call TI -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

www.ti.com 7-Sep-2016 Addendum-Page 2 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) VCA2613Y/250 TQFP PFB 48 250 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 Pack Materials-Page 2

MTQF019A – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK 4073176/B 10/96 Gage Plane 0,13 NOM 0,25 0,45 0,75 Seating Plane 0,05 MIN 0,17 0,27 SQ 7,20 6,80 5,50 TYP SQ8,80 9,20 1,05 0,95 1,20 MAX 0,08 0,50 M0,08 0°–7° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026

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