Sensor

US082-OB1203LCEVZ

Renesas Technology Corp

Heart Rate, Blood Oxygen Concentration, Pulse Oximetry, Proximity, Light and Color Sensor July 22, 2022

Manufacturer: Renesas Technology Corp

Document: 72 Pages / 1Mb

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PDF pages: 72

Technical content

Datasheet sections

7.1 Application Circuit
7.2 Modes of Operation
7.3 Main State Machine
7.4 Light Sensor Description
7.5 Proximity and PPG Sensor Description
7.5.1 LEDs and Integrated LED Driver
7.5.2 Principles of Proximity Sensor Operation
7.5.3 Principles of PPG Sensor Operation
7.6 Interrupt Features
7.6.1 LS Interrupt
7.6.2 PS Interrupt
7.6.3 PPG Interrupt
7.7 I2C Interface
7.7.1 I2C Address Decoding
7.7.2 I2C Register Read
7.7.3 I2C Register Write
7.7.4 I2C Interface Bus Timing
8.1 Register Map
8.2 Register Descriptions
8.2.1 STATUS_0
8.2.2 STATUS_1
8.2.3 PS_DATA
8.2.4 LS_CLEAR_DATA
8.2.5 LS_GREEN_DATA
8.2.6 LS_BLUE_DATA
8.2.7 LS_RED_DATA
8.2.8 COMP_DATA

Description

The Renesas OB1203SD and OB1203LC Sensor Modules integrate an optical biosensor with proximity sensor and ambient light sensing features that are desirable for handheld electronic devices. The OB1203 photoplethysmography (PPG) biosensor integrates light sources and drivers, analog digital conversion and I2C communication in a single optical package. Data from the OB1203 biosensor can be used to determine heart rate (HR), oxygen saturation (SpO2), respiration rate (RR), and heart rate variability (HRV), a measure of stress. The OB1203LC features photodiodes admitting light across the visible and near infrared range, while the OB1203SD features color filters with RGB color and Lux sensitivity similar to the human eye. The OB1203SD optical filters provide enhanced immunity to ambient light for proximity sensing (PS) and PPG measurements. The OB1203’s longer wavelength far red (690nm) LED is less sensitive to the differences between light and dark skin tones than traditional sensors operating at shorter wavelengths where melanin absorption is stronger. The far red LED also enables SpO2 measurements behind visibly dark “IR ink” for aesthetic industrial designs. Biosensor Features  SpO2 measurement less sensitive to skin color  Industry’s smallest optical biosensor module  Fully integrated and trimmed module, including two LEDs, 250mA maximum drive current, and photodetectors  PPG output resolution: 16 to 18 bits  Data stored in 18-bit wide, 32-sample FIFO memory  Integrated averaging function for higher signal-to-noise ratio (SNR) and data rate reduction  Programmable measurement rate: up to 3200 samples per second Light Sensor and Color Sensor* (OB1203SD) Features  Output resolution: 13 to 20 bits, 3 gain modes  Very stable spectral response over angle of light incidence  *High lux accuracy over different light sources  *Absolute sensitivity: 0.06 lux to > 150000 lux  *Four parallel channels (red, green, blue, clear)  *Accurate Correlated Color Temperature (CCT)  *Accurate CIE 1931 XYZ (RGB) color measurement Proximity Sensor Features  Integrated and trimmed LED source, driver, and photodetector  Programmable pulsed LED up to 250mA output current  High resolution (12 to 16 bits)  Object movement detection (in/out) with interrupt pin  Ambient light suppression > 100klx sun light  Crosstalk cancelation (analog and digital)  Short wavelength (blue, green) blocking filter for improved ambient rejection (OB1203SD) Physical Characteristics  Industry’s smallest package: 4.2 × 2 × 1.2 mm3 14-OSIP module  Highly reliable and industry-proven OSIP package with integrated non-allergenic cover glass  Wide operation temperature: - 40°C to +85°C  Wide supply voltage: 1.7V to 3.6V  Typical active current at minimum duty cycle:

LS/CS:110µA
PS: 90µA + LED current (typical ~300µA average)  Low standby current: 2µA typical  I2C interface supporting Standard Mode (100kHz) or Fast Mode (400kHz) communication; 1.8V to 3.3V logic compatible  Programmable level-based interrupt functions with upper and lower thresholds for extending battery life

Figure 1. 3D Package Rendering

Figure 4. Pin Assignments for 2 × 4.2 × 1.2 mm 14-OSIP Package – Top View Table 1. Pin Descriptions digital or supply trace routing.

2 SCL IN

reliable OB1203 I2C communication. 3 SDA IN/OUT I2C serial data line. Open drain. 4 LGND GROUND LED/digital power ground (required). internally to module infrared LED cathode. internally to module red LED cathode. external LEDs. LED thermal load.

11 VDD SUPPLY

12 GND GROUND Analog ground. 13 INT OUT Interrupt pin. Open drain.

Global measurement conditions VDD = 2.8V, TAMB = 25ºC unless otherwise noted. Table 2. Absolute Maximum Ratings [a] HBM: C = 100pF charged to VHBM with resistor R = 1.5kΩ in series; valid for all pins.

Recommended Operating Conditions

Global measurement conditions VDD = 2.8V, TAMB = 25ºC unless otherwise noted. Table 3. Recommended Operating Conditions [a] If VDD = 0V, then maximum VLED = 3.6V.

Electrical and Optical Characteristics

Global measurement conditions VDD = 2.8V, TAMB = 25ºC unless otherwise noted. Table 4. Electrical and Optical Characteristics Note: See important table notes at the end of the table.

© 2020-2022 Renesas Electronics Corporation 10 July 22, 2022 Symbol Parameter Conditions Minimum Typical Maximum Units LS Light Sensor Characteristics Spectral response See Figure 12. RESLS LS output resolution Programmable to 13, 16, 17, 18, 19, 20 bit 13 18 20 bit Dark level count 0 lx, 18-bit range 0 count tLS Measurement repetition period [d] Programmable in 8 steps 25 2000 ms tINT Measurement integration time [d] Programmable in 6 steps 50 400 ms G1 Sensitivity at gain 1 [f] Example for 3050 K, 5 klx LED light, 18-bit sensor resolution. Specification changes with the resolution setting as shown in Table 7. C: 9160 R: 3160 G: 4280 B: 1470 counts G3 Sensitivity at gain 3 [f] C: 27480 R: 9480 G: 12840 B: 4410 counts G6 Sensitivity at gain 6 [f] C: 54960 R: 18960 G: 25680 B: 8820 counts PS Proximity Sensor Characteristics RESPS_bit Measurement resolution Depends on pulse width and number of LED pulses; see sections 8.2.12 and 8.2.13 10 15 16 bit RESPS_irr Signal strength IR 125mA LED current; 8 pulse average; gain mode 1; 4.6cm round white reflective target [e] in 4.6cm distance 2830 3300 4030 counts RESPS_red Signal strength Red 2300 2660 3200 counts ALCmax Ambient light cancellation >100000 lx NPULSE Number of LED pulses 1 8 32 tPS Measurement period Programmable in 8 steps 3.125 to 400 ms tPS_pw Pulse width Three possible settings; configur- able via register setting; see section 8.2.13 26 µs 42 µs 71 µs Analog crosstalk cancellation Programmable 0 or 50% FS 50% Full scale Digital crosstalk cancellation Programmable: 0 to full signal level. For 16-bit resolution. 0 65535 count

© 2020-2022 Renesas Electronics Corporation 11 July 22, 2022 Symbol Parameter Conditions Minimum Typical Maximum Units PPG Characteristics RESPPG Measurement resolution 16 18 18 bit APPG Digital averaging factor 1 32 tPPG Measurement period Programmable in 8 steps 0.3125 to 20 ms tPPG_pw Pulse width Configurable via register setting; see section 8.2.32 130 µs 247 481 949 IR counts 18% grey card reflector (6mm from top of package); sample under clear cover glass; 125mA LED current; 130µs LED on time; average over 100 samples per second. 28000 count Red counts 28000 count Analog crosstalk cancellation Programmable 0 or 50% FS 50% Full scale Sample rate accuracy vs. nominal -2 2 % Measurement Timing tWAKE-STB Wake-up time from Standby Mode From Standby to Active Mode (measurement can start) 1.5 ms tStart Start time from VDD apply to Standby Mode 10 ms IR LED (LED1 Pin) Characteristics λPeak Peak wavelength ILED = 100mA, TA = 25°C 940 nm IIR_LED (Max) IR LED current Programmable in 1024 steps 250 mA Red LED (LED2 Pin) Characteristics λPeak Peak wavelength ILED = 20mA, TA = 25°C 700 nm IRED_LED (Max) Red LED current Programmable in 512 steps 125 mA [a] For the LS, the maximum duty cycle is selected with 100ms measurement time (default) and 100ms period at an illumination of 1000 lux. [b] For the PS, 100ms measurement period, 42µs pulse width, 8 pulses, 15-bit resolution, and Gain Mode 1 are selected. [c] For typical temperature dependence, see Figure 16. [d] Typical timing accuracy applied. [e] 90 % reflective Kodak R-27. [f] Color filters and ambient light sensor calibration provided for OB1203SD variant only. For OB1203LC, the spectral response for the respective color channels is identical.

trimmed and calibrated at final test using settings in nonvolatile memory (NVM). Figure 20. Simplified Block Diagram

7.1 Application Circuit

Figure 21. Typical Application Circuit

7.2 Modes of Operation

Table 5. Channel Activation during Operation Modes [a] All other mode combinations are prohibited and should not be used. Otherwise proper operation is not guaranteed.

7.3 Main State Machine

enters Standby Mode as soon as the Idle State is reached (see Figure 22). avoid responding to an incorrect I2C address.

Standby Mode thereafter. The support blocks will only move to Standby Mode if all sensors are inactive. following a read out of the corresponding status register STATUS_0 or STATUS_1. or STATUS_1 register. They will always be reset upon activation of the respective sensor. If no measurements are enabled, as on power-up, the OB1203 is automatically in Low-Power Standby Mode. Figure 22. Simplified Main State Machine

7.4 Light Sensor Description

and has the same spectral response for all light sensor channels. sensors for temperature changes. Table 6. LS Channel Activation in LS and CS Mode gain or resolution settings are required for different channels, conversions must be performed consecutively with modified settings. integration (measurement) time. decrease the gain. If the light level is less than about 20% for all sensors’ readings, the user’s application can increase the gain. of lux given in Equation 1, Equation 2, and Equation 3 scales all measurements to the highest gain and highest resolution. Where gain is 1, 3, or 6, res is 13, 16, 17, 18, 19, or 20 and C1, C2, and C3 are application-specific color correction coefficients.

Table 7. LS Detection Ranges and Sensitivity Calculation Example (OB1203SD variant)

7.5 Proximity and PPG Sensor Description

approximately 940nm) and a red LED (peak wavelength of approximately 700nm) that are integrated in the OB1203 module. digital crosstalk reduction (see 7.5.2).

7.5.1 LEDs and Integrated LED Driver

7.5.2 Principles of Proximity Sensor Operation

transmitter. The PS gain is adjustable in four steps with the PPG_PS_GAIN register (see section 8.2.26). cellation value is automatically subtracted from the PS conversion result.

Figure 23. PS Timing Characteristic Table 8. PS Parameter [a] For measurement periods of 3.125ms and pulse widths above 26µs, the number of LED pulses is limited to 16.

7.5.3 Principles of PPG Sensor Operation

determination of parameters related to heart rate with an appropriate algorithm. The PPG2 Mode also uses LED2 (the Red LED) as a transmitter. the person’s finger can be provided. Furthermore HR determination with the red LED instead of the IR LED is supported. register PPG_PWIDTH_PERIOD; see section 8.2.32. The pulse repetition period tPPG_pr depends on the pulse width tPPG_pw. via a setting in the register PPG_CAN_ANA, see section 8.2.30. samples averaged is programmable via the PPG_AVG register (see section 8.2.31).

Figure 24. PPG Timing Characteristic (without Averaging) Table 9. PPG Parameters Note: Not all combinations of settings are valid. For details, see section 8.2.32. reliable, time-resolved PPG measurements; see section 7.7.2. The FIFO_DATA (3B HEX; see section 8.2.37) data register is special, providing ac cess to an internal RAM that stores the biosensor data. operation to a register beyond 3BHEX must be performed. read at the address 3BHEX must be performed. For the read of n words a 3n byte block read can be performed. interrupt” settings; see section 7.6.3. section 8.2.33) is set to 1, when the FIFO is full, new PPG data will overwrite old data in the FIFO.

7.6 Interrupt Features

The OB1203 can generate independent LS, PS, and PPG interrupt signals. LS and PS interrupts will be triggered if the upper or lower threshold values are crossed. The PPG interrupts notify on the availability of new PPG data and on an adjustable number of free FIFO registers remaining during a PPG measurement. Another feature is the option to deactivate a sensor after an interrupt event occurs by setting the Sleep After Interrupt bit in the respective MAIN_CTRL_0 or MAIN_CTRL_1 register (SAI_LS and SAI_PS for light and proximity sensors respectively). This feature is independently available for both the PS and LS/CS sensors. The LS and PS persistence settings determine the number of consecutive samples that must be measured before the interrupt is asserted. For LS, an interrupt can also be triggered if the output count variation of consecutive conversions has exceeded a defined limit. The PS Logic Output Mode allows the interrupt pin to show whether objects are near or far. If the PS Logic Output Mode is set, then no other interrupts will be asserted. All interrupt signals as well as ps_logic_mode are active low at the INT pin. Clearing the interrupt status flag by reading the status register will also clear the interrupt signal on the INT pin except in the PS Logic Output Mode.

7.6.1 LS Interrupt

The LS interrupt functionality is configured by the bits in the INT_CFG_0 register (see section 8.2.23). It can function as either threshold triggered (LS_VAR_MODE = 0) or variance trigged (LS_VAR_MODE = 1). The LS_INT_SEL bits in the INT_CFG_0 register configure which of the LS/CS channels (Clear, Green, Red or Blue) will be compared with the interrupt thresholds. The threshold interrupt is enabled with LS_INT_EN = 1 and LS_VAR_MODE = 0. The interrupt is set when the respective *_DATA register of the selected interrupt source channel is above the upper or below the lower threshold configured in the LS_THRES_UP and LS_THRES_LOW registers (see sections 8.2.20 and 8.2.21 respectively) for a specified number of consecutive measurements as configured in the INT_PST register (1 + LS_PERSIST) (see section 8.2.25). The variance interrupt is enabled with LS_INT_EN = 1 and LS_VAR_MODE = 1. It is set when the absolute value difference between the preceding and the current output data of the selected interrupt source channel is above the variance threshold. In Variance Mode if LS_PERSIST > 0 (see section 8.2.25), each measurement must differ from the previous by the specified variance (any combination of up and down changes). LS_PERSTIST > 0 is not recommended in Variance Mode.

7.6.2 PS Interrupt

The interrupt is configured by the bits in the INT_CFG_1 register (see section 8.2.24) and enabled with PS_INT_EN = 1. The bit PS_LOGIC_MODE in the INT_CFG_1 register further defines the behavior of the interrupt. PS_LOGIC_MODE = 0: The interrupt is set (interrupt pin to ground and the status bits to 1) after each measurement when the PS_DATA is above the upper threshold configured in the PS_THRES_UP register (see section 8.2.16). The interrupt is also set (interrupt pin to ground and the status bits to 1) after each measurement when the PS_DATA is below the lower threshold configured in the PS_THRES_LOW (see section 8.2.17). The interrupt is cleared (interrupt pin to high; status bit to zero) when the STATUS or PS DATA registers are read or the data measurement is between the two thresholds. For PS_PERSIST > 0, the interrupts occur only after a specified number of consecutive measurements above or below the respective thresholds, as configured in the INT_PST register (1 + PS_PERSIST) (see section 8.2.25).

To obtain interrupts whenever new data is available, set the upper threshold below the lower threshold and PS_PERSIST = 0. while a weak signal (no interrupt) is the Far Mode (object far away). thresholds, as configured in the INT_PST register (1 + PS_PERSIST) (see section 8.2.25). The PS interrupt generator is shown in the upper part of Figure 25. An example of the interrupt behavior is also shown in the figure. Figure 25. PS Interrupt Behavior Examples the interrupts are not reset automatically, an interrupt event caused by crossing the opposite threshold could be missed.

7.6.3 PPG Interrupt

interrupt is cleared by reading the STATUS_1 register or reading the FIFO_DATA register. status bit is cleared by reading the STATUS_1 register or reading the FIFO_DATA register.

7.7 I2C Interface

be appended to the slave address by the master device to properly communicate with the device. The interface is compatible with Standard Mode (100kHz) and Fast Mode (400kHz) I2C communication. Table 10. Supported I2C clock Frequencies

7.7.1 I2C Address Decoding

The 7 bit I2C address of the device is 53HEX. Appending the write / read bit yields A6HEX for write and A7HEX for read in the I2C address command.

7.7.2 I2C Register Read

are updated as soon as there is no on-going I2C read operation. FIFO_DATA, a new command with the address of this register must be sent before the data from this and the following registers can be read. See section 8.2.37 for more details. If a read access is started on an address outside the valid address range, the OB1203 will return NACK until the I2C operation is ended. Read operations must follow the timing diagram in Figure 26.

Figure 26. I2C Register Read

7 Bit 1A Address

8 Bit N P

8 BitA

7 Bit A

7 Bit A A Data

8 Bit A Data

7.7.3 I2C Register Write

to read-only bits are ignored. If a write access is started on an address outside the valid address range, the OB1203 will return NACK until the I2C operation is ended. Some register bits are R/W and must be set to a specific value 0 or 1 as indicated in the register map. Write operations must follow the timing diagram in Figure 27. Figure 27. I2C Register Write

7 Bit A Address P

8 BitA A Data

7.7.4 I2C Interface Bus Timing

Figure 28. Bus Timing Table 11. Bus Timing Characteristic

8.1 Register Map

Table 12. Register Map: Summary of Internal Registers

© 2020-2022 Renesas Electronics Corporation 29 July 22, 2022 Address Type Name Default Value Description 20HEX R/W PS_THRES_LOW_0 00HEX PS interrupt lower threshold, LSB 21HEX R/W PS_THRES_LOW_1 00HEX PS interrupt lower threshold, MSB 22HEX R/W LS_RES_PERIOD 22HEX LS resolution and measurement period setting 23HEX R/W LS_GAIN 01HEX LS analog gain range setting 24HEX R/W LS_THRES_UP_0 FFHEX LS interrupt upper threshold, LSB 25HEX R/W LS_THRES_UP_1 FFHEX LS interrupt upper threshold, intervening bits 26HEX R/W LS_THRES_UP_2 0FHEX LS interrupt upper threshold, MSB 27HEX R/W LS_THRES_LOW_0 00HEX LS interrupt lower threshold, LSB 28HEX R/W LS_THRES_LOW_1 00HEX LS interrupt lower threshold, intervening bits 29HEX R/W LS_THRES_LOW_2 00HEX LS interrupt lower threshold, MSB 2AHEX R/W LS_THRES_VAR 00HEX LS interrupt variance threshold 2BHEX R/W INT_CFG_0 10HEX LS interrupt configuration 2CHEX R/W INT_CFG_1 00HEX PS/PPG interrupt configuration 2DHEX R/W INT_PST 00HEX LS/PS interrupt persist setting 2EHEX R/W PPG_PS_GAIN 09HEX PPG/PS gain setting 2FHEX R/W PPG_PS_CFG 40HEX PPG power save and LED flip setting 30HEX R/W PPG_IRLED_CURR_0 00HEX PPG IR LED (LED1) current, LSB 31HEX R/W PPG_IRLED_CURR_1 00HEX PPG IR LED current, MSB 32HEX R/W PPG_RLED_CURR_0 00HEX PPG Red LED (LED2) current, LSB 33HEX R/W PPG_RLED_CURR_1 00HEX PPG Red LED current, MSB 34HEX R/W PPG_CAN_ANA 00HEX PPG analog cancellation value 35HEX R/W PPG_AVG 0AHEX Number of averaged PPG samples 36HEX R/W PPG_PWIDTH_PERIOD 42HEX PPG pulse width and measurement period 37HEX R/W FIFO_CFG 00HEX FIFO rollover and almost full configuration 38HEX R/(W) FIFO_WR_PTR 00HEX FIFO write pointer 39HEX R/(W) FIFO_RD_PTR 00HEX FIFO read pointer 3AHEX R/(W) FIFO_OVF_CNT 00HEX FIFO overflow counter 3BHEX R FIFO_DATA 00HEX FIFO mirrored PPG data 3DHEX R PART_ID 00 HEX Part number ID 42HEX R/W DIG_GAIN_TRIM_LED1 factory trimmed Proximity sensor calibration (set to 0 for PPG sensing) 43HEX R/W DIG_GAIN_TRIM_LED1 factory trimmed Proximity sensor calibration (set to 0 for PPG sensing)

8.2 Register Descriptions

8.2.1 STATUS_0

00HEX Power-On_ status 0 0 0 0 0 LS_interrupt_ status LS_data_ status Bit[7] Power-On_ status: If set to 1, the part has had a power-up event, either because the part was turned on or because there was a power-supply voltage disturbance A value of 1 is the default for the first register read after power-on reset. Note: All interrupt threshold settings in the registers have been reset to power-on default states and should be examined if the Power-On status flag is set. The flag is cleared after the register is read. Bit[1] LS_ interrupt_status: (updated even if the interrupt pin is disabled)

0 Interrupt condition has not occurred (default)

1 Interrupt condition has occurred (cleared after read)

Bit[0] LS_data_status:

0 Old data, already read (default)

1 New data, not yet read (cleared after read)

8.2.2 STATUS_1

01HEX TS_data_status X FIFO_almost_ full_interrupt PPG_data_ status

0 PS_logic_signal

_status PS_interrupt_ status PS_data_status Bit[7] TS_data_status: Bit[6] reserved Bit[5] FIFO_almost_full_interrupt (updated even when the interrupt pin is disabled)

1 Interrupt condition has occurred (cleared after read, also cleared by reading FIFO_DATA)

Bit[4] PPG_data_status:

1 New data, not yet read (cleared after read, also cleared by reading FIFO_DATA)

Bit[2] PS_logic_signal_status:

0 Object is far (default)

1 Object is close

Bit[1] PS_interrupt_status: (updated even when the interrupt pin is disabled) Bit[0] PS_data_status:

8.2.3 PS_DATA

Default value 00HEX and 00HEX Register access R Bit 7 6 5 4 3 2 1 0 02HEX PS_DATA_0 03HEX PS_DATA_1 The PS conversion result is automatically corrected by the value of the PS cancellation register (PS_CAN_DIG, see section 8.2.14): PS_ DATA = PS_meas – PS_CAN_DIG PS_meas is the internal raw value obtained from the PS ADC. If the operations PS moving average and/or PS hysteresis are enabled, they will affect the PS data before they are written in the PS_DATA register. The PS conversion result is written MSB-aligned into the PS_DATA registers. The result must always be treated as a 16-bit value regardless of the measurement resolution resulting from the pulse width setting selected in the PS_PWIDTH_PERIOD register (see section 8.2.13). For example, in 10-bit resolution, bits 0 to 5 in PS_DATA_0 are always zero. The smallest value above zero is therefore 64 counts. Reg 02HEX Bit[7:0] PS measurement least significant data byte, bit 0 is always the LSB of the data word Reg 03HEX Bit[7:0] PS measurement most significant data byte, bit 7 is always the MSB of the data word

8.2.4 LS_CLEAR_DATA

Address 04HEX, 05HEX, and 06HEX Default value 00HEX, 00HEX, and 00HEX Register access R Bit 7 6 5 4 3 2 1 0 04HEX LS_CLEAR_DATA_0 05HEX LS_CLEAR_DATA_1 06HEX 0 0 0 0 LS_CLEAR_DATA_2 Light sensor Clear channel digital output data: The LS conversion results are automatically compensated by the value of COMP_DATA: LS_CLEAR_DATA = (LS_CLEARint – COMP_DATA) LS_CLEARint is the internal raw value obtained from the Clear LS ADC. If LS_CLEARint is already full-scale, then the value of LS_CLEAR_DATA is set to its maximum value without subtracting COMP_DATA. LS_CLEAR_DATA is clipped at (2Resolution – 1) and always written as unsigned integer values LSB-aligned into the LS_CLEAR_DATA registers, regardless of the resolution selected in the LS_RES_PERIOD register. LS_CLEAR_DATA_2 and LS_CLEAR_DATA_1 are filled with ‘0’ for resolutions lower than 20 bit and 16 bit, respectively. Reg 04HEX Bit[7:0] Clear diode data least significant data byte Reg 05HEX Bit[7:0] Clear diode data middle data byte Reg 06HEX Bit[3:0] Clear diode data most significant data byte

8.2.5 LS_GREEN_DATA

Address 07HEX, 08HEX, and 09HEX Default value 00HEX, 00HEX, and 00HEX Register access R Bit 7 6 5 4 3 2 1 0 07HEX LS_GREEN_DATA_0 08HEX LS_GREEN_DATA_1 09HEX 0 0 0 0 LS_GREEN_DATA_2 Light sensor Green channel digital output data: The LS conversion results are automatically compensated by the value of COMP_DATA: LS_GREEN_DATA = (LS_GREENint – COMP_DATA) LS_GREENint is the internal raw value obtained from the Green LS ADC. If LS_GREENint is already full-scale, then the value of LS_GREEN_DATA is set to its maximum value without subtracting COMP_DATA. LS_GREEN_DATA is clipped at (2Resolution – 1) and always written as unsigned integer values LSB-aligned into the LS_GREEN_DATA registers, regardless of the resolution selected in the LS_RES_PERIOD register. LS_GREEN_DATA_2 and LS_GREEN_DATA_1 are filled with ‘0’ for resolutions lower than 20 bit and 16 bit, respectively. Reg 07HEX Bit[7:0] Green diode data least significant data byte Reg 08HEX Bit[7:0] Green diode data middle data byte Reg 09HEX Bit[3:0] Green diode data most significant data byte

8.2.6 LS_BLUE_DATA

Address 0AHEX, 0BHEX, and 0CHEX Default value 00HEX, 00HEX, and 00HEX Register access R Bit 7 6 5 4 3 2 1 0 0AHEX LS_BLUE_DATA_0 0BHEX LS_BLUE_DATA_1 0CHEX 0 0 0 0 LS_BLUE_DATA_2 Light sensor Blue channel digital output data: The LS conversion results are automatically compensated by the value of COMP_DATA: LS_BLUE_DATA = (LS_BLUEint – COMP_DATA) LS_BLUEint is the internal raw value obtained from the Blue LS ADC. If LS_BLUEint is already full-scale, then the value of LS_BLUE_DATA is set to its maximum value without subtracting COMP_DATA. LS_BLUE_DATA is clipped at (2Resolution – 1) and always written as unsigned integer values LSB-aligned into the LS_BLUE_DATA registers, regardless of the resolution selected in the LS_RES_PERIOD register. LS_BLUE_DATA_2 and LS_BLUE_DATA_1 are filled with ‘0’ for resolutions lower than 20 bit and 16 bit, respectively. Reg 0AHEX Bit[7:0] Blue diode data least significant data byte Reg 0BHEX Bit[7:0] Blue diode data middle data byte Reg 0CHEX Bit[3:0] Blue diode data most significant data byte

8.2.7 LS_RED_DATA

Address 0DHEX, 0EHEX, and 0FHEX Default value 00HEX, 00HEX, and 00HEX Register access R Bit 7 6 5 4 3 2 1 0 0DHEX LS_RED_DATA_0 0EHEX LS_RED_DATA_1 0FHEX 0 0 0 0 LS_RED_DATA_2 Light sensor Red channel digital output data: The LS conversion results are automatically compensated by the value of COMP_DATA: LS_RED_DATA = (LS_REDint – COMP_DATA) LS_REDint is the internal raw value obtained from the Red LS ADC. If LS_REDint is already full-scale then the value of LS_RED_DATA is set to its maximum value without subtracting COMP_DATA. LS_RED_DATA is clipped at (2Resolution – 1) and always written as unsigned integer values LSB-aligned into the LS_RED_DATA registers, regardless of the resolution selected in the LS_RES_PERIOD register. LS_RED_DATA_2 and LS_RED_DATA_1 are filled with ‘0’ for resolutions lower than 20 bit and 16 bit, respectively. Reg 0DHEX Bit[7:0] Red diode data least significant data byte Reg 0EHEX Bit[7:0] Red diode data middle data byte Reg 0FHEX Bit[3:0] Red diode data most significant data byte

8.2.8 COMP_DATA

Address 10HEX and 11HEX and 12HEX Default value 00HEX and 00HEX and 00HEX Register access R Bit 7 6 5 4 3 2 1 0 10HEX COMP_DATA_0 11HEX COMP_DATA_1 12HEX 0 0 0 0 COMP_DATA_2 Light sensor temperature compensation (Comp) channel digital output data: COMP_DATA is clipped at (2Resolution – 1) and always written as unsigned integer values LSB-aligned into the COMP_DATA registers, regardless of the resolution selected in the LS_RES_PERIOD register. COMP_DATA_2 and COMP_DATA_1 are filled with ‘0’ for lower resolutions than 20 bit and 16 bit, respectively. Reg 10HEX Bit[7:0] Temperature compensation channel least significant data byte Reg 11HEX Bit[7:0] Temperature compensation channel middle data byte Reg 12HEX Bit[3:0] Temperature compensation channel most significant data byte

8.2.9 MAIN_CTRL_0

15HEX SW reset 0 0 0 SAI_LS 0 LS_MODE LS_EN Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown Bit[7] Software reset: 0 No software reset triggered (default).

1 A software reset will be triggered immediately, and therefore the I2C bus command is NOT

answered with “ACK.” The part is operational after a typical delay of 10ms. However, the power-on reset bit in STATUS_0 is NOT set. Bit[3] Sleep after interrupt for LS: This bit reacts on the “LS interrupt status” bit in the STATUS_0 register. 0 The light sensor will stay active after an interrupt occurs (default).

1 The light sensor will return to standby (LS_EN will be cleared when the measurement is

finished and the STATUS_0 register is read) after an interrupt occurs. After STATUS_0 is read, the sensor is re-enabled. Bit[1] Light sensor mode: This bit is only checked if LS_EN is active. 0 LS Mode (Green, Clear and Comp) channels activated (default). 1 CS Mode: All light sensor channels activated (Red, Green, Blue, Clear, and Comp). Bit[0] Light sensor enable: 0 Light sensor inactive (default). 1 Light sensor active.

8.2.10 MAIN_CTRL_1

16HEX 0 0 0 0 SAI_PS PPG_PS_MODE PPG_PS_EN Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[3] Sleep after interrupt for PS: This bit reacts on the “PS interrupt status” bit in the STATUS_1 register. 0 The proximity sensor will stay active after an interrupt occurs (default).

1 The proximity sensor will return to standby (PPG_PS_EN will be cleared when the

measurement is finished and the STATUS_1 register is read) after an interrupt occurs. Bit[2:1] PPG proximity mode 00BIN PS Mode (default) 01BIN PPG1 Mode. Measures PPG with IR LED (LED1 pin) unless the LED_Flip bit in the PPG_PS_CFG is set, in which case the red LED (LED2 pin) is used. 10BIN PPG2 Mode. Measures PPG with IR and red light interleaved. The first samples are with IR, the second samples with red, and then the pattern repeats, filling in alternate slots in the FIFO. If the LED_Flip bit (see section 8.2.27) is set the order is reversed. 11BIN Reserved. Bit[0] PPG or proximity sensor enable: 0 PPG/PS inactive (default). 1 PPG/PS active.

8.2.11 PS_LED_CURR

Default value FFHEX and 01HEX Register access R/W Bit 7 6 5 4 3 2 1 0 17HEX PS_LED_CURR_0 18HEX 0 0 0 0 0 0 PS_LED_CURR_1 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. PS LED current: The PS LED current is adjustable in 1024 steps between 0 and 250mA nominal. BIN Code HEX Code State 0000000000BIN 000HEX LED off (0mA) 0000000001BIN 001HEX LED pulsed nominal current level = 0.24mA 0000000010BIN 002HEX LED pulsed nominal current level = 0.49mA … … … 0111111111BIN 1FFHEX LED pulsed nominal current level = 125mA (default) … … 1111111111BIN 3FFHEX LED pulsed nominal current level = 250mA Reg 17HEX Bit[7:0] PS LED current least significant data byte, bit 0 is the LSB of the data word Reg 18HEX Bit[1:0] PS LED current most significant data byte, bit 1 is MSB Note: Writing to this register resets the PS state machine and starts new measurements.

8.2.12 PS_CAN_PULSES

19HEX 0 PS_CAN_ANA Number_of_LED_pulses 0 1 0 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[6] PS analog cancellation level: PS_CAN_ANA determines the amount of analog photocurrent cancellation that is applied during the integration phase of the PS measurement. The PS analog cancellation level is expected to be written by the MCU during system startup. 0BIN No offset cancellation (default) 1BIN 50% offset of the full scale value Bit[5:3] Number_of_LED_pulses in each PS measurement: This register controls the number of emitted PS LED pulses (1 to 32). For example, for the pulse width of 42µs, the number of emitted LED pulses is limited to 16 at the pulse period of 3.125ms. For the pulse width of 71µs the number of emitted LED pulses is limited to 8 at the pulse period of 3.125, and 16 at the pulse period of 6.25ms. The number of LED pulses influences the measurement resolution; see Table 13. 000BIN 1 pulse 001BIN 2 pulses 010BIN 4 pulses 011BIN 8 pulses (default) 100BIN 16 pulses 101BIN 32 pulses 110BIN 32 pulses 111BIN 32 pulses Note: Writing to this register resets the PS state machine and starts new measurements.

8.2.13 PS_PWIDTH_PERIOD

Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. together with the number of LED pulses, it affects the measurement resolution; see Table 13. This is the nominal time between PS measurements. Note: Writing to this register resets the PS state machine and starts new measurements. Table 13. PS Measurement Output Resolution

8.2.14 PS_CAN_DIG

Default value 00HEX and 00HEX Register access R/W Bit 7 6 5 4 3 2 1 0 1BHEX PS_CAN_DIG_0 1CHEX PS_CAN_DIG_1 PS digital cancellation level: The digital cancellation value is subtracted from the measured PS data before the data is transferred to the PS_DATA registers and compared with the Interrupt thresholds. The PS digital cancellation level is expected to be written by the MCU host controller. Reg 1BHEX Bit[7:0] PS digital cancellation level least significant data byte; bit 0 is the LSB of the data word. Reg 1CHEX Bit[7:0] PS digital cancellation level most significant data byte; bit 7 is the MSB. Note: Writing to this register resets the PS state machine and starts new measurements.

8.2.15 PS_MOV_AVG_HYS

1DHEX PS_moving_ average_enable PS_hysteresis_level Bit[7] PS_moving_average_enable: If set, the PS_DATA is the average of the current and previous measurement The moving average is applied after digital offset cancellation. 0 PS moving average not applied (default). 1 PS moving average applied. Bit[6:0] PS_hysteresis_threshold: PS hysteresis mode tracks and holds the peak PS count level when objects are approaching, and it tracks and holds the baseline level when objects are moving away from the sensor. This may be useful for capturing baseline or peak signal levels for determining thresholds when the controller might not be polling fast enough to capture every measurement. It also has the effect of reducing data variation as PS count fluctuations within the specified hysteresis are masked. When the PS hysteresis level is set to a value larger than 00HEX, the PS_DATA register displays the highest recorded PS count measurement (peak track and hold). When a signal arrives that is smaller than the peak signal minus the programmed hysteresis, PS_DATA switches to track and hold the lowest PS count measurement (baseline). Similarly, in baseline tracking mode, when a PS measurement is greater than the baseline plus the hysteresis, the PS_DATA switches to track and hold the subsequent peak values. BIN Code HEX Code Value 0000000BIN 00HEX 0 (no hysteresis function applied) (default) 0000001BIN 01HEX 2 0000010BIN 02HEX 4 … … … 1111110BIN 7EHEX 252 1111111BIN 7FHEX 254 Note: Writing to this register resets the PS state machine and starts new measurements.

8.2.16 PS_THRES_UP

Default value FFHEX and FFHEX Register access R/W Bit 7 6 5 4 3 2 1 0 1EHEX PS_THRES_UP_0 1FHEX PS_THRES_UP_1 PS_THRES_UP sets the upper threshold value for the PS interrupt. The Interrupt Controller compares the value in PS_THRES_UP against the measured data in the PS_DATA registers. It generates an interrupt event if PS_DATA exceeds the upper threshold level. The data format for PS_THRES_UP matches that of the PS_DATA registers. Reg 1EHEX Bit[7:0] Upper threshold of PS interrupt least significant data byte; bit 0 is the LSB of the data word. Reg 1FHEX Bit[7:0] Upper threshold of PS interrupt most significant data byte; bit 7 is MSB. Note: Writing to this register resets the PS state machine and starts new measurements.

8.2.17 PS_THRES_LOW

Default value 00HEX and 00HEX Register access R/W Bit 7 6 5 4 3 2 1 0 20HEX PS_THRES_LOW_0 21HEX PS_THRES_LOW_1 PS_THRES_LOW sets the lower threshold value for the PS interrupt. The Interrupt Controller compares the value in PS_THRES_LOW against measured data in the PS_DATA registers. It generates an interrupt event if PS_DATA is lower than the lower threshold level. The data format for PS_THRES_LOW matches that of the PS_DATA registers. Reg 20HEX Bit[7:0] Upper threshold of PS interrupt least significant data byte; bit 0 is the LSB of the data word. Reg 21HEX Bit[7:0] Upper threshold of PS interrupt most significant data byte; bit 7 is the MSB. Note: Writing to this register resets the PS state machine and starts new measurements.

8.2.18 LS_RES_PERIOD

22HEX 0 LS_ Resolution 0 LS_Measurement_Period Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[6:4] LS_Resolution: The resolution sets the measurement time and the precision of the measurement. 000BIN 20 bit, 400ms 001BIN 19 bit, 200ms 010BIN 18 bit, 100ms (default) 011BIN 17 bit, 50ms 100BIN 16 bit, 25ms 101BIN 13 bit, 3.125ms 110BIN Reserved 111BIN Reserved Bit[2:0] LS_Measurement_Period: This register controls the timing between LS measurements. 000BIN 25ms 001BIN 50ms 010BIN 100ms (default) 011BIN 200ms 100BIN 500ms 101BIN 1000ms 110BIN 2000ms 111BIN 2000ms Note: When the measurement period is programmed to be shorter than possible for the specified ADC measurement time, the period will be longer than programmed (maximum speed). Note: Writing to this register resets the LS state machine and starts new measurements.

8.2.19 LS_GAIN

23HEX 0 0 0 0 0 0 LS_gain_range Notes: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Note: The following LS detection ranges apply to the default resolution of 18-bit (measurement time = 100ms); see Table 7 for details. All channels of the Light Sensor run on the same range setting. Sensitivity settings correlate between the channels as shown in Table 7. Bit[1:0] LS / Green Channel detection range: 00BIN Gain Mode 1 6Lxmin to Lxmax 01BIN Gain Mode 3 (default) 2Lxmin to Lxmax / 3 10BIN Gain Mode 6 Lxmin to Lxmax / 6 Lxmin: smallest detectable lux level, depending on type of light source. Lxmax: largest detectable lux level, depending on type of light source. Note: Writing to this register resets the LS state machine and starts new measurements.

8.2.20 LS_THRES_UP

Address 24HEX, 25HEX, and 26HEX Default value FFHEX, FFHEX, and 0FHEX Register access R/W Bit 7 6 5 4 3 2 1 0 24HEX LS_THRES_UP_0 25HEX LS_THRES_UP_1 26HEX 0 0 0 0 LS_THRES_UP_2 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. LS_THRES_UP sets the upper threshold value for the LS interrupt. The Interrupt Controller compares the value in LS_THRES_UP against measured data in the *_DATA registers of the selected LS interrupt channel. It generates an interrupt event if *_DATA exceeds the threshold level. The data format for LS_THRES_UP matches that of the *_DATA registers. Reg 24HEX Bit[7:0] LS upper interrupt threshold value, LSB Reg 25HEX Bit[7:0] LS upper interrupt threshold value, middle byte Reg 26HEX Bit[3:0] LS upper interrupt threshold value, MSB Note: Writing to this register resets the LS state machine and starts new measurements.

8.2.21 LS_THRES_LOW

Address 27HEX, 28HEX, and 29HEX Default value 00HEX, 00HEX, and 00HEX Register access R/W Bit 7 6 5 4 3 2 1 0 27HEX LS_THRES_LOW_0 28HEX LS_THRES_LOW_1 29HEX 0 0 0 0 LS_THRES_LOW_2 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. LS_THRES_LOW sets the lower threshold value for the LS interrupt. The Interrupt Controller compares the value in LS_THRES_LOW against measured data in the *_DATA registers of the selected LS interrupt channel. It generates an interrupt event if *_DATA is below the threshold level. The data format for LS_THRES_LOW matches that of the *_DATA registers. Reg 27HEX Bit[7:0] LS lower interrupt threshold value, LSB Reg 28HEX Bit[7:0] LS lower interrupt threshold value, middle byte Reg 29HEX Bit[3:0] LS lower interrupt threshold value, MSB Note: Writing to this register resets the LS state machine and starts new measurements.

8.2.22 LS_THRES_VAR

2AHEX 0 0 0 0 0 LS_THRES_VAR Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[2:1] LS variance threshold: See section 7.6.1 for further details. Code Interrupt generated when… 000BIN New LS_DATA varies by ± 8 counts compared to previous result. 001BIN New LS_DATA varies by ± 16 counts compared to previous result. 010BIN New LS_DATA varies by ± 32 counts compared to previous result. 011BIN New LS_DATA varies by ± 64 counts compared to previous result. 100BIN New LS_DATA varies by ± 128 counts compared to previous result. 101BIN New LS_DATA varies by ± 256 counts compared to previous result. 110BIN New LS_DATA varies by ± 512 counts compared to previous result. 111BIN New LS_DATA varies by ± 1024 counts compared to previous result. Note: Writing to this register resets the LS state machine and starts new measurements.

8.2.23 INT_CFG_0

2BHEX 0 0 LS_INT_SEL 0 0 LS_VAR_MODE LS_INT_EN Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[5:4] Light sensor interrupt source select: 00BIN Clear channel 01BIN LS / Green channel (default) 10BIN Red channel 11BIN Blue channel Bit[1] Light sensor variation interrupt mode:

0 LS Threshold Interrupt Mode (default)

1 LS Variation Interrupt Mode

Bit[0] Light sensor interrupt enable:

0 LS interrupt output pin disabled (default)

1 LS interrupt output pin enabled

8.2.24 INT_CFG_1

2CHEX 0 0 A_FULL_INT_EN PPG_INT_EN 0 0 PS_LOGIC_MODE PS_INT_EN Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[5] FIFO almost full interrupt enable: 0 FIFO almost full interrupt disabled (default). 1 FIFO almost full interrupt enabled. Bit[4] PPG data interrupt enable: 0 PPG data interrupt disabled (default). 1 PPG data interrupt enabled. Bit[1] Proximity sensor logic output mode:

0 Normal interrupt function: After an interrupt event, the INT pin maintains an active level until

the STATUS_1 register is read (default).

1 PS Logic Output Mode: The INT pin is updated after every measurement and maintains an

output state between measurements. This disables all other interrupts. Bit[0] Proximity sensor interrupt enable: 0 PS interrupt pin output disabled (default). 1 PS interrupt pin output enabled.

8.2.25 INT_PST

2DHEX LS_PERSIST PS_PERSIST Bit[7:4] These bits set the number of similar consecutive LS interrupt events that must occur before the interrupt is asserted. 0000BIN Every LS value that is out of the threshold range (default) asserts an interrupt. 0001BIN 2 consecutive LS values that are out of the threshold range assert an interrupt. 1111BIN 16 consecutive LS values that are out of the threshold range assert an interrupt. Bit[3:0] These bits set the number of similar consecutive PS interrupt events that must occur before the interrupt is asserted. 0000BIN Every PS value that is out of the threshold range (default) asserts an interrupt. 0001BIN 2 consecutive PS values that are out of the threshold range assert an interrupt. 1111BIN 16 consecutive PS values that are out of the threshold range assert an interrupt.

8.2.26 PPG_PS_GAIN

2EHEX 0 0 PPG/PS_gain_range 1 0 0 1 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[5:4] PPG/PS_gain_range: Gain scales the ADC output and noise. 00BIN Gain Mode 1 (default) 01BIN Gain Mode 1.5 10BIN Gain Mode 2 11BIN Gain Mode 4

8.2.27 PPG_PS_CFG

2FHEX 0 PPG_POW_SAVE 0 0 LED_FLIP 0 0 0 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[6] PPG power save mode: On Power Save Mode, some analog circuitry powers down between individual PPG measurements if the idle time tPPG_idle ≥ 50µs.

0 Power save mode disabled

1 Power save mode enabled (default)

Bit[3] LED_flip: Controls which LED is activated (PS, PPG1) or in which order the LEDs are activated (PPG2)

0 Standard LED operation: PS, PPG1 and the first PPG2 sample will be measured with IR LED

(LED1 pin) and second PPG2 sample with Red LED (LED2 pin) (default). 1 LEDs are flipped. PS, PPG1 and the first PPG2 sample will be measured with red LED source and second PPG2 sample with IR LED source.

8.2.28 PPG_IRLED_CURR

Default value 00HEX and 00HEX Register access R/W Bit 7 6 5 4 3 2 1 0 30HEX PPG_IRLED_CURR_0 31HEX 0 0 0 0 0 0 PPG_IRLED_CURR_1 Bits shown as ‘0’ or ‘1’ must be programmed as shown. Reg 30HEX Bit[7:0] PPG IR LED current least significant data byte; bit 0 is the LSB of the data word. Reg 31HEX Bit[1:0] PPG IR LED current most significant data byte; bit 1 is MSB. PPG IR LED current: The PPG IR LED (LED1 pin) current is adjustable in 1024 steps between 0 and nominal 250mA. BIN Code HEX Code State 0000000000BIN 000HEX LED off (0mA) (default) 0000000001BIN 001HEX LED nominal pulsed current level = 0.24mA 0000000010BIN 002HEX LED nominal pulsed current level = 0.49mA … … … 0111111111BIN 1FFHEX LED nominal pulsed current level = 125mA … … 1111111111BIN 3FFHEX LED nominal pulsed current level = 250mA

8.2.29 PPG_RLED_CURR

Default value 00HEX and 00HEX Register access R/W Bit 7 6 5 4 3 2 1 0 32HEX PPG_RLED_CURR_0 33HEX 0 0 0 0 0 0 0 PPG_RLED_CURR_1 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Reg 32HEX Bit[7:0] PPG Red LED current least significant data byte; bit 0 is the LSB of the data word. Reg 33HEX Bit[0] PPG Red LED current most significant data bit; bit 0 is the MSB. PPG Red LED current: The PPG Red LED current is adjustable in 512 steps between 0 and nominal 125mA. BIN Code HEX Code State 000000000BIN 000HEX LED off (0mA) (default) 000000001BIN 001HEX LED nominal pulsed current level = 0.24mA 000000010BIN 002HEX LED nominal pulsed current level = 0.49mA … … … 111111110BIN 1FEHEX LED nominal pulsed current level = 124.76mA 111111111BIN 1FFHEX LED nominal pulsed current level = 125mA

8.2.30 PPG_CAN_ANA

34HEX 0 0 0 0 0 PPG_CH1_CAN_ANA 0 PPG_CH2_CAN_ANA Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[2] PPG analog cancellation level for LED1: PPG_CH1_CAN_ANA determines the amount of the cancellation that is applied during the integration phase of the PPG measurement with the IR LED (LED1 pin). The following offsets apply in respect to the full-scale value of the FIFO data. 0BIN No offset cancellation (default) 1BIN 50% offset of the full-scale value Bit[0] PPG analog cancellation level for LED2: PPG_CH2_CAN_ANA determines the amount of the cancellation that is applied during the integration phase of the PPG measurement with the Red LED (LED2 pin). The following offsets apply in respect to the full-scale value of the FIFO data. 0BIN No offset cancellation (default) 1BIN 50% offset of the full-scale value

8.2.31 PPG_AVG

35HEX 0 PPG_AVG 1 0 1 0 Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[6:4] Number of averaged PPG samples: Before PPG samples are written to the FIFO, an averaging function can be applied to increase accuracy and reduce the data rate. The number of averaged PPG samples influences the measurement resolution; see Table 14. For example, averaging 16 samples reduces the data rate by a factor of 16. 000BIN 1 (no averaging) (default). 001BIN 2 consecutives samples are averaged. 010BIN 4 consecutives samples are averaged. 011BIN 8 consecutives samples are averaged. 100BIN 16 consecutives samples are averaged. 101BIN 32 consecutives samples are averaged. 110BIN 32 consecutives samples are averaged. 111BIN 32 consecutives samples are averaged.

8.2.32 PPG_PWIDTH_PERIOD

36HEX 0 PPG_pulse_width 0 PPG_measurement_period Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[6:4] PPG_pulse_width: The pulse width will have an effect on the measurement time. The pulse width and the number of averaged PPG samples determine the measurement resolution (see Table 14). Table 15 and Table 16 show which combinations of PPG pulse width and measurement period are allowed. 000BIN Reserved 001BIN Reserved 010BIN 65µs 011BIN 130µs 100BIN 247µs (default) 101BIN 481µs 110BIN 949µs 111BIN 949µs Bit[2:0] PPG_measurement_period: For PPG1 one sample is measured during the measurement period. In PPG2 Mode, two samples are measured, one for each LED. Table 15 and Table 16 show which combinations of PPG pulse width and measurement period are allowed. Code Measurement Period 000BIN 0.3125ms 001BIN 0.625ms 010BIN 1ms (default) 011BIN 1.25ms 100BIN 2.5ms 101BIN 5ms 110BIN 10ms 111BIN 20ms

Table 14. PPG Measurement Output Resolution Table 15. PPG1 Mode Parameter

Table 16. PPG2 Mode Parameter

8.2.33 FIFO_CFG

37HEX 0 0 0 FIFO_ROLLOVER_EN FIFO_A_FULL Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[4] FIFO Rollover Enable:

0 In the event of a full FIFO, no more samples of PPG data are written into the FIFO; the

samples from new measurements are lost. (default).

1 New PPG data will always be written to the FIFO, and the FIFO Write Pointer is incremented

(rollover). If the FIFO is full, old data will be overwritten. The FIFO Overflow Counter counts the number of lost (overwritten) and respectively the number of new samples. The FIFO Read Pointer remains unchanged. Bit[3:0] FIFO Almost Full Value: FIFO_A_FULL determines the number of empty FIFO words when the FIFO almost full interrupt is issued. In PPG2 Mode only even values of FIFO_A_FULL should be used. Larger values are useful for a controller with a longer latency. Code Number of Empty FIFO Words Number of Unread PPG1 Samples Number of Unread PPG2 Sample Pairs 0000BIN 0 (FIFO is full) (default) 32 (default) 16 (default) 0001BIN 1 31 – 0010BIN 2 30 15 0011BIN 3 29 – 1110BIN 14 18 9 1111BIN 15 17 –

8.2.34 FIFO_WR_PTR

Register access R/(W) Bit 7 6 5 4 3 2 1 0 38HEX 0 0 0 FIFO_WR_PTR Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[4:0] FIFO Write Pointer: The FIFO write pointer contains the FIFO index where the next sample of PPG data will be written in the FIFO. After a sample is written into the corresponding FIFO register, the FIFO write pointer is automatically incremented. The FIFO write pointer should be reset to 0 before enabling measurements through MAIN_CTRL_1. Otherwise there is no defined state and the PPG data will be written to the FIFO at the current index of the FIFO write pointer. The FIFO write pointer should not be overwritten at other times to ensure consistent data. 00000BIN FIFO register index 00DEC 00001BIN FIFO register index 01DEC … … 11110BIN FIFO register index 30DEC 11111BIN FIFO register index 31DEC

8.2.35 FIFO_RD_PTR

Register access R/(W) Bit 7 6 5 4 3 2 1 0 39HEX 0 0 0 FIFO_RD_PTR Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[4:0] FIFO Read Pointer: The FIFO read pointer contains the index of the next sample to be read from the FIFO_DATA register (see section 8.2.37). After the 3-byte sample from the FIFO_DATA register has been read, the FIFO read pointer is automatically incremented. The FIFO read pointer can be written to re-read a sample in the event of a communication error. It should always be reset to 0 before enabling measurements through the MAIN_CTRL_1 register (see section 8.2.10). 00000BIN FIFO register index 00DEC 00001BIN FIFO register index 01DEC … … 11110BIN FIFO register index 30DEC 11111BIN FIFO register index 31DEC

8.2.36 FIFO_OVF_CNT

Register access R/(W) Bit 7 6 5 4 3 2 1 0 3AHEX 0 0 0 0 FIFO_OVF_CNT Note: Bits shown as ‘0’ or ‘1’ must be programmed as shown. Bit[3:0] FIFO Overflow Counter: If the FIFO Rollover Enable bit is set, the FIFO overflow counter counts the number of old samples (up to 15) which are overwritten by new data. The FIFO overflow counter should always be reset to 0 before enabling measurements through the MAIN_CTRL_1 register (see section 8.2.10).

8.2.37 FIFO_DATA

3BHEX FIFO_DATA FIFO Data: FIFO_DATA contains the data at the index value of the FIFO read pointer. Reading the FIFO_DATA register does not increment the I2C register address. A block read from this register reads this address again and again. However the FIFO_RD_PTR register (see section 8.2.35) is incremented after reading a sample of 3 bytes (block read). For example, the entire FIFO can be read out by a block read of 96 bytes. The PPG conversion result is written MSB-aligned into the FIFO. The result must always be treated as 18-bit value regardless of the measurement resolution resulting from the pulse width setting selected in the PPG_PWIDTH_PERIOD register (see section 8.2.32). One PPG sample can be read like this: 1st read byte FIFO_DATA Bit[7:0] PPG measurement least significant data byte; bit 0 is always the LSB of the data word. 2nd read byte FIFO_DATA Bit[7:0] PPG measurement middle data byte. 3rd read byte FIFO_DATA Bit[1:0] PPG measurement most significant data byte; bit 1 is always the MSB of the data word.

8.2.38 PART_ID

3DHEX Part_Number_ID Bit[7:0] Part_Number_ID

8.2.39 DIG_GAIN_TRIM_LED1 / LED2

Default value (factory trimmed, set at power on) Register access R/W Bit 7 6 5 4 3 2 1 0 3DHEX LED1 / LED2 Digital gain trim factory setting Bit[7:0] Digital gain trim to compensate for LED brightness variation. The digital gain trim setting applies a digital scale factor to the output of the proximity and ppg sensor measurements. This scale factor is factor- set to achieve the proximity sensor accuracy specification. When using the OB1203 in biosensor mode with an autogain algorithm that controls the LED currents to achieve a desired PPG signal level, it is recommended to overwrite the power-on default values of registers 0x42 and 0x43 with value 0x00, which is unity (1x) gain. This ensures the output FIFO values run between 0 and 218-1.

The package outline drawings are appended at the end of this document. The package information is the most current data available. Table 17. Recommended Reflow Profile Refer to the JEDEC specification for an illustration of the reflow profile chart.

© 2020-2022 Renesas Electronics Corporation 68 July 22, 2022 11. Marking Diagram: Bottom of Part Only 12. Ordering Information Part Number Description and Package MSL Rating Carrier Type Temp. Range OB1203SD-C4V 4.2 × 2.0 × 1.2 mm 14-OSIP 3 Tray -40°C to +85°C OB1203SD-C4R 4.2 × 2.0 × 1.2 mm 14-OSIP 3 Reel -40°C to +85°C OB1203LC-C4V 4.2 × 2.0 × 1.2 mm 14-OSIP 3 Tray -40°C to +85°C OB1203LC-C4R 4.2 × 2.0 × 1.2 mm 14-OSIP 3 Reel -40°C to +85°C US082-OB1203EVZ OB1203SD sensor breakout board with PMOD connector interface US082-OB1203LCEVZ OB1203LC sensor breakout board with PMOD connector interface OB120SD-RL2-EVK OB1203 Health Sensor Evaluation Kit – PCB with programming and debug ports with low power RL78 microcontroller running demo algorithm and finger support, OLED display. OB1203SD-BT2-EVK OB1203 Health Sensor Evaluation Kit – Bluetooth including OB1203 Sensor Board with Bluetooth Chip, Rechargeable Battery. Android app is downloadable. 13. Glossary Term Description ADC Analog-to-Digital Converter AOI Angle of Incidence Comp. Temperature Compensation (Dark Channel for Light Sensor) CS Color Sensor Function using the Red, Green, Blue, Clear and Comp. Sensors FIFO First-In-First-Out Register Bank

© 2020-2022 Renesas Electronics Corporation 69 July 22, 2022 Term Description FSM Finite State Machine HP High Precision (Oscillator) ICE Integrated Concept Engine JEDEC Joint Electron Device Engineering Council LP Low Power (Oscillator) LS Light Sensor Function using the Clear, Green and Comp Sensors in the OB1203 LSB Least Significant Bit MCU Microcontroller Unit MSB Most Significant Bit NVM Nonvolatile Memory OSIP Optical System in Package POR Power-on Reset PPG Photoplethysmography RGB Red, Green, Blue SDA Serial Data SCL Serial Clock SW Software 14. Revision History Revision Date Description of Change July 22, 2022  Updated summary description  Updated the pin descriptions  Updated the part ID  Added bio digital trim registers to register map  Added references to OB1203LC version. Added figure for PS/PPG photodiode response.  Completed other minor changes January 12, 2021 Updated the STATUS_1 register description. November 2, 2020 Updated the description of Peak Package Body Temperature (TP) in Table 17. May 29, 2020 Initial release.

1.40 (3.90) 3.0 14X 0.4514X 0.30 (0.13)(0.13) (Ø0.075) (0.71)(1.03)(1.20) (0.28)(0.26) (1.20) 4.20 (0.10) 0.350.20 0.08C SEATING PLANESIDE VIEW BOTTOM VIEW TOP VIEW PIN1 CHAMFER 0.1CAB 0.1CAB0.50 (1.20) 2.00(1.70) 0.1C 1.331.07A B B © Renesas Electronics Corporation

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