UPG174TA NEC | Alldatasheet

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L-BAND PA DRIVER AMPLIFIER The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. GaAs INTEGRATED CIRCUIT µµµµPG174TA Document No. P13230EJ2V0DS00 (2nd edition) Date Published January 2000 N CP(K) Printed in Japan DATA SHEET The mark shows major revised points. © 1998, 2000

DESCRIPTION

The µPG174TA is L-Band PA driver amplifier developed for digital cellular telephone and PCS applications. This device feature high output power and low distortion with 2.8 V low voltage and 35 mA low current operation. It is housed in a very small 6-pin minimold package available on tape-and-reel and easy to install and contributes to miniaturizing the systems.

FEATURES

y Low operation voltage : VDD = 2.8 V y Low distortion : P adj1 = –60 dBc TYP. @ VDD = 2.8 V, fRF = 1 429 to 1 453 MHz, Pout = +10 dBm Off-chip input and output matching y Low operation current : IDD = 35 mA TYP. @ VDD = 2.8 V, fRF = 1 429 to 1 453 MHz, Pout = +10 dBm Off-chip input and output matching y 6-pin minimold package APPLICATION y Digital Cellular: PDC1.5G, DCS1800, PCS, etc.

ORDERING INFORMATION

Part Number Package Supplying Form µPG174TA-E3 6-pin minimold Carrier tape width is 8 mm. Qty 3kp/reel. Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: µPG174TA) ABSOLUTE MAXIMUM RATINGS (T A = +25°C) Parameters Symbol Ratings Unit Supply Voltage V DD 6.0 V Input Power P in –10 dBm Total Power Dissipation P tot 170 Note mW Operating Ambient Temperature T A –30 to +90 °C Storage Temperature T stg –35 to +150 °C Note Mounted on a 50 × 50 × 1.6 mm double copper clad epoxy glass PWB, TA = +85°C Caution The IC must be handled with care to prevent static discharge because its circuit composed of GaAs HJ-FET.

Data Sheet P13230EJ2V0DS002 µµµµPG174TA PIN CONNECTION AND INTERNAL BLOCK DIAGRAM G1D (Top View) (Bottom View) RECOMMENDED OPERATING CONDITIONS (T A = +25°C) Parameters Symbol MIN. TYP. MAX. Unit Supply Voltage 1, 2 V DD1, 2 +2.7 +2.8 +3.0 V Input Power P in – –22 –20 dBm

ELECTRICAL CHARACTERISTICS

(Unless otherwise specified, TA = +25°C, VDD1 = VDD2 = +2.8 V, ππππ/4DQPSK modulated signal input, off-chip input and output matching) Parameters Symbol Test Conditions MIN. TYP. MAX. Unit Operating Frequency f 1 429 – 1 453 MHz Power Gain G P Pin = –22 dBm 32.0 34.0 – dB Total Current I DD Pin = –22 dBm – 35 40 mA Adjacent Channel Power Leakage 1 P adj1 Pout = +10 dBm, Δf = ±50 kHz – –60 –55 dBc Adjacent Channel Power Leakage 2 P adj2 Pout = +10 dBm, Δf = ±100 kHz – –65 –60 dBc REFERENCE CHARACTERISTICS (Unless otherwise specified, TA = +25°C, VDD1 = VDD2 = +2.8 V, f = 1 429 to 1 453 MHz, off-chip input and output matching) Parameters Symbol MIN. TYP. MAX. Unit Input Return Loss RL in –1 0– d B Output Return Loss RL out –1 0– d B Pin No. Connection 1G N D 2G N D 3I N 4V DD1 5G N D 6V DD2 & OUT

Data Sheet P13230EJ2V0DS00 3 µµµµPG174TA EVALUATION CIRCUIT VDD1 = VDD2 = +2.8 V, f = 1 429 to 1 453 MHz G1D 32 1 5 6 VDD1 VDD2 C3 Zo = 50 Ω Zo = 50 Ω OUT IN Using the NEC Evaluation board Parts List Value C1, C2 1 000 pF C3 2.0 pF R1 10 Ω L1 6.8 nH L2 3.3 nH

Data Sheet P13230EJ2V0DS004 µµµµPG174TA EVALUATION BOARD (Epoxy Glass, εεεε = 4.6, 0.4 mm thickness) VDD1 OUT VDD2 IN 38 mm 40 mm VDD1 OUT VDD2 IN

Data Sheet P13230EJ2V0DS00 5 µµµµPG174TA TYPICAL CHARACTERISTICS OUTPUT POWER AND ADJACENT CHANNEL POWER LEAKAGE vs. INPUT POWER @V DD = +2.8 V, f = 1 450 MHz −35 −30 −25 Input Power Pin (dBm) Adjacent Channel Power Leakage Padj1, Padj2 (dBc) Output Power Pout (dBm) −20 −15 −70 −80 −60 −50 −40 −30 −20 P out Padj1 Padj2

Data Sheet P13230EJ2V0DS006 µµµµPG174TA −35 −25 −15 POWER GAIN AND TOTAL CURRENT vs. INPUT POWER @V DD = −2.8 V, f = 1 450 MHz Input Power Pin (dBm) Total Current IDD (mA) Power Gain Gp (dB) G p IDD

Data Sheet P13230EJ2V0DS00 7 µµµµPG174TA PACKAGE DIMENSIONS

6 PIN MINIMOLD PACKAGE (UNIT: mm)

2.8 +0.2 –0.3 0 to 0.1 1.5 +0.2 –0.1 0.3 +0.1 –0.0 12 3 65 4 0.95 0.95 1.9 2.9 –0.2 0.13 –0.1 0.8 1.1 +0.2 –0.1

Data Sheet P13230EJ2V0DS008 µµµµPG174TA RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235°C or below Time: 30 seconds or less (at 210°C) Count: 3, Exposure limit: None Note IR35-00-3 Time: 40 seconds or less (at 200°C) Count: 3, Exposure limit: None Note VP15-00-3 Wave Soldering Soldering bath temperature: 260°C or below Time: 10 seconds or less Count: 1, Exposure limit: None Note WS60-00-1 Partial Heating Pin temperature: 300°C Time: 3 seconds or less (per side of device) Exposure limit: None Note Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).

Data Sheet P13230EJ2V0DS00 9 µµµµPG174TA [MEMO]

Data Sheet P13230EJ2V0DS0010 µµµµPG174TA [MEMO]

Data Sheet P13230EJ2V0DS00 11 µµµµPG174TA [MEMO]

µµµµPG174TA Caution The Great Care must be taken in dealing with the devices in this guide. The reason is that the material of the devices is GaAs (Gallium Arsenide), which is designated as harmful substance according to the law concerned. Keep the law concerned and so on, especially in case of removal.

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