UPC8110GR NEC | Alldatasheet

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Caution electro-static sensitive device The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. BIPOLAR ANALOG INTEGRATED CIRCUIT µµµµPC8110GR

1 GHz DIRECT QUADRATURE MODULATOR

FOR DIGITAL MOBILE COMMUNICATION Document No. P11074EJ3V0DS00 (3rd edition) Date Published October 1999 N CP(K) Printed in Japan DATA SHEET © 1996, 1999 The mark shows major revised points.

DESCRIPTION

The µPC8110GR is a sillicon monolithic integrated circuit designed as 1 GHz direct quadrature modulator for digital mobile communication systems. This modulator housed in a 20 pin plastic SSOP that easy to install and contributes to miniaturizing the system. The device has power save function and can operates 2.7 to 3.6 V supply voltage to realize low power consumption.

FEATURES

  • Direct modulation range : 800 MHz to 1 GHz
  • Supply voltage range : V CC = 2.7 to 3.6 V
  • Low operation current : ICC = 24 mA typical @ VCC = 3 V
  • Low phase difference due to digital phase shifter is adopted.
  • 20 pin SSOP suitable for high density surface mounting.
  • Low current sleep mode APPLICATION
  • Digital cellular phone (PDC, IS-54/IS-136, GSM etc..)

ORDERING INFORMATION

PART NUMBER PACKAGE PACKING FORM µPC8110GR-E1 20 pin plastic SSOP Carrier tape width 12 mm. Q’ty 2.5 kp/Reel Pin 1 indicated pull-out direction of tape. Remark For evaluation sample order, please contact your local NEC sales office. (Order number: µPC8110GR)

Data Sheet P11074EJ3V0DS002 µµµµPC8110GR INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (Top View) 90˚ Phase Sitter REG. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. LO in GND LO in GND Q-INPUT Q-INPUT I-INPUT I-INPUT GND GND RF out GND GND V CC GND GND Power Save (V PS ) GND V CC GND SERIES PRODUCTS SERIES TYPE PART NUMBER f LO1in (MHz) f MODout (MHz) f I/Q (MHz) Up-Converter f RFout (MHz) APPLICATION

150 MHz Quadrature

µPC8101GR 100 to 300 50 to 150 DC to 0.5 External CT2, Digital Comm. Up-Con+Quadrature MOD µPC8104GR 100 to 400 DC to 10 900 to 1900 PHS, PDC etc..

400 MHz Quadrature

µPC8105GR 100 to 400 DC to 10 External PDC, IS -136, GSM, PHS 1 GHz direct Quad MOD µPC8110GR 800 to 1000 DC to 10 Direct PDC, IS-136, GSM etc. Remark As for detail information of series products, please refer to each data sheet.

Data Sheet P11074EJ3V0DS00 3 µµµµPC8110GR APPLICATION EXAMPLE PDC 900 MHz (Direct Modulation Type) ANT RX TX SW PA BPF RSSI DEMO I Q RSSI OUT PLL 90˚ F/F I Q

900 MHz Direct Quadrature Modulator

PC8110GRµ ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNIT TEST CONDITIONS Supply Voltage V CC 4.0 V T A = +25 °C Power Save Voltage V PS 4.0 V T A = +25 °C Power Dissipation P D 430 mW TA = +85 °C Note 1 Operating Temperature T opt −40 to +85 °C Storage Temperature T stg −55 to +150 °C Note 1. Mounted on 50 × 50 × 1.6 mm double copper clad epoxy glass board RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Supply Voltage V CC 2.7 3.0 3.6 V Operating Temperature T opt −40 +25 +85 °C LO Input Frequency fL Oin 800 900 1000 MHz LO Input Power Level PL Oin −15 −10 −7d B m I/Q Input Frequency f I/Qin DC 10 MHz I/Q Input Voltage V I/Qin 500 mV p-p Single ended input

250 Differential input

Data Sheet P11074EJ3V0DS004 µµµµPC8110GR ELECTRICAL CHARACTERISTICS (T A = 25 °C, VCC = 3.0 V, Unless Otherwise Specified VPS ≥≥≥≥ 2.2 V (High)) PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Circuit Current I CC 20 24 33 mA No input signal Circuit Current at Power Save Mode ICC(PS) 10 uA V PS ≤ 0.5 V (Low) Maximum Output Power P o(sat) −13 −10 dBM LO Carrier Leak LoL −35 −30 dBc Image Rejection (Side Band Leak) ImR −40 −30 dBc I/Q 3rd Order Intermodulation Distortion IM3I/Q −45 −30 dBc Power Save Rise Time T PS(RISE) 35 µsV PS : Low → High Power Save Fall Time T PS(FALL) 25 µsV PS : High → Low STANDARD CHARACTERISTICS FOR REFERENCE (TA = +25 °C, VCC = 3.0 V, Unless Otherwise Specified VPS ≥≥≥≥ 2.2 V (Hgih)) PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS I/Q Input Impeadance Z I/Qin 150 k Ω fI/Q = DC to 10 MHz LO Input VSWR VSWR (Lo) 1.5 : 1 − fLO = 948 MHz RF Output VSWR VSWR (RF) 1.5 : 1 − fLO = 948 MHz fLOin = 948 MHz PLOin = −10 dBm fI/Q = 2.625 kHz I/Q (DC) = VCC /2 VI/Qin = 500 mVp-p (Single ended)

Data Sheet P11074EJ3V0DS00 5 µµµµPC8110GR PIN EXPLANATION Pin No. ASSIGNMENT SUPPLY VOL. (V) PIN VOL. (V) FUNCTION AND APPLICATION EQUIVALENT CI RCUIT 1L Oin  2.6 L O input for phase shifter. Connect around 50 Ω between 1 and 3 pin to match to 50 Ω . GND (for Local Amp. Block) 0  Connect to the ground with minimum inductance. Track length should be kept as short as possible. 3L Oin  2.6 Bypass of L O input. This pin is grounded through around 33 pF capacitor. 5Q V CC /2  Input for Q signal. This input impedance is 150 kΩ . In case of that I/Q input signals are single ended, amplitude of the signal is 500 mVp-p max. Note 2 6Q V CC /2  Input for Q signal. This input impedance is 150 kΩ . In case of that I/Q input signals are single ended, V CC /2 biased DC signal should be input. In case of that I/Q input signals are differential, amplitude of the signal is 250 mVp-p max. Note 2 7I V CC /2  Input for I signal. This input impedance is 150 kΩ . In case of that I/Q input signals are single ended, V CC /2 biased DC signal should be input. In case of that I/Q input signals are differential, amplitude of the signal is 250 mVp-p max. Note 2 8I V CC /2  Input for I signal. This input impedance is 150 kΩ . In case of that I/Q input signals are single ended, amplitude of the signal is 500 mVp-p max. Note 2 GND (for Quadrature Modulator Block) 0  Connect to the ground with minimum inductance. Track length should be kept as short as possible. 5 6 8 7

Data Sheet P11074EJ3V0DS006 µµµµPC8110GR Pin No. ASSIGNMENT SUPPLY VOL. (V) PIN VOL. (V) FUNCTION AND APPLICATION EQUIVALENT CI RCUIT 11 RF out  1.6 Output from modulator. This is single-end push-pull amplifier. So this output impedance is Low.

12 GND

(for Output Push-pull Amplifier) 0  Connect to the ground with minimum inductance. Track length should be kept as short as possible.

14 VCC

(for Output Amplifier of Modulator) 2.7 to 3.6  Supply voltage pin for Output Amplifier of modulator. Internal regulator can be kept stable condition of supply bias against the variable temperature or V CC .

17 Power Save V P/S  Power save control pin can be

controlled ON/SLEEP state with bias as follows; 19 V CC 2.7 to 3.6  Supply voltage pin for modulator except output Amplifier. Internal regulator can be kept stable condition of supply bias against the variable temperature or V CC . GND 0  Connect to the ground with minimum inductance. Track length should be kept as short as possible. Note 2. Relations between amplitude and VCC /2 bias of input signal are following. PI/Qin - I/Q Input Signal - mVp-p Single ended input I = Q Differential input I = I = Q = Q 2.7 to 3.6 1.35 to 1.8 ≤ 500 ≤ 250 From Modulator VP/S STATE 2.2 to 3.6 ON 0 to 0.5 SLEEP I/Q DC Voltage (V) VCC /2 = I = I = Q = Q Supply Voltage VCC (V)

Data Sheet P11074EJ3V0DS00 7 µµµµPC8110GR EXPLANATION OF INTERNAL FUNCTION BLOCK FUNCTION/OPERATION BLOCK DIAGRAM 90 ° PHASE SHIFTER Input signal from LO is send to digital circuit of T-type flip-flop through frequency doubler. Output signal from T-type F/F is changed to same frequency as L O input and that have quadrature phase shift, 0 °, 90 °, 180 °, 270 °. These circuits have function of self phase correction to make correctly quadrature signals. BUFFER AMP. Buffer amplifiers for each phase signals to send to each mixers. MIXER Each signals from buffer amp. are quadrature modulated with two double-balanced mixers. High accurate phase and amplitude inputs are realized to good performance for image rejection. ADDER Output signals from each mixers are added with adder and send to final amplifier. I from LOin × 2 ÷ 2 F/F I Q Q to MODout

Data Sheet P11074EJ3V0DS008 µµµµPC8110GR TYPICAL CHARACTERISTICS Unless otherwise specified TA = +25 °C, VCC = VPS = 3 V, I/Q DC/offset = I/Q DC offset = 1.5 V, I/Q Input signal = 500 mV p-p (Single ended), fI/Q = 2.625 kHz, fLOin = 948 MHz, PLOin = −10 dBm, <PDC> Transmission speed: 42 kbps, RNYQ: a = 0.5. CIRCUIT CURRENT vs SUPPLY VOLTAGE ICC - Circuit Current - mA VCC - Supply Voltage - V TA = +25 ˚C TA = –40 ˚C TA = +85 ˚C VCC = VPS I/Q (DC) = VCC /2 RF None CIRCUIT CURRENT vs POWER SAVE VOLTAGE ICC - Circuit Current - mA VPS - Power Save Voltage - V TA = +25 ˚C TA = –40 ˚C TA = +85 ˚C VCC = 3 V I/Q (DC) = 1.5 V RF None

Data Sheet P11074EJ3V0DS00 9 µµµµPC8110GR RF OUTPUT POWER vs I/Q INPUT SIGNAL (at TA = –40 ˚C) –10 –15 –20 –25 100 200 300 400 500 PRFout - RF Output Power - dBm PI/Qin - I/Q Input Signal - mVp-p VCC = 3.0 V VCC = 2.7 V VCC = 3.6 V Single ended RF OUTPUT POWER vs I/Q INPUT SIGNAL (at TA = +25 ˚C) –10 –15 –20 –25 100 200 300 400 500 PRFout - RF Output Power - dBm PI/Qin - I/Q Input Signal - mVp-p VCC = 3.0 V VCC = 2.7 V VCC = 3.6 V Single ended RF OUTPUT POWER vs I/Q INPUT SIGNAL (at TA = +85 ˚C) –10 –15 –20 –25 100 200 300 400 500 PRFout - RF Output Power - dBm PI/Qin - I/Q Input Signal - mVp-p VCC = 3.0 V VCC = 2.7 V VCC = 3.6 V Single ended

Data Sheet P11074EJ3V0DS0010 µµµµPC8110GR –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm ImR ImR ImR ImRImRImR LoL LoL LoL LoLLoL LoL PRFout IM3I/Q PRFout IM3I/Q PRFout IM3I/Q PRFout IM3I/Q PRFout IM3I/Q PRFout IM3I/Q

Data Sheet P11074EJ3V0DS00 11 µµµµPC8110GR –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +85 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +85 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 700 800 9001000 1100 –10 –15 –20 –25 –30 Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +85 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc fLO - Local Input Frequency - MHz PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 –5–10 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR ImR ImR ImR LoL LoL LoL LoL –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL PRFout IM3I/Q PRFout IM3I/Q PRFout IM3I/Q PRFout IM3I/Q PRFout PRFout IM3I/Q IM3I/Q

Data Sheet P11074EJ3V0DS0012 µµµµPC8110GR –30 –35 –40 –45 –50 –55 –5–10 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 2.7 V, TA = +85 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.0 V, TA = +85 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.6 V, TA = +85 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL –30 –35 –40 –45 –50 –55 –5–10 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 2.7 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.0 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL –30 –35 –40 –45 –50 –55 –10 –10 –15 –20 –25 –30 Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.6 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc LO - Local Input Power - dBm PRFout - RF Output Power - dBm ImR LoL PRFout IM3I/QIM3I/QIM3I/Q PRFout IM3I/Q IM3I/QIM3I/Q PRFoutPRFout PRFout PRFout

Data Sheet P11074EJ3V0DS00 13 µµµµPC8110GR I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = –40 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.25 1.35 1.45 I/Q (DC) - I/Q Supply Voltage - V PRFout IM3I/Q I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = –40 ˚C) –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.4 1.5 1.6 I/Q (DC) - I/Q Supply Voltage - V IM3I/Q PRFout LoL ImR I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = –40 ˚C) –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.7 1.8 1.9 I/Q (DC) - I/Q Supply Voltage - V PRFout LoL ImR IM3I/Q I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +25 ˚C) LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.25 1.35 1.45 I/Q (DC) - I/Q Supply Voltage - V I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +25 ˚C) –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.4 1.5 1.6 I/Q (DC) - I/Q Supply Voltage - V I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +25 ˚C) –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.7 1.8 1.9 I/Q (DC) - I/Q Supply Voltage - V LoL ImR IM3I/Q ImR LoL PRFout PRFout LoL ImR IM3I/Q IM3I/Q ImR LoL PRFout LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm

Data Sheet P11074EJ3V0DS0014 µµµµPC8110GR I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +85 ˚C) –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.25 1.35 1.45 I/Q (DC) - I/Q Supply Voltage - V –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.4 1.5 1.6 I/Q (DC) - I/Q Supply Voltage - V I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +85 ˚C) –30 –35 –40 –45 –50 –55 –10 –15 –20 –25 –30 1.7 1.8 1.9 I/Q (DC) - I/Q Supply Voltage - V I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +85 ˚C) IM3I/Q ImR LoLPRFout IM3I/Q ImR LoL PRFout IM3I/Q ImR LoL PRFout LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc PRFout - RF Output Power - dBm

Data Sheet P11074EJ3V0DS00 15 µµµµPC8110GR TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM <PDC> 42 kbps, RNYQ α = 0.5, MOD Pattern [0000] ATT 10 dB A_write B_blankREF 0.0 dBm 10 dB/ RBW 300 Hz VBW 300 Hz SWP 1.2 s CENTER 948.00000 MHz SPAN 50.0 kHz IM3I/Q ImR LOL Pout Δ MARKER –10.50 kHz –47.36 dB 2 3 TYPICAL π/4DQPSK MODULATION OUTPUT SPECTRUM <PDC> 42 kbps, RNYQ α = 0.5, MOD Pattern [PN9] Δ MKR –10.50 kHz REF Level 0 dBm 10 dB/ ADJ BS 21 kHz RBW 3 kHz VBW 3 kHz SWP 5 s CENTER 948 MHz SPAN 500 kHz Padj (dB) No.1 : 947.90 MHz No.2 : 947.95 MHz No.3 : 948.05 MHz No.4 : 948.10 MHz –78.0 dB –67.0 dB –70.3 dB –77.8 dB Δf = –100 kHz Δf = –50 kHz Δf = +50 kHz Δf = +100 kHz Marker

Data Sheet P11074EJ3V0DS0016 µµµµPC8110GR REF 0.0 dBm 10 dB/ Δ MKR 2.714 s RBW

3 MHz

50 s CENTER 948.002642 MHz SPAN 0 Hz ATT 10 dB A_view B_blank POWER SAVE RESPONSE (at V CC = VPS = 2.7 V) REF 0.0 dBm 10 dB/ Δ MKR 2.714 s RBW 50 s CENTER 948.002642 MHz SPAN 0 Hz ATT 10 dB A_view B_blank POWER SAVE RESPONSE (at V CC = VPS = 3.0 V) REF 0.0 dBm 10 dB/ Δ MKR 2.714 s RBW 50 s CENTER 948.002642 MHz SPAN 0 Hz ATT 10 dB A_view B_blank POWER SAVE RESPONSE (at V CC = VPS = 3.6 V) Δ MARKER 2.714 s 44.41 dB µ Δ MARKER 2.714 s 45.97 dB Δ MARKER 2.714 s 48.97 dB µ µµ µ µ µ µ µ

Data Sheet P11074EJ3V0DS00 17 µµµµPC8110GR LO INPUT (LOin) IMPEDANCE MARKER 1

948 MHz

1 : 30.055 Ω 7.1015 Ω 1.1922 nH 948.000 000 MHz START 700.000 000 MHz STOP 1 100.000 000 MHz MARKER 1 1 : 30.191 Ω 7.1309 Ω 1.1872 nH 948.000 000 MHz START 700.000 000 MHz STOP 1 100.000 000 MHz VCC = VPS = 2.7 V VCC = VPS = 3.0 V MARKER 1 1 : 30.189 Ω 7.001 Ω 1.1754 nH 948.000 000 MHz START 700.000 000 MHz STOP 1 100.000 000 MHz VCC = VPS = 3.6 V

Data Sheet P11074EJ3V0DS0018 µµµµPC8110GR RF OUTPUT (RFout) IMPEDANCE MARKER 1 1 : 45.74 Ω –2.8633 Ω 56.634 pF 948.000 000 MHz START 700.000 000 MHz STOP 1 100.000 000 MHz MARKER 1 1 : 45.005 Ω –2.6352 Ω 59.199 pF 948.000 000 MHz START 700.000 000 MHz STOP 1 100.000 000 MHz VCC = VPS = 2.7 V V CC = VPS = 3.0 V MARKER 1 1 : 45.925 Ω –2.6719 Ω 62.834 pF 948.000 000 MHz START 700.000 000 MHz STOP 1 100.000 000 MHz VCC = VPS = 3.6 V 1 1

Data Sheet P11074EJ3V0DS00 19 µµµµPC8110GR TEST CIRCUIT LOin 33 pF 33 pF 51 Ω Q in Q in Iin Iin V ps VCC 1 VCC 2 0.22 F 0.22 F µ µ 100 pF 1000 pF RF out33 pF 100 pF 1000 pF

Data Sheet P11074EJ3V0DS0020 µµµµPC8110GR MEASUREMENT BLOCK DIAGRAM 1 (RF Output Power, Local Carrier Leak, Image Rejection, I/Q 3rd Order Intermodulation Distortion and Power Save Rise and Fall Time) Q in Q in Iin Iin QbQ I/Q Signal Generator 33 pF 33 pF LOin 51 Ω Vps VCC 1 VCC 2 0.22 Fµ µ0.22 F 100 pF 1000 pF RF out33 pF 100 pF 1000 pF Voltage Source Voltage Source Pulse pattern Generator Signal Generator Spectrum Analyzer Ib I

Data Sheet P11074EJ3V0DS00 21 µµµµPC8110GR MEASUREMENT BLOCK DIAGRAM 2 (Local Input VSWR and RF Output VSWR) Q in Q in Iin Iin 33 pF 33 pF LOin 51 Ω Vps VCC 1 VCC 2 0.22 Fµ µ0.22 F 100 pF 1000 pF RF out33 pF 100 pF 1000 pF Voltage Source Voltage Source Network Analyzer Voltage Source Network Analyzer

Data Sheet P11074EJ3V0DS0022 µµµµPC8110GR TEST BOARD 33 pF 33 pF 51 Ω Bypass Capacitor VCC 2 RF out PC8110GRµ Bypass Capacitor VPS Short VCC 1 LOin Q in Iin 33 pF Q in Iin Notes 1. Double-sided patterning with 35 µm thick copper on polyhimid board sizing 50 × 50 × 0.4 mm. 2. GND pattern on backside. 3. Solder coating over patterns. 4. {, indicate through-holes.

Data Sheet P11074EJ3V0DS00 23 µµµµPC8110GR PACKAGE DIMENSIONS

20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)

1.8 MAX. +7˚ –3˚ 0.65 0.10 M 0.15 0.5 ± 0.2 11 0 6.7 ± 0.3 1.5 ± 0.1 0.1 ± 0.1 0.22 +0.10 –0.05 0.575 MAX. 0.15 +0.10 –0.05 6.4 ± 0.2 NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.

Data Sheet P11074EJ3V0DS0024 µµµµPC8110GR NOTE ON CORRECT USE (1) Observe precautions for handling because of electrostatic sensitive devices. (2) Form a ground pattern as wide as possible to keep the minimum ground impedance (to prevent undesired oscillation). (3) Keep the track length of the ground pins as short as possible. (4) Connect a bypass capacitor (e.x. 1 000 pF) to the V CC pin. (5) I, Q DC offset voltage should be same as the I, Q DC offset voltage (to prevent changing the local leak level with power save control.) RECOMMENDED SOLDERING CONDITIONS This product should be soldered in the following recommended conditions. Other soldering method and conditions than the recommended conditions are to be consulted with our sales representatives. µµµµPC8110GR Soldering process Soldering conditions Symbol Infrared ray reflow Peak package’s surface temperature: 235 °C or below, Reflow time: 30 seconds or below (210 °C or higher), Number of reflow process: 3, Exposure limit Note : None IR35-00-3 VPS Peak package’s surface temperature: 215 °C or below, Reflow time: 40 seconds or below (200 °C or higher), Number of reflow process: 3, Exposure limit Note : None VP15-00-3 Wave soldering Solder temperature: 260 °C or below, Flow time: 10 seconds or below, Number of flow process: 1, Exposure limit Note : None WS60-00-1 Partial heating method Terminal temperature: 300 °C or below, Flow time: 3 seconds/pin or below, Exposure limit Note : None Note Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 °C and relative humidity at 65 % or less. Caution Apply only a single process at once, except for “Partial heating method”. For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).

Data Sheet P11074EJ3V0DS00 25 µµµµPC8110GR [MEMO]

Data Sheet P11074EJ3V0DS0026 µµµµPC8110GR [MEMO]

Data Sheet P11074EJ3V0DS00 27 µµµµPC8110GR [MEMO]

µµµµPC8110GR

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