UPC8100GR-E2

UPC8100GR NEC | Alldatasheet

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Technical content

© 1995,1999 DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC8100GR

DESCRIPTION

µPC8100GR is a silicon monolithic integrated circuit designed as up/down converters for 800 MHz to 900 MHz mobile communications, mainly CT2. This IC consists of upconverter and downconverter, which are packaged in 20 pin SSOP. Quadrature modulator IC ( µPC8101GR) is also available as for kit-use with this IC. So, these pair devices contribute to make RF block small, high-performance and low power-consumption. This product is manufactured using NEC’s 20 GHz fT NESAT  III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion and migration. Thus, this product has excellent performance, uniformity and reliability.

FEATURES

• Operating frequency – fRF = 800 MHz to 900 MHz, fIF = 50 MHz to 150 MHz, fLo = 650 MHz to 1 050 MHz
• Upconverter and downconverter are integrated in 1 chip.
• 20 pin SSOP suitable for high-density surface mounting.
• Wide operating voltage VCC = 2.7 to 4.5 V
• Equipped with Power Save Function.
• Excellent linearity

APPLICATIONS

• Typical application – Digital cordless phone CT2.
• Further application – Digital cellular, etc.

ORDERING INFORMATION

Remark To order evaluation samples, please contact your local NEC sales office. (Order number: µPC8100GR) Document No. P10817EJ3V0DS00 (3rd edition) Date Published October 1999 N CP(K) Printed in Japan Caution electro-static sensitive devices PART NUMBER PACKAGE SUPPLYING FORM µPC8100GR-E2 20 pin plastic SSOP Embossed tape 12 mm wide. QTY 2.5 kp/Reel. (225 mil) Pin 1 indicates roll-in direction of tape. SILICON UP/DOWN CONVERTERS IC FOR 800 MHz to 900 MHz MOBILE COMMUNICATIONS The mark shows major revised points. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

µPC8100GR Data Sheet P10817EJ3V0DS00 INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (Top View) 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. GND RF BYPASS RF INPUT PEAKING OUT P/S (for DOWN CONV.) P/S (for UP CONV.) V CC (for UP CONV.) RF OUTPUT GND MIX OUTPUT1 MIX OUTPUT2 GND IF BYPASS IF INPUT OSC INPUT (for UP CONV.) OSC BYPASS (for UP CONV.) OSC BYPASS (for DOWN CONV.) OSC INPUT (for DOWN CONV.) V CC (for DOWN CONV.) IF OUTPUT 20 19 18 17 16 15 14 13 12 11 12345678 9 1 0 REG. REG.

µPC8100GR Data Sheet P10817EJ3V0DS00 PIN EXPLANATION 1 GND 0.0 – 2 RF bypass – 1.1 3 RF input – 0.9 4 Peaking out – 0.12 5 Power-save pin 0 to 4.5 – for downconverter 6 Power-save pin 0 to 4.5 – for upconverter 7V CC for 2.7 to 4.5 – upconverter

8 RF output same as –

9 GND 0.0 – or REG. PIN ASSIGNMENT APPLIED PIN VOLTAGE FUNCTION AND APPLICATION EQUIVALENT CIRCUITNO. VOLTAGE (V) (V) Ground for downconverter. Must be connected to the system ground with minimum inductance. Ground pat- tern on the board should be formed as wide as possible. (Track length should be kept as short as possible.) Bypass of RF input for downconverter. This pin is RF input for downconverter designed as double balanced mixer. This high-impedance input should be matched with external chip inductor. (eg 4.7 nH). Open emitter pin of low noise amplifier. Grounded with capacitor (eg 3 pF) and register (eg 22 Ω ) serially. This pin can control downconverter’s ON/OFF operation with bias as follows; Bias: V Operation VPS ≥1.8 ON 0 to 1.0 OFF This pin can control upconverter’s ON/ OFF operation with bias as follows; Bias: V Operation VPS ≥1.8 ON 0 to 1.0 OFF Supply voltage for upconverter. Must be connected bypass capacitor (e.g 1 000 pF) to minimize ground im- pedance. F output from upconverter. Connect the VCC through inductor (eg 15 nH). Ground for RF amplifier of upconverter. REG. REG. VCC

µPC8100GR Data Sheet P10817EJ3V0DS00 Mixer output from upconverter. Mixer output from upconverter. 10 and 11 pins should be externally equipped with tank circuit of inductor (eg 4.7 nH) and capacitor (eg 3.5 pF). Ground for oscillator buffer amplifier and mixer of upconverter. Must be connected to the system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. (Track length should be kept as short as possible.) Bypass of IF input for upconverter. This pin is IF input for upconverter designed as double balanced mixer. This high-impedance input should be externally equipped with matching circuit of inductor (eg 220 nH) and capacitor (eg 1.5 pF). Local oscillator input for upconverter. Re- quired for matching with register 51 Ω . Bypass of local oscillator input for upconverter. Bypass of local oscillator input for downconverter. Local oscillator input for down- converter. Required for matching with register 51 Ω . Supply voltage for downconverter. It must be connected bypass capacitor (e.g 1 000 pF) to minimize ground impedance. IF output from downconverter. PIN EXPLANATION PIN ASSIGNMENT PIN VOLTAGE FUNCTION AND APPLICATION EQUIVALENT CIRCUITNO. (V) REG. VCC 10 11 10 MIX OUT 1 2.3 11 MIX OUT 2 2.3

12 GND 0 *

13 IF bypass 1.03 14 IF input 1.03 15 OSC input 1.8 (for upconverter) 16 OSC bypass 1.8 (for upconverter) 17 OSC bypass 1.85 (for down- converter) 18 OSC input 1.85 (for down- converter) 19 V CC supply for 2.7 to 4.5* for down- converter 20 IF output 1.45 1815 , 1716 , VCC VCC * Externally supply voltage

µPC8100GR Data Sheet P10817EJ3V0DS00 ABSOLUTE MAXIMUM RATINGS Supply Voltage V CC TA = +25 °C 5.0 V Power Dissipation P D Mounted on 50 × 50 × 1.6 mm double copper 530 mW of package allowance clad epoxy glass board at T A = +70 °C Operating Temperature T opt –20 to +70 °C Storage Temperature T stg –65 to +150 °C RECOMMENDED OPERATING CONDITIONS PARAMETERS SYMBOL MIN. TYP. MAX. UNIT Supply Voltage V CC 2.7 3.0 4.5 V Operating Temperature T opt –20 +25 +70 °C ELECTRICAL CHARACTERISTICS (T A = +25 °C, VCC = 2.7 V, ZL = ZS = 50 Ω , unless otherwise specified; VP/S ≥ 1.8 V) PARAMETERS SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS UPCONVERTER BLOCK *1 Circuit current I CC 13.0 25.0 35.0 mA No input signal Conversion gain CG 17.5 20.5 25.5 dB P IFin = –40 dBm RF output level P RFout 0 3 dBm P IFin = –10 dBm, 50 Ω load Noise figure NF 13 18 dB DSB mode Local leakage at RFout Lorf –25.0 –10.0 dBm P IFin = –10 dBm IF leakage at RFout IFrf –12.0 –5.0 dBm P IFin = –10 dBm Circuit current in power-save mode*3 ICC (P/S) 220 350 µA 6PIN(P/S) ≤ 1.0 V Power-save control voltage V P/S(ON) 1.8 4.5 V VP/S(OFF) 1.0 V Rise up time T up 2.5 5.0 µs DOWNCONVERTER BLOCK *2 Circuit current I CC 8.0 15.0 22.0 mA No input signal Conversion gain CG 15.0 18.0 23.0 dB P RFin = –40 dBm IF output level P IFout –4.5 –2.0 dBm P RFin = –10 dBm, 50 Ω load 3rd order intermodulation distortion IM3 –45.0 –49.0 dBc fRFin1 = 866.4 MHz, PRFin1 = –40 dBm fRFin2 = 866.8 MHz, PRFin2 = –40 dBm Noise figure NF 7.5 10 dB DSB mode Circuit current in power-save mode*3 ICC (P/S) 220 350 µA 5PIN(P/S) ≤ 1.0 V Power-save control voltage V P/S(ON) 1.8 4.5 V VP/S(OFF) 1.0 V Rise up time T up 2.5 5.0 µs *1 :fIFin = 150.05 MHz, fRFout = 864.05 to 868.05 MHz fLoin = 1014.10 to 1018.1 MHz (–9 dBm) *2 :fRFin = 864.05 to 868.05 MHz, fIFout = 150.05 MHz fLoin = 1014.10 to 1018.1 MHz (–9 dBm) *3 : Circuit current in power-save mode is total value of upconverter+downconverter

µPC8100GR Data Sheet P10817EJ3V0DS00 STANDARD CHARACTERISTIC FOR REFERENCE (T A = 25 °C, VCC = 2.7 V, ZL = ZS = 50 Ω , unless otherwise specified; VP/S ≥ 1.8 V) PARAMETERS SYMBOL REFERENCE UNIT TEST CONDITIONS UPCONVERTER BLOCK 3rd order intermodulation distortion IM3 –39.0 dBc f IFin1 = 150.4 MHz, PIF1 = –30 dBm fIFin2 = 150.8 MHz, PIF2 = –30 dBm DOWNCONVERTER BLOCK IF output 1 dB compression P 1dB –7.0 dBm Local leakage at IFout Pin Loif –29.0 dBm P in = –40 dBm RF leakage at IFout Pin RF if –44.0 dBm P in = –40 dBm

µPC8100GR Data Sheet P10817EJ3V0DS00 TEST CIRCUIT 20 19 18 17 16 15 14 13 12 11 123456789 1 0 PC8100GRµ 120 pF 120 pF 3 pF 22 Ω 4.7 nH 180 pF 1 500 pF 15 nH 120 pF 4.7 nH 4.7 nH 120 pF120 pF pF30 pF30 pF30 pF 51 Ω 1 500 pF 120 pF 51 W 1.5 pF 220 nH IFout VCC (D) LO in (D) LO by (D) LO by (U) LO in (U) IFin IFby GND MIXout2 GND RF by RF in PEAKING out P/S (D) P/S (U) VCC (U) RF out GND MIXout1 (IF) Spectrum Analyzer 50 Ω 50 Ω (IF) Signal Generator Signal Generator (LO) 50 Ω Spectrum Analyzer 50 Ω Signal Generator

µPC8100GR Data Sheet P10817EJ3V0DS00 TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD OSC IN NEC PC8100µ OSC IN IF IN IF OUT 30 pF 30 pF 120 pF 4.7 nH 120 pF 22 Ω 3 pF RF IN RF OUT Trimer condenser COMPONENT MOUNTED SIDE IC MOUNTED SIDE 51 Ω 51 Ω 150 nH 120 pF 0 Ω 4.7 nF 120 pF 4.7 nF120 pF 22 nH 30 pF 30 pF OSC IN IF IN IF OUT OSC IN RF IN RF OUT 120 pF 1.5 pF

µPC8100GR Data Sheet P10817EJ3V0DS00 TYPICAL PERFORMANCE (Unless otherwise specified V CC = 2.7 V Vps ≥ 1.8 V) – Downconverter block – 100 500 1000 5.0 10.0 15.0 RF input frequency vs. Noise figure RF input frequency fRFin (MHZ) Noise Figure NF (dB) Vcc = 2.7 V LO sweep (–9 dBm) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 100 500 1000 5.0 10.0 15.0 RF input frequency vs. Noise figure RF input frequency fRFin (MHZ) Noise Figure NF (dB) Vcc = 4.5 V LO sweep (–9 dBm) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 100 500 1000 10.0 15.0 20.0 RF input frequency vs. Conversion Gain RF input frequency fRFin (MHZ) Conversion Gain CG (dB) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 2.7 V LO sweep (–9 dBm) RF sweep (–40 dBm) IF = 150 MHZ 100 500 1000 10.0 15.0 25.0 RF input frequency vs. Conversion Gain RF input frequency fRFin (MHZ) Conversion Gain CG (dB) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 4.5 V LO sweep (–9 dBm) RF sweep (–40 dBm) IF = 150 MHZ –27 LO input level vs. Conversion Gain LO input level PLOin (dBm) Conversion Gain CG (dB) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 2.7 V RF = 866 MHZ (– 40 dBm) LO = 1016 MHZ (– 9 dBm) –40 RF input level vs. IF output level and IM3 RF input level PRFin (dBm) IF output level PRF out, 3rd order distortion IM3 (dBm) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 2.7 V RF 1 = 866.4 MHZ LO = 1016 MHZ (–9 dBm) RF 2 = 866.8 MHZ –30 –20 –10 0 10 –80 –70 –60 –50 –40 –30 –20 –10 20.0

µPC8100GR Data Sheet P10817EJ3V0DS00 – Downconverter block – –40 –30 –20 –10 0 10 –80 –70 –60 –50 –40 –30 –20 –10 RF input level vs. IF output level and IM3 RF input level PRFin (dBm) IF output level 3rd order distortion IM3 (dBm) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 4.5 V RF 1 = 866.4 MHZ LO = 1016 MHZ (– 9 dBm) RF 2 = 866.8 MHZ –27 –24 –21 –18 LO input level vs. Conversion Gain LO input level PLOin (dBm) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Conversion Gain CG (dB) Vcc = 4.5 V RF = 866 MHZ (–40 dBm) LO = 1016 MHZ (–9 dBm) 30.0 P/S control voltage vs. Circuit Current Power-save-control voltage VP/S TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 5.0 5.0 10.0 15.0 Circuit Current Icc (mA) Vcc = 4.5 V 4.03.02.01.00 20.0 25.0 30.0 P/S control voltage vs. Circuit Current Power-save-control voltage VP/S TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 5.0 5.0 10.0 15.0 Circuit Current Icc (mA) Vcc = 2.7 V 4.03.02.01.00 20.0 25.0 Supply voltage vs. Circuit Current Supply Voltage Vcc (V) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 5.0 Circuit Current Icc (mA) Vcc = VP/S 4.03.02.01.00 2.7 4.5

µPC8100GR Data Sheet P10817EJ3V0DS00 – Upconverter block – –40 –30 –20 –10 0 10 –80 –70 –60 –50 –40 –30 –20 –10 F input level vs. RF outpint level and IM IF input level PRFin (dBm) RF output level 3rd order distortion IM3 (dBm) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 2.7 V IF1 = 150.4 MHZ LO = 1016 MHZ (– 9 dBm) IF2 = 150.8 MHZ TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C –40 –30 –20 –10 0 10 –80 –70 –60 –50 –40 –30 –20 –10 Pin - Pout, IM IF input level PRFin (dBm ) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C Vcc = 4.5 V IF1 = 150.4 MHZ LO = 1016 MHZ (–9 dBm) IF2 = 150.8 MHZ RF output level 3rd order distortion IM3 (dBm) –27 LC input level vs. Conversion Gain LO input level PLOin (dBm) Conversion Gain CG (dB) Vcc = 2.7 V IF = 150 MHZ (–40 dBm) LO = 1016 MHZ TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C –27 LO input level - CG LO input level PLOin (dBm ) Conversion Gain CG (dB) Vcc = 2.7 V IF = 150 MHZ (–40 dBm) LO = 1016 MHZ

µPC8100GR Data Sheet P10817EJ3V0DS00 – Downconverter block – P/S control voltage vs. Circuit Current Power-save control voltage VP/S TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 5.0 Circuit Current Icc (mA) Vcc = 4.5 V 4.03.02.01.00 P/S control voltage vs. Circuit Current Power-save-control voltage VP/S TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 5.0 Circuit Current Icc (mA) Vcc = 2.7 V No input signal 4.03.02.01.00 Supply voltage vs. Circuit Current Supply Voltage Vcc (V) TA = +25 ˚C TA = +80 ˚C TA = –30 ˚C 5.0 Circuit Current Icc (mA) Vcc = VP/S 4.03.02.01.00 2.7 4.5 No input signal No input signal Recommended operating range

µPC8100GR Data Sheet P10817EJ3V0DS00 TYPICAL APPLICATION CT2 BLOCK DIAGRAM RX SW PG131GRµ TX PC8100GRµ PLL PLL DEMO F/F 90° PC8101GRµ I Q I Q The application circuits and their parameters are for references only and are not intended for use in actual design-in's.

µPC8100GR Data Sheet P10817EJ3V0DS00 PACKAGE DIMENSIONS

20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)

1.8 MAX. +7˚ –3˚ 0.65 0.10 M 0.15 0.5 ± 0.2 11 0 6.7 ± 0.3 1.5 ± 0.1 0.1 ± 0.1 0.22 +0.10 –0.05 0.575 MAX. 0.15 +0.10 –0.05 6.4 ± 0.2 NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.

µPC8100GR Data Sheet P10817EJ3V0DS00 NOTE ON CORRECT USE (1) Observe precautions for handling because of electrostatic sensitive devices. (2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation). (3) Keep the track length of the ground pins as short as possible. (4) Connect a bypass capacitor (e.g. 1 000 pF) to the V CC pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered in the following recommended conditions. Other soldering method and conditions than the recommended conditions are to be consulted with our sales representatives. µPC8100GR Soldering conditions Peak package’s surface temperature: 235 °C or below, Reflow time: 30 seconds or below (210 °C or higher), Number of reflow process: 2, Exposure limit*: None Peak package’s surface temperature: 215 °C or below, Reflow time: 40 seconds or below (200 °C or higher), Number of reflow process: 2, Exposure limit*: None Solder temperature: 260 °C or below, Flow time: 10 seconds or below Number of flow process: 1, Exposure limit*: None Terminal temperature: 300 °C or below, Flow time: 10 seconds or below, Exposure limit*: None Soldering process Infrared ray reflow VPS Wave soldering Partial heating method Symbol IR35–00-2 VP15–00-2 WS60–00-1 *: Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 °C and relative humidity at 65 % or less. Note: Apply only a single process at once, except for “Partial heating method”. For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).

µPC8100GR NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.

• The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. M7 98.8 ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES