UPC659A

UPC659A NEC | Alldatasheet

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© 1992, 1996 DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC659A The µPC659A is a 8-bit A/D converter for video signal processing, the power consumption of which is lower than the µPC659. The high speed and high quality bipolar processing technology has enabled fast conversion rate and high resolution to be achieved. Conversion rate is up to 20 Msps (sampling per second) and linearity error within ±0.5 LSB while operating at low power consumption. Wide variety of application can be realized in digital application field such as digital TV system and high speed facsimile. Also, this IC includes sample and hold circuit, clamp circuit and reference voltage generator, which enable simple external circuit to be constructed. The µPC659A and the µPC659 are different in the number of clock pulses till transformed data is output after analog signal is captured. This should be taken into consideration when using the µPC659A instead of the µPC659. For details, refer to the timing chart.

FEATURES

• Resolution : 8-bit
• Conversion rate : 20 Msps
• Differential non-linearity :±0.5 LSB MAX.
• Power supply : +5 V
• Analog input voltage : 1.0 V p-p
• Power consumption : 215 mW TYP.
• Built-in circuit : Sample and hold circuit Clamp circuit (Clamp voltage and clamp pulse must be supplied.) Reference voltage generator (V RB = 2.3 V, VRT = 3.3 V TYP.)

ORDERING INFORMATION

µPC659AGS 24-pin plastic SOP (300 mil) The mark shows major revised points. The information in this document is subject to change without notice. Document No. S10990EJ4V0DS00 (4th edition) Date Published July 1997 N Printed in Japan 8-BIT A/D CONVERTER FOR VIDEO PROCESSING WITH REFERENCE GENERATOR AND CLAMP CIRCUIT

µPC659A BLOCK DIAGRAM V CL VIN PCL Clamp S/H Sample and Hold Timing Generator CLK AV CC VRT VRB AGND DV CC DGND Flash A/D convertor D/A Flash A/D convertor5 Adder Latch OVER DB DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 DB 8

µPC659A PIN CONFIGURATION (Top View) V RT NC AV CC VIN AGND PCL VCL AV CC AGND VRB AV CC AGND CLK OVER DB DB 2 DB 3 DGND DV CC DB 4 DB 5 DB 6 DB 7 DB 8 PC659AGSµ AGND : Ground for Analog Circuit AV CC : Power Supply for Analog Circuit CLK : Clock DB 8 to DB1 : Digital Data Bus DGND : Ground for Digital Circuit DV CC : Power Supply for Digital Circuit NC : No Connection OVER : Digital Over Range P CL : Clamp Pulse VCL : Clamp Voltage VIN : Analog Signal VRB : Reference Voltage (Bottom) VRT : Reference Voltage (Top)

µPC659A PIN FUNCTIONS Equivalent CircuitFunction Reference voltage (Top) Reference voltage (Bottom) Analog signal Input analog signal from this pin. The signal is read at rising edge of the clock. The clamp function also will be worked on this pin. So it’s necessary to connect capacitance and low impedance signal source. The burst signal is protected at pedestal clamp because of soft clamp circuit. Clamp pulse Analog signal input from analog input pin is clamped to the voltage; V CL according to the high level term of this pulse. During high level signal is input, analog input pin voltage is nearly clamped to voltage V CL . Clamp voltage Set voltage at clamping analog input signal. Analog input signal is clamped nearly to this input voltage V CL according to the clamp pulse PCL high level period. Clock Analog data acquisition and digital data out are synchronized with the rising edge of this clock. Power supply for analog circuit Pin Name VRT VRB VIN PCL VCL CLK AV CC Input/ Output Input Input Input Input Input Input Pin No. 3, 8, 11 AV CC 1.41 kΩ 800 Ω AGND 1.91 kΩ AGND VRB VRT AGND AV CC AV CCAV CC AGND AGND AGND AV CC AGND AV CC AGND AV CC AV CC AGND AV CC AGND AV CC AV CC

µPC659A Equivalent CircuitFunction Ground for analog circuit Digital signal DB 8 is LSB, DB1 is MSB. Digital over range Overflow (active high). Power supply for digital circuit Ground for digital circuit No Connection Pin Name AGND DB 8 to DB4 DB 3 to DB1 OVER DV CC DGND NC Input/ Output Output Output Pin No. 5, 9, 12 13 to 17, 20 to AGND DV CC DV CC DGND DGND DV CC DGND

µPC659A ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = 25 ˚C) Parameter Symbol Ratings Unit Supply voltage AV CC , DVCC –0.3 to +6.0 V Digital input voltage V IND –0.3 to DVCC + 0.3 V Analog input voltage V INA –0.3 to AVCC + 0.3 V Reference input voltage V RT , VRB –0.3 to AVCC + 0.3 V Clamp voltage V CL –0.3 to AVCC + 0.3 V Clamp pulse input voltage V PCL –0.3 to AVCC + 0.3 V Operating ambient temperature TA –20 to +70 ˚C Storage temperature T stg –40 to +150 ˚C Power dissipation P d 560 mW Caution Exposure to Absolute Maximum Ratings for extended periods may affect device reliability; exceeding the ratings could cause permanent damage. The parameters apply independently. The device should be operated within the limits specified under DC and AC Characteristics. Recommended Operating Conditions (T A = –20 to +70 ˚C) Parameter Symbol Conditions MIN. TYP. MAX. Unit Supply voltage AV CC , DVCC AGND=DGND = 0 V 4.7 5.0 5.3 V Supply voltage difference |AVCC -DVCC | AGND=DGND = 0 V 0 0.1 V Analog input voltage V INA VCC = 5.0 V VRB – 0.4 V RT + 0.4 V Clamp input voltage V CL VCC = 5.0 V VRB – 0.4 V RT + 0.4 V Sampling clock f samp 1 20 MHz Sampling clock high level pulse tPWH 25 500 ns width Sampling clock low level pulse t PWL 25 500 ns width Clock input high level voltage VCKH 2.0 V Clock input low level voltage VCKL 0.8 V Clamp pulse width t PWCL 1.0 µs Clamp pulse input high level V PCLH 2.0 V voltage Clamp pulse input low level V PCLL 0.8 V voltage Clamp capacitance C CL 10 µF Maximum analog input frequency fAIN 8 MHz

µPC659A DC Characteristics and AC Characteristics (TA = –20 to +70 ˚C, AVCC = DVCC = 5.0 ±0.3 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Supply current I CC VCC = 5.0 V, TA = 25 ˚C 26 43 62 mA Resolution RES 8 bit Non-linearity NL V CC = 5.0 V, TA = 25 ˚C ±1.5 LSB VIN = 1.0 Vp-p, fsamp = 20 MHz Differential non-linearity DNL V CC = 5.0 V, TA = 25 ˚C ±0.5 LSB VIN = 1.0 Vp-p, fsamp = 20 MHz Differential gain DG f samp = 14.318 MHz 1.5 3 % NTSC ramp wave (40 IRE) Differential phase DP f samp = 14.318 MHz 0.8 3 deg NTSC ramp wave (40 IRE) Digital data output delay time tD Delay time from rising edge 12 20 35 ns of sampling clock. DB 1 to DB8, OVER, CL = 15 pF Digital output low level voltage VOL IOL = 1.6 mA 0.4 V DB 1 to DB8, OVER Digital output high level voltage VOH IOH = –400 µA 2.7 V DB 1 to DB8, OVER Digital input low level current IINDL VIN = 0.8 V –200 µA Digital input high level current IINDH VIN = 2.0 V 10 µA Analog input current I INA Measure input current from 10 35 µA analog input pin Reference voltage (Bottom) V RB VCC = 5.0 V 2.1 2.3 2.5 V Reference voltage (Top) V RT VCC = 5.0 V 3.1 3.3 3.5 V Analog input equivalent C IN VIN = VRB 3p F capacitance Clock input equivalent C CLK 2p F capacitance Reference voltage (Difference) V REF VRT – VRB , VCC = 5.0 V 1 V Caution The values of ICC and tD are different between the µPC659 and the µPC659A

µPC659A Test Circuit 24 23 22 21 20 19 18 17 16 15 14 13 123456789 1 0 1 1 1 2 2.2 F 0.01 F AGND 47 F 0.01 F 2.2 F 0.01 F VV Analog data input Clamp pulse input AGND AGND +5 V AGND DGND +5 V DGND 8-bit digital data output DGND OVER Clock 0.01 F 47 F DGND PC659AGS µ µ µ µµ µ µµ µ DG, DP Test Block Video signal generator PC659AVideo signal 8-bit digital data High-precision D/A converter Video signal Vector scope Clock 4f sc (14.318 MHz) µ Remark The video signal from the video signal generator is NTSC, 40 IRE ramp signal.

µPC659A Timing Chart CLK VIN DB 1 to DB8 OVER tPWH tPWL Data acquisition n + 1 n + 2 5.3 ns TYP. 20 ns TYP. n – 1 n n + 1 n + 2 Analog signal is captured at the rising edge, and converted data will be output at the rising edge after 1 clock pulseNote. Note For the µPC659, 2 clock pulses. Caution The value of data output delay time (tD ) is different between the µPC659 and the µPC659A.

µPC659A Output Code for Analog Input Output digital code Analog input OVER DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 DB 8 (MSB) (LSB) VRB to 1/2 LSB 000000000 1/2 LSB to (1 + 1/2) LSB 000000001 to to to to to to to to to to (254 + 1/2) LSB to (255 + 1/2) LSB 011111111 (255 + 1/2) LSB to VRT 111111111 VRT to AVCC 111111111 APPLICATION CIRCUIT EXAMPLE AGND AGND AGND AGND Clamp pulse 22 Ω 100 F 51 Ω 4.7 kΩ 15 kΩ 1 kΩ 10 F 2.2 F 0.01 F AGND 2 kΩ AGNDDGND 2.2 F kΩ VR 1 20 kΩ 0.01 F 47 F 2.2 F AV CC (+5 V) 0.01 F 47 F OVER DB 1 to DB8 4fsc Clock input DGND DV CC (+5 V) DGND VRT NC AV CC VIN AGND P CL VCL AV CC AGND V RB AV CC AGND CLK OVER DB 1 DB 2 DB 3 DGND DV CC DB 4 DB 5 DB 6 DB 7 DB 8 µ µ µ µ µ µ µ µ µ µ Remarks 1. VR 1: Clamp voltage adjustment 2. Must be thick line wiring for the power supply lines. And reduce the resistance and reactance ingredient. AV CC and DVCC must be connected at one point. AGND and DGND must be connected at one point.

• ·· ·

µPC659A ATTENTION FOR APPLICATION

• Converted data output Analog signal is captured at the rising edge, and converted data will be output at the rising edge after 1 clock pulse. For the µPC659, 2 clock pulses.
• Analog input terminal In case the pedestal level is clamped, the clamp circuit uses the soft clamp circuit to protect the burst level. However, if a high impedance output is connected to the V IN pin (pin 4), the burst level will be reduced (for example, for an external impedance of 10 Ω , the burst level is reduced by approx. 3 %). Therefore, connect the lowest possible impedance signal to the analog signal input pin. Clamp pulse Low output impedance buffer P CL Clamp voltage VCL AGND PC659Aµ VIN
• If don’s use the clamp circuit PCL pin (pin 6) and GND must be short-circuit. And insert by-pass capacitor of about 0.1 µF between the VCL pin (pin 7) and GND. Input analog signal to VIN pin (pin 4). In case an external clamp circuit is used, connect the PCL pin (pin 6) to GND, and leave the VCL pin (pin 7) unconnected. Set the voltage of the VIN pin (pin 4) between 2.3 V and 3.3 V.
• Clamp voltage There is a few difference clamp voltage between the supply clamp voltage VCL (pin 7) and really clamp voltage. Really clamp voltage = VCL + α Take account of the α (about ±20 mV) at supply VCL to pin 7.
• When reference voltage is set from external, VRB (pin 10) = 2.3 V, VRT (pin 1) = 3.3 V .
• Circuit current TYP. (Unit: mA) Analog circuit current 37 Digital circuit current 6 Sum 43
• Set the sampling clock frequency between 1 MHz and 20 MHz. If a frequency outside this range is used, the internal sample-and-hold circuit will not function properly.
• First apply 5 V to the AVCC pins (pins 3 and 11) and the DVCC pin (pin 18), then input the analog signal to the VIN pin (pin 4). If the analog signal is input first, the output data may latch up.

µPC659A DIFFERENCE BETWEEN THE µPC659 AND THE µPC659A The following table shows the differences between the µPC659 and the µPC659A. This should be taken into consideration when using the µPC659A instead of the µPC659. Parameter µPC659 µPC659A Supply current ICC MIN. 50 mA 26 mA VCC = 5.0 V TYP. 79 mA 43 mA TA = 25 ˚C MAX. 110 mA 62 mA Digital data output TYP. 12 ns 20 ns delay time tD MAX. 20 ns 35 ns Internal reference resistance V RT pin (pin 1), VRB pin (pin 10 ) Timing chart VRT VRB AV CC 844 Ω 480 Ω 1.15 kΩ AGND AGND VRT VRB AV CC 1.41 kΩ 800 Ω 1.91 kΩ AGND AGND CLK VIN Data output n – 2 n – 1 n CLK VIN Data output n – 1 n

µPC659A PACKAGE DRAWING ITEM MILLIMETERS INCHES A B C E F G H I J 15.54 MAX. 1.27 (T.P.) 1.8 MAX. 1.55 7.7±0.3 0.78 MAX. 0.12 1.1 5.6 M 0.1±0.1 N 0.612 MAX. 0.031 MAX. 0.004±0.004 0.071 MAX. 0.061 0.303±0.012 0.220 0.043 0.005 0.050 (T.P.) P24GM-50-300B-4 P3 ° 3°+7° NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. D 0.40 0.016+0.10 –0.05 K 0.20 0.008+0.10 –0.05 L 0.6±0.2 0.024 0.10 –3° +7° –3° 0.004 +0.008 –0.009 +0.004 –0.002 +0.004 –0.003 A C D G P detail of lead end F E B H I L K M J N M 11 2 1324

24 PIN PLASTIC SOP (300 mil)

µPC659A RECOMMENDED SOLDERING CONDITIONS When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL” (C10535E). Surface mount device µPC659AGS : 24-pin plastic SOP (300 mil) Process Conditions Symbol Infrared ray reflow Peak temperature: 235 ˚C or below (Package surface temperature), IR35-00-2 Reflow time: 30 seconds or less (at 210 ˚C or higher), Maximum number of reflow processes: 2 times. Vapor phase soldering Peak temperature: 215 ˚C or below (Package surface temperature), VP15-00-2 Reflow time: 40 seconds or less (at 200 ˚C or higher), Maximum number of reflow processes: 2 times. Wave Soldering Solder temperature: 260 ˚C or below, WS60-00-1 Flow time: 10 seconds or less, Pre-heating temperature: 120 ˚C or below (Package surface temperature), Maximum number of flow processes: 1 time. Partial heating method Pin terminal temperature: 300 ˚C or below, – Heat time: 3 seconds or less (Per each side of the device). Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the device will be damaged by heat stress.

µPC659A [MEMO]

µPC659A The application circuits and their parameters are for reference only and are not intended for use in actual design-ins. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5