UPC4572MF-DAA RENESAS | Alldatasheet

Document overview

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Technical content

Features

  • Ultra low noise (f = 1 kHz): 4.0 nV/√Hz (TYP.)
  • Total harmonic distortion: 0.002% (TYP.)
  • High slew rate : 6 V/μs (TYP.)
  • Gain bandwidth product (f = 100 kHz): 16 MHz (TYP.)
  • Low input bias current: 100 nA (TYP.)
  • Input offset voltage : ±0.3 mV (TYP.)
  • Low supply voltage: ±2 V to ±7 V (Split) +4 V to +14 V (Single, V− = GND)
  • Internal frequency compensation

Ordering Information

Part Number Package Package Code (Previous Package Code) Package Abbreviation Supplying Form μPC4572MF-DAA-E1-AT *1 8-pin plastic SOP (3.9 × 4.9) PRSP0008DM-A ( − ) MF • 12 mm wide embossed taping

  • Pin 1 on draw-out side
  • 2500 p/reel Note: ∗1. Pb-free (This product does not contain Pb in the external electrode and other parts.) Caution: Do not use the products in applications such as the transportation equipment (a car, a train, a ship, etc.) where “Special quality grade” is required, because the products are placed in a quality grade “standard” to be required at general devices. R03DS0059EJ0100 Rev.1.00 Jul 25, 2012

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 2 of 10 Jul 25, 2012 Pin Configuration (Top View) OUT2 II2 IN2 OUT1 II1 IN1 V + – Equivalent Circuit (for Each Circuit) V II IN V Q2Q1 R3R2 C1 Q10 Q12 Q14 Q11 Q8 Q13 Q15 Q17 Q16R7 R10 R11 OUT Absolute Maximum Ratings (TA = 25°C) Parameter Symbol Ratings Unit Voltage between V+ and V− *1 V+ − V− −0.3 to +15 V Differential Input Voltage VID ±10 V Input Voltage *2 VI V− − 0.3 to V+ + 0.3 V Output Applied Voltage *3 VO V− − 0.3 to V+ + 0.3 V Total Power Dissipation *4 PT 440 mW Output Short Circuit Duration (vs. GND) *5 tS 10 s Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Tstg −55 to +125 °C Notes: *1. Note that reverse connections of the power supply may damage ICs. *2. The input voltage is allowed to input without damage or destruction independent of the magnitude of V+. Either input signal is not allowed to go negative by more than 0.3 V. In addition, the input voltage that operates normally as an operational amplifier is within the Common Mode Input Voltage range of an electrical characteristic. *3. A range where input voltage can be applied to an output pin externally with no deterioration or damage to the feature (characteristic). The input voltage can be applied regardless of the electric supply voltage. This specification which includes the transition state such as electric power ON/OFF must be kept. *4. This is the value in TA ≤ 56°C of when the glass epoxy substrate (size: 100 mm x 100 mm, thickness: 1 mm, 15% of the substrate area where only one side is copper foiled is filling wired) is mounted. Derate at −6.4 mW/°C when TA > 56°C. In the condition same as the above, Junction − ambient thermal resistance Rth(J-A) =156°C/W. *5. Only as for V+ ≤ 15V and any 1 channel. Please use the product within the derating condition or Total Power Dissipation, which are showed in Note 4.

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 3 of 10 Jul 25, 2012 Recommended Operating Conditions Parameter Symbol MIN. TYP. MAX. Unit Power Supply Voltage (Split) V± ±2 ±5 ±7 V Supply Voltage (V− = GND) V+ +4 +5 to +12 ±14 V Output Current IO ±10 mA Capacitive Load (AV = +1) CL 100 pF Electrical Characteristics (V± = ±5 V, TA = 25°C) Parameter Symbol MIN. TYP. MAX. Unit Conditions Input Offset Voltage VIO ±0.3 ±5 mV R S ≤ 50 Ω Input Offset Current IIO ±10 ±100 nA Input Bias Current *1 IB 100 400 nA Large Signal Voltage Gain AV 10000 100000 R L ≥ 2 kΩ, VO = ±2 V Supply Current *2 ICC 4.5 7 mA I O = 0 A Common Mode Rejection Ratio CMR 70 90 dB Supply Voltage Rejection Ratio SVR 70 85 dB Output Voltage (High) VoH ±3.3 ±3.7 V R L ≥ 10 kΩ Output Voltage (Low) VoL ±3.0 ±3.5 V R L ≥ 2 kΩ Common Model Input Voltage Range VICM ±3.5 ±4 V Output Short Circuit Current IO ±15 ±20 mA R L = 0 Ω Slew Rate SR 3.5 6 V/ μs R L ≥ 2 kΩ, AV = +1 Gain Bandwidth Product GBW 10 16 MHz f O = 100 kHz Unity Gain Frequency funity 9 MHz open loop Phase Margin φ unity 60 degree open loop Total Harmonic Distortion THD 0.002 % V O = 1 Vr.m.s., f = 20 Hz to 20 kHz (Fig.1) (Fig.3) 4.5 nV/ √Hz f O = 10 Hz Input Equivalent Noise Voltage Dencity en 4.0 nV/ √Hz f O = 1 kHz Input Equivalent Noise Current Density in 0.7 pA/ √Hz fO = 1 kHz Channel Separation 120 dB f = 20 Hz to 20 kHz Average VIO Temperature Drift ΔVIO/ΔT ±2 μV/°C Notes: *1. Input bias currents flow out from IC. Because each current is base current of PNP-transistor on input stage. *2. This is a current that flows in the internal circuit. This current flows irrespective of the existence of use.

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 4 of 10 Jul 25, 2012 Electrical Characteristics (V+ = +5 V, V− = GND, TA = 25°C) Parameter Symbol MIN. TYP. MAX. Unit Conditions Input Offset Voltage VIO ±0.3 ±5 mV R S ≤ 50 Ω Input Offset Current IIO ±10 ±100 nA Input Bias Current *1 IB 100 400 nA Large Signal Voltage Gain AV 8000 80000 Supply Current *2 ICC 4 6 mA I O = 0 A Common Mode Rejection Ratio CMR 60 75 dB Supply Voltage Rejection Ratio SVR 60 70 dB Output Voltage (High) VoH 3.2 3.5 V R L ≥ 2 kΩ (RL to 1/2 V+) Output Voltage (Low) VoL 1.3 1.6 V R L ≥ 2 kΩ (RL to 1/2 V+) Common Model Input Voltage Range VICM 1.5 3.5 V Slew Rate SR 4 V/ μs R L ≥ 2 kΩ, AV = +1 Gain Band Width Product GBW 12 MHz Notes: *1. Input bias currents flow out from IC. Because each current is base current of PNP-transistor on input stage. *2. This is a current that flows in the internal circuit. This current flows irrespective of the existence of use.

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 5 of 10 Jul 25, 2012 MEASUREMENT CIRCUIT Figure1 Total Harmonic Distortion Measurement Circuit VO = 1 Vr.m.s. + 2 kΩ Figure2 Noise Measurement Circuit (RIAA) 330 kΩ30 kΩ 2.2 kΩ 56 kΩ 610 Ω VO = (36.5 dB + 40 dB) × Vn 100 kΩ 8200 pF 2400 pF VO 76.5 dBVn = LPF (fO = 30 kHz)33 F 47 F 1.5 F 40 dB Amp. μ μ μ Figure3 Noise Measurement Circuit (FLAT+JIS A) 10 kΩ 100 Ω VO = 40 dB × Vn JIS A RS = 100 Ω VO 40 dBVn =

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 6 of 10 Jul 25, 2012 Typical Characteristics (TA = 25°C, TYP.) (Reference value) 100 120 0 1 10 1 k 100 k 1 M 10 M 100 10 k OPEN LOOP FREQUENCY RESPONSE AV - Open Loop Voltage Gain - dB f - Frequency - Hz V± = ±5 V 1.5 0.5 0.5 −1.5 −2 00 2 04 06 08 0 = ±5 VV± VIO - Input Offset Voltage - mV INPUT OFFSET VOLTAGE TA - Operating Ambient Temperature - °C each 5 samples data 200 180 160 140 120 100 −20 0 20 40 60 80 = ±5 VV± IB - Input Bias Current - nA INPUT BIAS CURRENT TA - Operating Ambient Temperature - °C 100 1 k 10 k 100 k 1 M LARGE SIGNAL FREQUENCY RESPONSE Vom - Output Voltage Swing - Vp-p f - Frequency - Hz 10 M RL = 10 kΩ 00 10 20 30 40 OUTPUT CURRENT LIMIT VO+, IO SOURCE VO−, IO SINK V O ± - Output Voltage - V IO - Output Current - mA 500 400 300 200 100 0 40 60 80 120 100 TA - Operating Ambient Temperature - °C PT vs. TA PT - Total Power Dissipation - mW When the glass epoxy substrate (size: 100 mm x 100 mm, thickness: 1 mm) is mounted. (For the details, see Absolute Maximum Ratings Note *4.)

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 7 of 10 Jul 25, 2012 0 20 ICC - Supply Current - mA TA - Operating Ambient Temperature - °C −20 04 0 6 0 8 0 V± = ±5 V ICC - Supply Current - mA V± - Supply Voltage - V ±5 ±10 COMMON MODE INPUT VOLTAGE RANGE VICM - Common Mode Input Voltage Range - V V± - Supply Voltage - V −10 ±5 ±10 VO - Output Voltage - V −2.5 2.5 VOLTAGE FOLLOWER PULSE RESPONSE 86420 t - Time - sμ V± = ±5 V AV = +1 RL = 2 kΩ 100 Vn - Input Equivalent Noise Voltage - Vr.m.s. μ INPUT EQUIVALENT NOISE VOLTAGE (FLAT+JIS A) RS - Source Resistance - Ω 100 k100 1 k 10 k 0.1 V± = ±5 V en -Input Equivalent Noise Voltage Density - nV/ Hz INPUT EQUIVALENT NOISE VOLTAGE DENSITY f - Frequency - Hz 10 100 k 100 1 k 10 k RS = 100 Ω V± = ±5 V SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. SUPPLY VOLTAGE

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 8 of 10 Jul 25, 2012 THD - Total Harmonic Distortion - % TOTAL HARMONIC DISTORTION f - Frequency - Hz 0.1 0.01 0.001 0.0001 10 100 k 100 1 k 10 k V± = ±5 V VO = 3 Vr.m.s. AV = +1 RL = 2 kΩ

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 9 of 10 Jul 25, 2012 PRECAUTIONS FOR USE

  • The process of unused circuits If there is an unused circuit, the following connection is recommended. Process example of unused circuits R R To potentials within the range of common-mode input voltage (VICM) Remark A midpoint potential of V+ and V − is applied to this example.
  • Power supply used (Split/Single) The input voltage should be allowed to input without damage or destruction. Even during the transition period of supply voltage, power on/off etc., this specification should be kept. The normal operation will establish when the both inputs are within the Common Mode Input Voltage Range of electrical characteristics.
  • Ratings of input/output pin voltage When the voltage of input/output pin exceeds the absolute maximum rating, it may cause degradation of characteristics or damages, by a conduction of a parasitic diode within an IC. In addition, when the input pin may be lower than V −, or the output pin may exceed the power supply voltage, it is recommended to make a clump circuit bya diode whose forward voltage is low (e.g.: Schottky diode) for protection.
  • Range of common-mode input voltage When the supply voltage does not meet the condition of electrical characteristics, the range of common-mode input voltage is as follows. VICM (TYP.): V − + 1 (V) to V+ − 1 (V) (TA = 25°C) During designing, temperature characteristics for use with allowance.
  • The maximum output voltage The range of the TYP. value of the maximum output voltage when the supply voltage does not meet the condition of electrical characteristics is as follows: Vom + (TYP.): V+ − 1.3 (V) (TA = 25°C), Vom During designing, consider variations in characteristics and temperature characteristics for use with allowance. In addition, also note that the output voltage range (Vom + − Vom −) becomes narrow when an output current increases.
  • Handling of ICs When stress is added to ICs due to warpage or bending of a board, the characteristic fluctuates due to piezoelectric effect. Therefore, pay attention to warpage or bending of a board.

μPC4572MF-DAA Chapter Title R03DS0059EJ0100 Rev.1.00 Page 10 of 10 Jul 25, 2012 Package Drawings 8-pin Plastic SOP (3.9 × 4.9)

All trademarks and registered trademarks are the property of their respective owners. C - 1 Revision History μPC4572MF-DAA Data Sheet

Description

Rev. Date Page Summary

1.00 Jul 25, 2012 − First Edition Issued

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