UPC4570_V01 RENESAS | Alldatasheet

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R03DS0135EJ0200 Rev.2.00 Page 1 of 11 Feb.27.25 Datasheet UPC4570 Ultra Low-Noise, High Speed, Wide Band, Dual Operational Amplifier

DESCRIPTION

UPC4570 is a high performance version of general-purpose low-noise operational amplifier UPC258, 4558. Various characteristics such as band, slew rate, including input equivalent noise were greatly improve in comparison to UPC258 and 4558. It is also possible to operate the amplifier with stability for gain of 1 (total feedback or unity gain) Therefore, it is ideal for application circuits such as audio preamplifiers, equalizers, tone controls, active filters. Under this product series, there is also a quad type UPC4574 with equivalent characteristics

FEATURES

  • Input Equivalent Noise Voltage (f = 1 kHz ) 4.5 nV/ Hz ( TYP.)
  • Total Harmonic Distortion Rate (f = 20 Hz ~ 20 kHz) 0.002 % (TYP.)
  • Slew Rate 7 V/μs (TYP.)
  • Gain Bandwidth Product GBW (f = 100 kHz) 15 MHz (TYP.)
  • Input Offset Voltage ±0.3 mV (TYP.)
  • Operating Ambient Temperature UPC4570G2 : -20 ~ +80 °C UPC4570GR : -40 ~ +85 °C
  • Internal Frequency Compensation PRODUCT LINEUP Package Standard SOP TSSOP Subject Part Number UPC4570G2 UPC4570GR-9LG Outline Comparison Unit : mm Unit : mm (Mounting Area Ratio) ( 100 %) ( 60 %)

ORDERING INFORMATION

Order Name (1) Selected Grade Package UPC4570G2-AP Standard 8-pin plastic SOP ( 5.72 mm ( 225 )) UPC4570GR-9LG-A Standard 8-pin plastic TSSOP ( 5.72 mm ( 225 )) (1) Order names containing E1 or E2 indicate that the packaging format is embossed taping. Pin 1 of E1 is on draw-out side, and pin 1 of E2 is at take-up side. 5.2 6.5 3.15 6.44.4

R03DS0135EJ0200 Rev.2.00 Page 2 of 11 Feb.27.25 PIN CONFIGURATION (Top View) EQUIVALENT CIRCUIT (1/2 Circuit) 1OUT1 8 V + 2II1 3IN1 4V -

7 OUT2

6 II2

5 IN2

R03DS0135EJ0200 Rev.2.00 Page 3 of 11 Feb.27.25 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Parameter Symbol UPC4570G2 UPC4570GR-9LG Unit Power Supply Voltage Note 1 V + - V - -0.3 ~ +36 V Differential Input Voltage VID ±30 V Input Voltage Note 2 VI V - -0.3 ~ V + +0.3 V Output Applied Voltage Note 3 VO V - -0.3 ~ V + +0.3 V Total Power Dissipation Note 4 PT 440 mW Output Short Circuit Duration Note 5 tS 10 s Operating Ambient Temperature TA -20 ~ +80 -40 ~ +85 °C Storage Temperature Tstg -55 ~ +125 °C 【Note】1. Note that reverse connections of the power supply may damage the ICs. 2. The input terminal must be applied within the input voltage range to avoid deteriorating or damaging the device characteristic. Do not exceed the ratings including during transition state such as ON/OFF, etc. The Op-Amp input voltage must operates within the electrical characteristics range of input common-mode voltage. 3. The output terminal must be applied within the output voltage range to avoid deteriorating or damaging the device characteristic. Do not exceed the ratings including during transition state such as ON/OFF, etc. The Op- Amp output voltage must operates within the electrical characteristics range of maximum output voltage. 4. This is the value when the glass epoxy substrate (size: 100 mm x 100 mm, thickness: 1 mm, 15% of the substrate area where only one side is copper foiled is filling wired) is mounted. Note that restrictions will be made to the following conditions for each product, and the de-rating ratio depending on the operating ambient temperature. UPC4570G2 : This is the value at TA ≤ 25 °C. Derate at -4.4 mW/°C when TA > 25 °C UPC4570GR : This is the value at TA ≤ 44 °C. Derate at -5.5 mW/°C when TA > 44 °C 5. A short circuit at the V + side may destroy the IC. Please use below the total loss and the de-rating of Note 4.

R03DS0135EJ0200 Rev.2.00 Page 4 of 11 Feb.27.25 RECOMMENDED OPERATING CONDITIONS Parameter Symbol MIN. TYP. MAX. Unit Power Supply Voltage V ± ±4 ±16 V Output Current IO ±10 mA Source Resistance RS 50 kΩ Capacitive Load (AV = +1) CL 100 pF

ELECTRICAL CHARACTERISTICS

Parameter Symbol MIN. TYP. MAX. Unit Test Condition Input Offset Voltage VIO ±0.3 ±5 mV RS ≤ 50 Ω Input Offset Current IIO ±10 ±100 nA Input Bias Current Note 6 IB 100 400 nA Large Signal Voltage Gain AV 30000 300000 RL ≥ 2 kΩ, VO = ±10 V Circuit Current Note 7 ICC 5 8 mA Common Mode Rejection Ratio CMR 80 100 dB Supply Voltage Rejection Ratio SVR 80 100 dB Output Voltage Swing Vom ±12 ±13.4 V RL ≥ 10 kΩ Output Voltage Swing Vom ±10 ±12.8 V RL ≥ 2 kΩ Common Mode Input Voltage Range VICM ±12 ±14 V Slew Rate SR 5 7 V/μs RL ≥ 2 kΩ Gain Bandwidth Product GBW 10 15 MHz fO = 100 kHz Unity Gain Frequency funity 7 MHz open loop Phase Margin φ unity 50 Deg open loop Total Harmonic Distortion THD 0.002 % VO = 3 Vr.m.s., f = 20 Hz ~ 20 kHz (Figure 1 ) Input Equivalent Noise Voltage Vn 0.9 μVr.m.s RIAA (Figure 2 ) Input Equivalent Noise Voltage Vn 0.53 0.65 μVr.m.s FLAT + JIS A, RS = 100 Ω (Figure 3 ) Input Equivalent Noise Voltage Density en 5.5 nV/ Hz fO = 10 Hz, RS = 100 Ω Input Equivalent Noise Voltage Density en 4.5 nV/ Hz fO = 1 kHz, RS = 100 Ω Input Equivalent Noise Current Density in 0.7 pA/ Hz fO = 1 kHz Channel Separation 120 dB f = 20 Hz ~ 20 kHz 【Note】 6. The current flow direction of the input bias is out from the IC because the first stage of the IC composed of PNP transistor. 7. Current flowing through the internal circuit. This current flow regardless of the channel used.

R03DS0135EJ0200 Rev.2.00 Page 6 of 11 Feb.27.25 Total Power Dissipation, PT [mW] Operating Ambient Temperature, TA [°C] PT vs. TA With 100 mm x 100 mm, thickness 1 mm glass epoxy substrate (refer to "ABSOLUTE MAXIMUM RATINGS Note4") 100 120 140 1 10 100 1k 10k 100k 1M 10M Open Loop Voltage Gain, AV [dB] Frequency, f [Hz] AV vs. f V ± = ±15 V RL = 2 kΩ 100 1k 10k 100k 1M 10M Output Voltage Swing, Vom [Vp-p] Frequency, f [Hz] Vom vs. f V ± = ±15 V RL = 10 kΩ VO - , IO SINK VO + , IO SOURCE ±10 ±15 0 20 40 60 80 100 120 Output Voltage, VO ± [V] Output Current, IO [mA] VO ± vs. IO V ± = ±15 V

R03DS0135EJ0200 Rev.2.00 Page 7 of 11 Feb.27.25 -20 -10 ±0 ±10 ±20 Common Mode Input Voltage Range, VICM [V] Power Supply Voltage, V ± [V] VICM vs. V ± -10 0 1 2 3 4 5 6 7 8 Output Voltage, VO [V] Time, t [μs] Voltage Follower Pulse Response V ± = ±15 V AV = 1 RL = 2 kΩ 0.1 100 10 100 1k 10k 100k Input Equivalent NoiseVoltage, Vn [μVr.m.s.] Source Resistance, RS [Ω] Vn vs. RS (FLAT + JIS A) V ± = ±15 V 10 100 1k 10k 100k Frequency, f [Hz] e n vs. f V ± = ±15 V RS = 100Ω Input Equivalent NoiseVoltage Density, en [nV/ Hz]

R03DS0135EJ0200 Rev.2.00 Page 8 of 11 Feb.27.25 0.0001 0.001 0.01 0.1 10 100 1k 10k 100k Total Harmonic Distortion, THD [%] Frequency, f [Hz] THD vs. f V ± = ±15 V VO = 3 Vr.m.s. AV = 1 RL = 2 kΩ

R03DS0135EJ0200 Rev.2.00 Page 9 of 11 Feb.27.25 USE WITH PRECAUTIONS

  • Managing unused circuits If there is an unused circuit, the following connection is recommended.
  • Power Supply (Dual Power Supply / Single Power Supply) The op amp operates when a predetermine voltage is applied between V + - V – . Therefore, while it operates from a single power supply (V - = GND), it is not possible to operate the input and output near GND. So please be careful of the common-mode input voltage range and maximum output voltage.
  • Ratings of input/output pin voltage When the voltage of input/output pin exceeds the absolute maximum rating, the parasitic diode within the IC may conduct, causing characteristics degradation or damage. In addition, if the input pin is lower than V −, or the output pin exceeds the power supply voltage, it is recommended to make a clamping circuit using a diode with low forward voltage (e.g.: Schottky diode) as protection.
  • Range of common-mode input voltage When the supply voltage does not meet the condition of electrical characteristics, the range of common-mode input voltage is as follows. V ICM (TYP.) : V - +1 ~ V + -1 [V] (TA = 25°C). During designing, do include some tolerance by considering temperature characteristics etc.
  • Maximum output voltage The TYP. value range of the maximum output voltage when the supply voltage does not meet the condition of electrical characteristics is as follows: Vom+ (TYP.): V+ - 1.6 [V] (TA = 25°C), Vom− (TYP.): V - + 1.6 [V] (TA = 25°C) During designing, do include some tolerance by considering characteristics variation, temperature characteristics and so on. In addition, also note that the output voltage range (V om+ - V om−) will become narrow when the output current increases.
  • Handling of ICs When stress is added to ICs due to warpage or bending of a board, the characteristic may fluctuates due to piezoelectric (piezo) effect. Therefore, pay attention to warpage or bending of a board. V - V - V +V + R R 同相入力電圧範囲 (VICM) 内の電位へ Example of unused circuit process To potentials within the range of common-mode input voltage (VICM) Remark: In this example, an intermediate potential between V + and V - is applied.

R03DS0135EJ0200 Rev.2.00 Page 10 of 11 Feb.27.25 PACKAGE DRAWINGS 8-PIN PLASTIC SOP P-LSOP8-4.4×5.2-1.27 PLSP0008DE-A 0.09[g]

R03DS0135EJ0200 Rev.2.00 Page 11 of 11 Feb.27.25 8-PIN PLASTIC TSSOP P-TSSOP8-0225-0.65 PTSP0008JD-A P8GR-65-9LG － ZD 0.60 detail of lead end NOTE Each lead centerline is located within 0.10 mm of its true position at maximum material condition. ITEM D E HE A A3 0.25 +0.06 -0.05 c L 0.5 Lp +5° -3° e 0.65 x 0.10 y 0.10 ZD 0.60 θ 3° 0.60 ±0.15 1.00 ±0.20 MILLIMETERS 3.15 ±0.15 3.00 ±0.10 4.40 ±0.10 1.20 MAX. 6.40 ±0.20 0.10 ±0.05 1.00 ±0.05 b 0.24 0.145 ±0.055 (Unit : mm)

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