UPC2710TB-E3

UPC2710TB NEC | Alldatasheet

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The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. BIPOLAR ANALOG INTEGRATED CIRCUIT µµµµPC2710TB

5 V, SUPER MINIMOLD SILICON MMIC

MEDIUM OUTPUT POWER AMPLIFIER © 1998, 1999 Document No. P13443EJ2V0DS00 (2nd edition) Date Published June 1999 N CP(K) Printed in Japan DATA SHEET

DESCRIPTION

The µPC2710TB is a silicon monolithic integrated circuit designed as PA driver for 900 MHz band cellular telephone tuners. This IC is packaged in super minimold package which is smaller than conventional minimold. The µPC2710TB has compatible pin connections and performance to µPC2710T of conventional minimold version. So, in the case of reducing your system size, µPC2710TB is suitable to replace from µPC2710T. This IC is manufactured using NEC’s 20 GHz fT NESAT TM lll silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.

FEATURES

• High-density surface mounting : 6-pin super minimold package
• Wideband response : f u = 1.0 GHz TYP. @ 3 dB bandwidth
• Medium output power : P O(sat) = +13.5 dBm TYP. @ f = 500 MHz with external inductor
• Supply voltage : V CC = 4.5 to 5.5 V
• Power gain : G P = 33 dB TYP. @ f = 500 MHz
• Port impedance : input/output 50 Ω APPLICATION
• PA driver for 900 MHz band cellular telephone

ORDERING INFORMATION

Part Number Package Marking Supplying Form µPC2710TB-E3 6-pin super minimold C1F Embossed tape 8 mm wide. 1, 2, 3 pins face to perforation side of the tape. Qty 3 kp/reel. Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: µPC2710TB) Caution Electro-static sensitive devices The mark shows major revised points

Data Sheet P13443EJ2V0DS002 µµµµPC2710TB PIN CONNECTIONS Pin No. Pin Name

1 INPUT

(Top View) (Bottom View) 6V CC PRODUCT LINE-UP (T A = +25°°°°C, VCC = Vout = 5.0 V, ZL = ZS = 50 ΩΩΩΩ ) Part No. fu (GHz) PO(sat) (dBm) G P (dB) NF (dB) ICC (mA) Package Marking µPC2710T 6-pin minimold µPC2710TB 1.0 +13.5 33 3.5 22 6-pin super minimold C1F Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. Notice The package size distinguishes between minimold and super minimold. SYSTEM APPLICATION EXAMPLE EXAMPLE OF 900 MHz BAND DIGITAL CELLULER TELEPHONE DEMO PLL I I Q Q PLL PATX PC2710T/TB Driver 90° SW RX µ φ

Data Sheet P13443EJ2V0DS00 3 µµµµPC2710TB PIN EXPLANATION Pin No. Pin Name Applied Voltage (V) Pin Voltage (V) Note Function and Applications Internal Equivalent Circuit 1 INPUT – 0.90 Signal input pin. A internal matching circuit, configured with resistors, enables 50 Ω connection over a wide band. A multi-feedback circuit is designed to cancel the deviations of h FE and resistance. This pin must be coupled to signal source with capacitor for DC cut.

4 OUTPUT Voltage as

V CC through external inductor – Signal output pin. The inductor must be attached between V CC and output pins to supply current to the internal output transistors. 6V CC 4.5 to 5.5 – Power supply pin, which biases the internal input transistor. This pin should be externally equipped with bypass capacitor to minimize its impedance. GND 0 – Ground pin. This pin should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be connected together with wide ground pattern to decrease impedance difference. 1IN VCC OUT GNDGND 23 5 Note Pin voltage is measured at VCC = 5.0 V

Data Sheet P13443EJ2V0DS004 µµµµPC2710TB ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Ratings Unit Supply Voltage V CC TA = +25°C, Pin 4 and 6 5.8 V Total Circuit Current I CC TA = +25°C 60 mA Power Dissipation P D Mounted on double-sided copper clad 50 × 50 × 1.6 mm epoxy glass PWB (TA = +85°C) 200 mW Operating Ambient Temperature T A −40 to +85 °C Storage Temperature T stg −55 to +150 °C Input Power P in TA = +25°C +10 dBm RECOMMENDED OPERATING CONDITIONS Parameter Symbol MIN. TYP. MAX. Unit Remark Supply Voltage V CC 4.5 5.0 5.5 V The same voltage should be applied to pin 4 and 6. Operating Ambient Temperature T A −40 +25 +85 °C ELECTRICAL CHARACTERISTICS (T A = +25°°°°C, VCC = Vout = 5.0 V, ZS = ZL = 50 ΩΩΩΩ ) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Circuit Current I CC No Signal 16 22 29 mA Power Gain G P f = 500 MHz 30 33 36.5 dB Maximum Output Level P O(sat) f = 500 MHz, Pin = –8 dBm +11.0 +13.5 – dBm Noise Figure NF f = 500 MHz – 3.5 5.0 dB Upper Limit Operating Frequency f u 3 dB down below flat gain at f = 0.1 GHz 0.7 1.0 – GHz Isolation ISL f = 500 MHz 34 39 – dB Input Return Loss RL in f = 500 MHz 3 6 – dB Output Return Loss RL out f = 500 MHz 9 12 – dB Gain Flatness ΔG P f = 0.1 to 0.6 GHz – ±0.8 – dB

Data Sheet P13443EJ2V0DS00 5 µµµµPC2710TB TEST CIRCUIT VCC 1 000 pF 1 000 pF 1 000 pF C 1 C 2 L 2, 3, 5 50 Ω50 Ω OUTIN C 3 COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS EXAMPLE OF ACTURAL APPLICATION COMPONENTS Type Value Type Value Operating Frequency C 1, C2 Bias Tee 1 000 pF C 1 to C3 Chip Capacitor 1 000 pF 100 MHz or higher C 3 Capacitor 1 000 pF 300 nH 10 MHz or higher L Bias Tee 1 000 nH 100 nH 100 MHz or higher L Chip Inductor 10 nH 1.0 GHz or higher INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the VCC pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get enough gain. In this case, large inductance and Q is suitable. CAPACITORS FOR THE V CC , INPUT AND OUTPUT PINS Capacitors of 1000 pF are recommendable as the bypass capacitor for the VCC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10000 pF. Because the coupling capacitors are determined by equation, C = 1/(2 πRfc).

Data Sheet P13443EJ2V0DS006 µµµµPC2710TB ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD IN OUT C VCC C1F 321 456 AMP-2 CC Top View Mounting Direction Notes 30 × 30 × 0.4 mm double sided copper clad polyimide board. Back side: GND pattern Solder plated on pattern : Through holes L For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATION OF SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P12152E). COMPONENT LIST Value C 1 000 pF L 300 nH

Data Sheet P13443EJ2V0DS00 7 µµµµPC2710TB TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25 °°°°C) 0 123456 Circuit Current ICC (mA) CIRCUIT CURRENT vs. SUPPLY VOLTAGE Supply Voltage VCC (V) 0−60 +20 +100 Circuit Current ICC (mA) CIRCUIT CURRENT vs. OPERATING AMBIENT TEMPERATURE Operating Ambient Temperature TA (°C) NOISE FIGURE AND INSERTION POWER GAIN vs. FREQUENCY 0.3 1.0 2.0 Insertion Power Gain GP (dB) Frequency f (GHz) 0.1 4.5 3.5Noise Figure NF (dB) NF VCC = 4.5 V VCC = 5.0 V VCC = 5.0 V G P VCC = 5.5 V VCC = 4.5 V 0.3 1.0 2.0 Insertion Power Gain GP (dB) Frequency f (GHz) 0.1

30 TA = +85 °C

TA = −40 °C TA = +25 °C VCC = 5.0 V −20 −30 −40 0.1 0.3 1.0 Isolation ISL (dB) Frequency f (GHz) −50 −10 ISOLATION vs. FREQUENCY 2.0 INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY −10 −20 1.00.3 2.0 Input Return Loss RLin (dB) Output Return Loss RLout (dB) Frequency f (GHz) −50 0.1 −30 −40 VCC = 5.0 VVCC = 5.0 V RL in RL out INSERTION POWER GAIN vs. FREQUENCY VCC = 5.5 V VCC = 5.0 V No signal No signal

Data Sheet P13443EJ2V0DS008 µµµµPC2710TB OUTPUT POWER vs. INPUT POWER+20 +15 −40 0 +10 Output Power Pout (dBm) Input Power Pin (dBm) −10 −15 −10 −5 +10 −15 −20−25−30 +5 VCC = 4.5 V VCC = 5.5 V VCC = 5.0 V f = 0.5 GHz OUTPUT POWER vs. INPUT POWER+20 +15 −40 0 +10 Output Power Pout (dBm) Input Power Pin (dBm) −10 −15 −10 −5 +10 −15 −20−25−35 +5 VCC = 5.0 V f = 0.5 GHz TA = −40 °C TA = +25 °C TA = +85 °C OUTPUT POWER vs. INPUT POWER +20 +15 0 +10 Output Power Pout (dBm) Input Power Pin (dBm) −10 −15 −10 −5 +10 −15 −20−25−30 +5 f = 1.0 GHz VCC = 4.5 V VCC = 5.5 V VCC = 5.0 V OUTPUT POWER vs. INPUT POWER +20 +15 +10 Output Power Pout (dBm) Input Power Pin (dBm) −10 +10 −15 +50 f = 1.0 GHz SATURATED OUTPUT POWER vs. FREQUENCY+20 +14 0.5 1.0 2.0 Saturated Output Power PO (sat) (dBm) Frequency f (GHz) 0.1 +18 +16 +12 +10 0.2 Pin = −8 dBm VCC = 5.0 V VCC = 4.5 V VCC = 5.5 V −60 −50 −40 −30 −10 +10 Third Order Intermodulation Distortion IM3 (dBc) Output Power of Each Tone PO (each) (dBm) −20 −10 THIRD ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE f1 = 0.500 GHz f2 = 0.502 GHz VCC = 4.5 V VCC = 5.0 V VCC = 5.5 V −35 −30 VCC = 5.0 V f = 0.5 GHz

Data Sheet P13443EJ2V0DS00 9 µµµµPC2710TB S-PARAMETER (T A = +25 °°°°C, VCC = Vout = 5.0 V) S11-FREQUENCY

0.1 GHz

1.0 GHz

2.0 GHz

3.0 GHz

Data Sheet P13443EJ2V0DS0010 µµµµPC2710TB TYPICAL S-PARAMETER VALUES (T A = +25 °°°°C) µPC2710TB VCC = Vout = 5.0 V, ICC = 22 mA FREQUENCY S 11 S21 S12 S22 K

Data Sheet P13443EJ2V0DS00 11 µµµµPC2710TB PACKAGE DIMENSIONS 6 pin super minimold (Unit: mm) 1.25 –0.1 2.1 –0.1 0.65 0.65 1.3 2.0 –0.2 0.1 MIN. 0.7 0.9 –0.1 0 to 0.1 0.2+0.1 –0 0.15+0.1

Data Sheet P13443EJ2V0DS0012 µµµµPC2710TB NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) The bypass capacitor should be attached to VCC line. (4) The inductor must be attached between VCC and output pins. The inductance value should be determined in accordance with desired frequency. (5) The DC cut capacitor must be attached to input pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235 °C or below Time: 30 seconds or less (at 210 °C) Count: 3, Exposure limit: None Note IR35-00-3 Time: 40 seconds or less (at 200 °C) Count: 3, Exposure limit: None Note VP15-00-3 Wave Soldering Soldering bath temperature: 260 °C or below Time: 10 seconds or less Count: 1, Exposure limit: None Note WS60-00-1 Partial Heating Pin temperature: 300 °C Time: 3 seconds or less (per side of device) Exposure limit: None Note Note After opening the dry pack, keep it in a place below 25 °C and 65 % RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).

Data Sheet P13443EJ2V0DS00 13 µµµµPC2710TB [MEMO]

Data Sheet P13443EJ2V0DS0014 µµµµPC2710TB [MEMO]

Data Sheet P13443EJ2V0DS00 15 µµµµPC2710TB [MEMO]

µµµµPC2710TB NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.

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