UPC2709TB-E3

UPC2709TB NEC | Alldatasheet

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Caution: Electro-static sensitive devices The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. BIPOLAR ANALOG INTEGRATED CIRCUITS µµµµPC2709TB

5 V, SUPER MINIMOLD SILICON MMIC

MEDIUM OUTPUT POWER AMPLIFIER © 1997, 2000 Document No. P12653EJ2V1DS00 (2nd edition) Date Published May 2000 N CP(K) Printed in Japan DATA SHEET

DESCRIPTION

The µPC2709TB is a silicon monolithic integrated circuits designed as 1st IF amplifier for DBS tuners. This IC is packaged in super minimold package which is smaller than conventional minimold. The µPC2709TB has compatible pin connections and performance to µPC2709T of conventional minimold version. So, in the case of reducing your system size, µPC2709TB is suitable to replace from µPC2709T. These IC is manufactured using NEC’s 20 GHz fT NESAT™III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.

FEATURES

• High-density surface mounting : 6-pin super minimold package
• Supply voltage : V CC = 4.5 to 5.5 V
• Wideband response : f u = 2.3 GHz TYP. @3 dB bandwidth
• Medium output power : P O (sat) = +11.5 dBm@f = 1 GHz with external inductor
• Power gain : G P = 23 dB TYP. @f = 1 GHz
• Port impedance : input/output 50 Ω

APPLICATIONS

• 1st IF amplifiers in DBS converters
• RF stage buffer in DBS tuners, etc.

ORDERING INFORMATION

PART NUMBER PACKAGE MARKING SUPPLYING FORM µPC2709TB-E3 6-pin super minimold C1E Embossed tape 8 mm wide. 1, 2, 3 pins face the perforation side of the tape. Qty 3 kpcs/reel. Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: µPC2709TB)

Data Sheet P12653EJ2V1DS002 µµµµPC2709TB PIN CONNECTIONS PRODUCT LINE-UP OF µµµµPC2709 (TA = +25°C, VCC = Vout = 5.0 V, ZS = ZL = 50 ΩΩΩΩ ) PART NO. fu (GHz) PO (sat) (dBm) G P (dB) NF (dB) ICC (mA) PACKAGE MARKING µPC2709T 6 pin minimold µPC2709TB 6 pin super minimold Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. Caution The package size distinguishes between minimold and super minimold. C1E25523+11.52.3 (Top View) C1E (Bottom View) Pin NO. Pin name

1 INPUT

Data Sheet P12653EJ2V1DS00 3 µµµµPC2709TB SYSTEM APPLICATION EXAMPLE EXAMPLE OF DBS CONVERTERS BS Antenna (DBS ODU) RF Amp. Mixer IF Amp. Oscillator PC2709TB Parabola Antenna To IDU µ EXAMPLE OF 900 MHz BAND, 1.5 GHz BAND DIGITAL CELLULAR TELEPHONE PC2709TBµ DEMO PLL F/FPA SW I Q Driver × 20 ° 90 ° Q I RX TX PLL To know the associated products, please refer to each latest data sheet.

Data Sheet P12653EJ2V1DS004 µµµµPC2709TB PIN EXPLANATION Pin NO. Pin Name Applied voltage (V) Pin voltage (V) Note Function and applications Internal equivalent circuit 1 INPUT − 1.05 Signal input pin. A internal matching circuit, configured with resistors, enables 50 Ω connec- tion over a wide band. A multi-feedback circuit is de- signed to cancel the deviations of h FE and resistance. This pin must be coupled to sig- nal source with capacitor for DC cut.

4 OUTPUT Voltage

− Signal output pin. The inductor must be attached between V CC and output pins to supply current to the internal output transistors. 6V CC 4.5 to 5.5 − Power supply pin, which biases the internal input transistor. This pin should be externally equipped with bypass capacitor to minimize its impedance. GND 0 − Ground pin. This pin should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be con- nected together with wide ground pattern to decrease impedance defference. Note Pin voltage is measured at VCC = 5.0 V 1IN VCC OUT GNDGND 23 5

Data Sheet P12653EJ2V1DS00 5 µµµµPC2709TB ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATINGS UNIT CONDITIONS Supply Voltage V CC 6V T A = +25°C, Pin 4 and 6 Total Circuit Current I CC 60 mA T A = +25°C Power Dissipation P D 200 mW Mounted on double copper clad 50 × 50 × 1.6 mm epoxy glass PWB (TA = +85°C) Operating Ambient Temperature T A −40 to +85 °C Storage Temperature T stg −55 to +150 °C Input Power P in +10 dBm RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. TYP. MAX. UNIT NOTICE Supply Voltage V CC 4.5 5.0 5.5 V The same voltage should be applied to pin 4 and 6. Operating Ambient Temperature T A −40 +25 +85 °C ELECTRICAL CHARACTERISTICS (T A = +25°C, VCC = Vout = 5.0 V, ZS = ZL = 50 ΩΩΩΩ ) PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Circuit Current I CC 19 25 32 mA No Signal Power Gain G P 21.0 23.0 26.5 dB f = 1 GHz Maximum Output Level P O (sat) +9.0 +11.5 − dBm f = 1 GHz, P in = 0 dBm Noise Figure NF − 5.0 6.5 dB f = 1 GHz Upper Limit Operating Frequency fu 2.0 2.3 − GHz 3 dB down below flat gain at f = 0.1 GHz Isolation ISL 26 31 − dB f = 1 GHz Input Return Loss RL in 71 0 − dB f = 1 GHz Output Return Loss RL out 71 0 − dB f = 1 GHz Gain Flatness ΔG P −± 1.0 − dB f = 0.1 to 1.8 GHz

Data Sheet P12653EJ2V1DS006 µµµµPC2709TB TEST CIRCUIT VCC 1 000 pF 1 000 pF 1 000 pF C 1 C 2 L 2, 3, 5 50 Ω50 Ω OUTIN C 3 Components of test circuit for measuring electrical characteristics Example of actural application components TYPE VALUE TYPE VALUE OPERATING FREQUENCY C 3 Capacitor 1 000 pF C1 to C3 Chip capacitor 1 000 pF 100 MHz or higher L Bias Tee 1 000 nH L Chip inductor 300 nH 10 MHz or higher C 1 to C2 Bias Tee 1 000 pF 100 nH 100 MHz or higher 10 nH 1.0 GHz or higher INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the VCC pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get enough gain. In this case, large inductance and Q is suitable. CAPACITORS FOR THE V CC , INPUT, AND OUTPUT PINS Capacitors of 1 000 pF are recommendable as the bypass capacitor for the VCC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2 πRfc).

Data Sheet P12653EJ2V1DS00 7 µµµµPC2709TB Illustration of the test circuit assembled on evaluation board C IN OUT C VCC C1E 132 645 Mounting direction Notes 30 × 30 × 0.4 mm double sided copper clad polyimide board. Back side: GND pattern Solder plated on pattern : Through holes Top View AMP-2 C L Component List Value C 1 000 pF L 300 nH

Data Sheet P12653EJ2V1DS008 µµµµPC2709TB TYPICAL CHARACTERISTICS (T A = +25°C) VCC - Supply Voltage - V ICC - Circuit Current - mA 123456 –60 TA - Operating Ambient Temperature - °C ICC - Circuit Current - mA CIRCUIT CURRENT vs. OPERATING AMBIENT TEMPERATURE 0 –40 –20 0 +20 +40 +60 +80 +100 VCC = 5.0 V 0.1 f - Frequency - GHz G P - Insertion Power Gain - dB NOISE FIGURE AND INSERTION POWER GAIN vs. FREQUENCY 10 0.3 1.0 3.0 0.1 f - Frequency - GHz G P - Insertion Power Gain - dB INSERTION POWER GAIN vs. FREQUENCY 10 0.3 1.0 3.0 V CC = 5.0 V 0.1 f - Frequency - GHz ISL - Isolation - dB ISOLATION vs. FREQUENCY –50 0.3 1.0 3.0 0.1 f - Frequency - GHz RL in - Input Return Loss - dB RL out - Output Return Loss - dB INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY –50 0.3 1.0 3.0 VCC = 5.0 V –10 –20 –30 –40 V CC = 5.0 V –10 –20 –30 –40 VCC = 5.5 V 5.0 V 4.5 V VCC = 5.0 V 5.5 V 4.5 V NF - Noise Figure - dB G P NF –40°C TA = +25°C +85°C RL in RL out CIRCUIT CURRENT vs. SUPPLY VOLTAGE

Data Sheet P12653EJ2V1DS00 9 µµµµPC2709TB +10 +15 –10 –15 –20 Pin - Input Power - dBm PO - Output Power - dBm f = 1.0 GHz +10 +15 –10 –15 –20 Pin - Input Power - dBm PO - Output Power - dBm OUTPUT POWER vs. INPUT POWER VCC = 5.0 V f = 1.0 GHz +85°C +10 +15 –10 –15 –20 Pin - Input Power - dBm PO - Output Power - dBm OUTPUT POWER vs. INPUT POWER f = 2.0 GHz 5.5 V +10 +15 –10 –15 –20 Pin - Input Power - dBm PO - Output Power - dBm OUTPUT POWER vs. INPUT POWER VCC = 5.0 V 0.1 3.0 f - Frequency - GHz PO(sat) - Saturated Output Power - dBm SATURATED OUTPUT POWER vs. FREQUENCY 0.3 1.0 5.5 V Pin = 0 dB VCC = 5.0 V 4.5 V –60 –10 +10 PO(each) - Output Power of Each Tone - dBm IM3 - 3rd Order Intermodulation Distortion - dBc THIRD ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE f1 = 1.000 GHz f2 = 1.002 GHz 4.5 V VCC = 5.0 V 5.5 V –50 –40 –30 –20 5.5 V V CC = 5.0 V

4.5 V TA = –40°C

+25°C f = 2.0 GHz f = 1.0 GHz f = 0.5 GHzVCC = 5.0 V 4.5 V OUTPUT POWER vs. INPUT POWER

Data Sheet P12653EJ2V1DS0010 µµµµPC2709TB S-Parameter (VCC = 5.0 V) S11-FREQUENCY 0.1 G 3.0 G 1.0 G S22-FREQUENCY 0.1 G3.0 G 1.0 G2.0 G

Data Sheet P12653EJ2V1DS00 11 µµµµPC2709TB Typical S-Parameter Values (TA = +25°C) µPC2709TB VCC = Vout = 5.0 V, ICC = 26 mA Frequency S11 S21 S12 S22 K MHz MAG ANG MAG ANG MAG ANG MAG ANG

Data Sheet P12653EJ2V1DS0012 µµµµPC2709TB PACKAGE DIMENSIONS 6 pin super minimold (unit: mm) 1.25 –0.1 2.1 –0.1 0.65 0.65 1.3 2.0 –0.2 0.1 MIN. 0.7 0.9 –0.1 0 to 0.1 0.2+0.1 –0 0.15+0.1

Data Sheet P12653EJ2V1DS00 13 µµµµPC2709TB NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) The bypass capacitor should be attached to the VCC pin. (4) The inductor must be attached between VCC and output pins. The inductance value should be determined in accordance with desired frequency. (5) The DC cut capacitor must be attached to input pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and condi- tions other than those recommended below, contact your NEC sales representative. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235°C or below Time: 30 seconds or less (at 210°C) Count: 3, Exposure limit: None Note IR35-00-3 Time: 40 seconds or less (at 200°C) Count: 3, Exposure limit: None Note VP15-00-3 Wave Soldering Soldering bath temperature: 260°C or below Time: 10 seconds or less Count: 1, Exposure limit: None Note WS60-00-1 Partial Heating Pin temperature: 300°C Time: 3 seconds or less (per side of device) Exposure limit: None Note Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E) .

Data Sheet P12653EJ2V1DS0014 µµµµPC2709TB [MEMO]

Data Sheet P12653EJ2V1DS00 15 µµµµPC2709TB [MEMO]

µµµµPC2709TB ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.

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