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Caution Electro-static sensitive devices BIPOLAR ANALOG INTEGRATED CIRCUITS PC2709TB

5 V, SUPER MINIMOLD SILICON MMIC

MEDIUM OUTPUT POWER AMPLIFIER Document No. P12653EJ3V0DS00 (3rd edition) Date Published November 2000 N CP(K) DATA SHEET The mark shows major revised points.

DESCRIPTION

The PC2709TB isasilicon monolithic integrated circuits designed as 1st IF amplifier for DBS tuners. This IC is packaged in super minimold package which is smaller than conventional minimold. The PC2709TB has compatible pin connections and performance to PC2709T of conventional minimold version. So, in the case of reducing your system size, PC2709TB is suitable to replace from PC2709T. These IC is manufactured using NEC’s20 GHz fT NESAT™III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.

FEATURES

  • High-density surface mounting : 6-pin super minimold package (2.0 1.25 0.9 mm)
  • Wideband response : fu = 2.3 GHz TYP. @3 dB bandwidth
  • Medium output power : PO (sat) = +11.5 dBm@f=1 GHz with external inductor
  • Supply voltage : VCC = 4.5 to 5.5 V
  • Power gain : GP = 23 dB TYP. @f = 1 GHz
  • Port impedance : input/output 50

APPLICATIONS

  • 1st IF amplifiers in DBS converters
  • RF stage buffer in DBS tuners, etc. ORDERING INFORMATION (PB-Free) mroFgniylppuSgnikraMegakcaPrebmuNtraP 6-pin super minimold C1E Embossed tape 8 mm wide. 1, 2, 3 pins face the perforation side of the tape. Qty 3 kpcs/reel. Remark To order evaluation samples, please contact your local sales office (Part number for sample order: PC2709TB-A). PC2709TB-E3-A The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Data Sheet P12653EJ3V0DS002 ++++PC2709TB PIN CONNECTIONS PRODUCT LINE-UP OF 5 V-BIAS SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER (TA = +25°C, VCC =V out = 5.0 V, ZS =Z L = 50 1111) Part No. fu (GHz) PO (sat) (dBm) GP (dB) NF (dB) ICC (mA) Package Marking +PC2708T 6-pin minimold +PC2708TB 2.9 +10.0 15 6.5 @f = 1 GHz 26 6-pin super minimold C1D +PC2709T 6-pin minimold +PC2709TB 2.3 +11.5 23 5 @f = 1 GHz 25 6-pin super minimold C1E +PC2710T 6-pin minimold +PC2710TB 1.0 +13.5 33 3.5 @f = 0.5 GHz 22 6-pin super minimold C1F +PC2776T 6-pin minimold +PC2776TB 2.7 +8.5 23 6.0 @f = 1 GHz 25 6-pin super minimold C2L Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. Caution The package size distinguishes between minimold and super minimold. C1E (Top View) (Bottom View) Pin No. Pin Name 1I N P U T 2G N D 3G N D 4O U T P U T 5G N D 6V CC

Data Sheet P12653EJ3V0DS00 3 ++++PC2709TB SYSTEM APPLICATION EXAMPLE EXAMPLE OF DBS CONVERTERS BS Antenna (DBS ODU) rexiM.pmAFR IF Amp. Oscillator PC2709TB Parabola Antenna To IDU EXAMPLE OF 900 MHz BAND, 1.5 GHz BAND DIGITAL CELLULAR TELEPHONE PC2709TB+ DEMOD. PLL F/FPA SW I Q Driver = 20 $ 90 $ Q I RX TX PLL

Data Sheet P12653EJ3V0DS004 ++++PC2709TB PIN EXPLANATION Pin No. Pin Name Applied Voltage (V) Pin Voltage (V) Note Function and Applications Internal Equivalent Circuit 1 INPUT < 1.05 Signal input pin. A internal matching circuit, configured with resistors, enables 50 1 connec- tion over a wide band. A multi-feedback circuit is de- signed to cancel the deviations of h FE and resistance. This pin must be coupled to sig- nal source with capacitor for DC cut. 4O U T P U T V o l t a g e as same as V CC through external inductor < Signal output pin. The inductor must be attached between V CC and output pins to supply current to the internal output transistors. 6V CC 4.5 to 5.5 < Power supply pin, which biases the internal input transistor. This pin should be externally equipped with bypass capacitor to minimize its impedance. GND 0 < Ground pin. This pin should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be con- nected together with wide ground pattern to decrease impedance defference. Note Pin voltage is measured at VCC = 5.0 V 1IN VCC OUT GNDGND 23 5

Data Sheet P12653EJ3V0DS00 5 ++++PC2709TB ABSOLUTE MAXIMUM RATINGS tinUsgnitaRsnoitidnoClobmySretemaraP VegatloVylppuS CC TA V66dna4niP,C°52+= Total Circuit Current I CC TA Am06C°52+= PnoitapissiDrewoP D Mounted on double copper clad 50 = 50 = 1.6 mm epoxy glass PWB (TA =+ 8 5 ° C ) 270 mW Operating Ambient Temperature T A <40 to +85 °C Storage Temperature T stg <55 to +150 °C PrewoPtupnI in TA mBd01+C°52+= RECOMMENDED OPERATING RANGE krameRtinU.XAM.PYT.NIMlobmySretemaraP VegatloVylppuS CC 4.5 5.0 5.5 V The same voltage should be applied to pin 4 and 6. Operating Ambient Temperature T A <40 +25 +85 °C ELECTRICAL CHARACTERISTICS (TA = +25°C, VCC =V out = 5.0 V, ZS =Z L = 50 1111) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit ItnerruCtiucriC CC Am235291langistupnioN GniaGrewoP P Bd5.620.320.12zHG1=f Saturated Output Power P O (sat) f = 1 GHz, Pin 5.11+0.9+mBd0= < dBm zHG1=fFNerugiFesioN < 5.0 6.5 dB Upper Limit Operating Frequency f u 3 dB down below flat gain at f = 0.1 GHz 2.0 2.3 < GHz 1362zHG1=fLSInoitalosI < dB Input Return Loss RL in 017zHG1=f < dB Output Return Loss RL out 017zHG1=f < dB Gain Flatness 6GP f = 0.1 to 1.8 GHz <( 1.0 < dB

Data Sheet P12653EJ3V0DS006 ++++PC2709TB TEST CIRCUIT VCC 1 000 pF Fp0001Fp0001 C1 C2 L 2, 3, 5 50 150 1 OUTIN COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS EXAMPLE OF ACTURAL APPLICATION COMPONENTS ycneuqerFgnitarepOeulaVepyTeulaVepyT C1 to C2 Bias Tee 1 000 pF C 1 to C3 Chip capacitor 1 000 pF 100 MHz or higher C3 rehgihrozHM01Hn003rotcudnipihCLFp0001roticapaC rehgihrozHM001Hn001Hn0001eeTsaiBL 10 nH 1.0 GHz or higher INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the V CC pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get enough gain. In this case, large inductance and Q is suitable. CAPACITORS FOR THE VCC, INPUT, AND OUTPUT PINS Capacitors of 1 000 pF are recommendable as the bypass capacitor for the V CC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the V CC pin is used to minimize ground impedance of V CC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 1 load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2 /Rfc).

Data Sheet P12653EJ3V0DS00 7 ++++PC2709TB ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD C TUONI C VCC C1E 132 645 Mounting direction Notes 30 = 30 = 0.4 mm double sided copper clad polyimide board. Back side: GND pattern Solder plated on pattern : Through holes Top View AMP-2 C L For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATION OF SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P12152E). COMPONENT LIST Value C 1 000 pF L 300 nH

Data Sheet P12653EJ3V0DS008 ++++PC2709TB TYPICAL CHARACTERISTICS (Unless otherwise specified, TA =+ 2 5 ° C ) Supply Voltage VCC (V) Circuit Current ICC (mA) 123456 –60 Operating Ambient Temperature TA ($C) Circuit Current ICC (mA) CIRCUIT CURRENT vs. OPERATING AMBIENT TEMPERATURE 0 –40 –20 0 +20 +40 +60 +80 +100 No input signal VCC = 5.0 V 0.1 Frequency f (GHz) Power Gain GP (dB) NOISE FIGURE, POWER GAIN vs. FREQUENCY 10 0.3 1.0 3.0 0.1 Frequency f (GHz) Power Gain GP (dB) POWER GAIN vs. FREQUENCY 10 0.3 1.0 3.0 V CC = 5.0 V 0.1 Frequency f (GHz) Isolation ISL (dB) ISOLATION vs. FREQUENCY –50 0.3 1.0 3.0 0.1 Frequency f (GHz) Input Return Loss RLin (dB) Output Return Loss RLout (dB) INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY –50 0.3 1.0 3.0 VCC = 5.0 V –10 –20 –30 –40 VCC = 5.0 V –10 –20 –30 –40 VCC = 5.5 V 5.0 V 4.5 V VCC = 5.0 V 5.5 V 4.5 V Noise Figure NF (dB) GP NF –40$C TA = +25$C +85$C RLin RLout CIRCUIT CURRENT vs. SUPPLY VOLTAGE No input signal

Data Sheet P12653EJ3V0DS00 9 ++++PC2709TB +10 +15 –10 –15 –20 Input Power Pin (dBm) Output Power Pout (dBm) f = 1.0 GHz +10 +15 –10 –15 –20 Input Power Pin (dBm) Output Power Pout (dBm) OUTPUT POWER vs. INPUT POWER VCC = 5.0 V f = 1.0 GHz +85$C +10 +15 –10 –15 –20 Input Power Pin (dBm) Output Power Pout (dBm) OUTPUT POWER vs. INPUT POWER f = 2.0 GHz 5.5 V +10 +15 –10 –15 –20 Input Power Pin (dBm) Output Power Pout ( dBm) OUTPUT POWER vs. INPUT POWER VCC = 5.0 V 0.31.0 Frequency f (GHz) Saturated Output Power PO(sat) (dBm) SATURATED OUTPUT POWER vs. FREQUENCY 0.3 1.0 5.5 V Pin = 0 dBm VCC = 5.0 V 4.5 V 01+01– Output Power of Each Tone PO(each) (dBm) 3rd Order Intermodulation Distortion IM3 (dBc) 3RD ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE f1 = 1.000 GHz f2 = 1.002 GHz 4.5 V VCC = 5.0 V 5.5 V 5.5 V V CC = 5.0 V

4.5 V TA = –40$C

+25$C f = 2.0 GHz f = 1.0 GHz f = 0.5 GHzVCC = 5.0 V 4.5 V OUTPUT POWER vs. INPUT POWER Remark The graphs indicate nominal characteristics.

Data Sheet P12653EJ3V0DS0010 ++++PC2709TB S-PARAMETERS (TA =+ 2 5$$$$C, VCC = Vout =5 . 0V ) S11-FREQUENCY 0.1 G 3.0 G 1.0 G S22-FREQUENCY 0.1 G3.0 G 1.0 G2.0 G

Data Sheet P12653EJ3V0DS00 11 ++++PC2709TB TYPICAL S-PARAMETER VALUES (TA = +25°C) VCC =V out = 5.0 V, ICC = 26 mA Frequency S 11 S21 S12 S22 K

Data Sheet P12653EJ3V0DS0012 ++++PC2709TB PACKAGE DIMENSIONS 6-PIN SUPER MINIMOLD (UNIT: mm) 0.9(0.1 0.7 0 to 0.1 0.15+0.1 –0.05 2.0(0.2 1.3 0.650.65 0.2+0.1 –0.05 2.1(0.1 1.25(0.1 0.1 MIN.

Data Sheet P12653EJ3V0DS00 13 ++++PC2709TB NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) The bypass capacitor should be attached to the V CC pin. (4) The inductor (L) must be attached between V CC and output pins. The inductance value should be determined in accordance with desired frequency. (5) The DC cut capacitor must be attached to input and output pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and condi- tions other than those recommended below, contact your NEC sales representative. lobmySnoitidnoCdednemmoceRsnoitidnoCgniredloSdohteMgniredloS Infrared Reflow Package peak temperature: 235°C or below Time: 30 seconds or less (at 210°C) Count: 3, Exposure limit: None Note IR35-00-3 Time: 40 seconds or less (at 200°C) Count: 3, Exposure limit: None Note VP15-00-3 Wave Soldering Soldering bath temperature: 260°C or below Time: 10 seconds or less Count: 1, Exposure limit: None Note WS60-00-1 Partial Heating Pin temperature: 300°C Time: 3 seconds or less (per side of device) Exposure limit: None Note Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).