UPC1350C NEC | Alldatasheet

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Technical content

BIPOLAR ANALOG INTEGRATED CIRCUIT | 450 mW AF POWER AMPLIFIER WITH PRE AMPLIFIER AND ALC CIRCUIT SILICON BIPOLAR MONOLITHIC INTEGRATEDCIRCUIT | SSS —

DESCRIPTION

The PC1350C is a silicon monolithic integrated circuit designed for an audio power amplifier application at 6 volts ; Power supply. : The device contains a high gain low noise preamplifier, an automatic level control (ALC) and a high gain low : distortion power amplifier. , The perfect audio circuit of 8 cassette tape recorder is obtained with the device. ‘

FEATURES

© All functions of a preamplifier, an ALC circuit and 3 power amplifier are encapsulated in a 14-pins dual in-line package with heat sink TAB. @ Low noise, especially tow pulsive noise. © Power amplifier stage has high gain, high output power and low distortion characteristics, © Preamplifier stage has high gain and low distortion characteristics. | © Wide ALC range: output voltage change 1.8 V TYP. , ALC range 60 dB TYP. ® Wide supply operating voltage range: Voc = 3,6 to 10 V © Low spurious radiation when driven to output clipping level, { BLOCK DIAGRAM : P.MEAD | PRE ALC BIAS & = FILTER = @OOT Veo POWER. INPUT INPUT FILTER STRAP OUTPUT LJ a [3] Ont Le] i?) | OND = PRE PRE ALO ERASE HEAD POWER POWER FEEDBACK OUTPUT OUTPUT BIAS INPUT FEEDBACK a .

} PACKAGE DIMENSIONS AND CONNECTION DIAGRAM {Top View) in millimeters (inches) I “ 3 12 u 19 3 LJ . Soy ee a a oo | (FR 0.099), ; 3 mm WU UD oe | 1 2 3 4 5 6 ? 19.4 MAX,(0.763 MAX.) . . 7,62(0.900) 378 |__| #2{3] (ee jy se OO AAR — as i 0.44 0.16 ff *) “S (0.17) 4 ~ 0.69 MAX, (0.256 MAX.) ie . (033) ; 0,195) L Electrical Connections | Pin No,| Electrical Connactions GNO | 8 | Power; Output ) Pre; Feedback | 9 | Power Supply Vcc Pre,; Output | 10 | BootSwap } ALC Output | tt | ‘Filter Erase; Head Bias RP, Head Bias & Filter ; | 6 | Power, Input ALC Input | [7 | Power, Fesdbock | 14 | Pres rout ) ABSOLUTE MAXIMUM RATINGS (Ta = 25 “C} Supply Voltage (DC) Vec1 12 v , Supply Voltage (AC) vec2 10 v Circuit Current icc (peak) 500 mA Package Dissipation Pp 24° w Operating Temperature Topt —20 to +75 “c J Storage Temperature Tstg =40 to +126 "c * Mounted and soldered on a 50mm x 50mm | copper foil of a printed circuit board (XXX3 grade), i { 2979

RECOMMENDED CONDITIONS (Ta = 25 ‘C) | Operating Supply Voltage 6 v Supply Voltage Range 3.5to10 V | ELECTRICAL CHARACTERISTICS (Ta = 25 °C, Voc = 6 V, f= 1kHz, NAB ,RLipre) = 10 k®, Ri (power) =8 2) | CHARACTERISTIC |SYMBOL| MIN. | TYP. | MAX. UNIT | TEST CONDITIONS | [OVER ALL CHARACTERISTIC] } Circuit Current [icc | 10 | 20 mA NO SIGNAL Output Power Po 400 | a0) — | mW | VAeMAX, THO.=10% ' Total Harmonic Distortion te 08 [20 1% | Wa=MAax.Po = 50 mW Output Noise Level Nui | - | 10 23 | mVems i Using P. head as an Rg. . 1 ! " VR=MAX. ALC Characteristic ALC) = | 18] 9 | Vj =-70--40 dBm RL'=B6 © ; ALC Range 60 d8 | TH.0.53% AL=56 2 i [PRE AMPLIFIER STAGE] : Open Loop Voltage Gain [Aor | 85 | 65) — | 68 | RL(pre-10kRVo-0.3ve~« \\ Voltage Gain re a8 NAB Vo=0.3V ir i Maximum Output Voltage a 08 | — | Vims | RUipre)= 10kQTH.D=1% Input Impedance Ris | 20 | ; j ka . a ! (POWER AMPLIFIER STAGE] _ : ’ Open Loop Voltage Gain Avo? “T 70 81 - | 66 : Po = 50 mW Voltage Gain Av2 __| 468 fe [Po=50 mW { Output Noise Level - 04 | 20 | mVims | VReMIN. [RG = 0) Input Impedance liz | 20 | 28 | ka | l 300 |

TYPICAL CHARACTERISTICS (Ta = 25 °C, TEST CIRCUIT) Or Nae. DISTORTION vs. pore remone DISTORTION vs. Sea TS [ETH 2 SaaS eee & CER 5 f écisiees ss 3535, aa = SSS ecient Cot 6 FAS Ta iT . rt rl 2 ono} Ee oo LUT TTI TUT Cy TT 003 ro Voie -y 36 1¢ 10ND we cer ners (Pre Amotter Stage? + oarnaer hg v ' CIRCUIT CURRENT, OUTPUT POWER, MAXIMUN CIRCUIT CURRENT, OVER ALL VOLTAGE OUTPUT VOLTAGE GAIN vs. AMBIENT GAIN, OUTPUT POWER. MAXIMUM ee EOE AMP = POWER AMP.) ' ‘00 oT son ee 1 ~ . i > Fiore sida |, ¢ sol * refRom =e i —j- — Fi osphurn. =8 4 $ | — —— } 5 Fed p= +—t 6 is sf Td | —] 4 1 iu rt i seine lsat ; 8 “* eo \\ Lf * : 4! | [| D 2 4 6 8 10 } -2 o 20 “0 ad hed Voc - Seool, Votlage - ¥ . Ta - Ambent Temperature — ec : wo VOLTAGE GAIN vs, FREQUENCY es e= 00, (Pres Pat ed re | eat oe Ht ieee PT eal MEL AH a ! one A A So [| 0? RO wo Os | Hit HT | . 0 EN ili | a . nan 1090 » 1Or 1008, t — Frequency — Hz § 30) | 3° pROILEN HARD COPY 1

TOTAL HARMONIC DISTORTION vs. FREQUENCY TOTAL HARMONIC DISTORTION vs | (PRE AMP. + POWER AMP.) OUTPUT POWER Sey Pee ee A Ee |

2 AS ae 2 |

i i | r ASE tities eetit em ant COMIN CETME EAs ESAT | Seat tet tt 1 oo EHS 201A RE 1 — Frequeecy ~ Hz 3 wo 0 100 300 800 Po — Output Power — nv TEST CIRCUIT STATUS | [item —_[sws|swe] sw] swa]sws|swe|sw7| swe |SWo| ‘ | tcc _jore| 1 [orr|on | 2 lorr| 2 [orF| 1 | Po Jon | 2 lorlore| 2 lore] 2 lore] + | | THO. [ON | 2 [orrlore] 2 [orF| 2 joFF| 1 | Nur [on | 1 [ore|orr] 2 [orr| 2 [orr] 1 | | | acc lon | 2 [orrlore] 1 lorr| 1 [OFF] 2 | | _Avor [on | 2 on | oFF ee | Awo2 Jon [1 [orr| ore] 3 [ow | 2 [ore] 2 | | [wz on | 1 lore[orr] 4 lorr| 2 lorr| 2 | TEST CIRCUIT ow, | _l@1—.... | To a PC13500 hte fe : Le Toad o Gi es Ene ‘ee a oe Yor ? | el BN iO O© wa J

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TYPICAL CHARACTERISTICS (Ta = 25 °C, TYPICAL APPLICATION CIRCUIT) | Mn 100 TM 1 soot nT Th “T | PCIE TUT TUT Pea A 2 | se CII CMe Tn TST 2 eT | oT | a TS Gttinn ol ET TIT CEC CeCe Crh | {= Frequency — Hz 1 ALG OUTPUT VOLTAGE CHANGE vs. . ne avatc OUTPUT vs. | Cee i Seeaie | Cpa 7 EKGneee 3 0 | an change § 0 i gt} ie tt 2 eae B-4 ost [| TIN je PAPER EN y s i a Pit titi] = _—_— F-10 e FS = —— sol | f | Tt TTT | PS SS SS SS | -wLifi | | Tit dt e EReP reer =O = 8 == D-H -H- 190 = ErLPErrTtetere sy V, — Input Level ~ 68m =90 =80=70 =60 —60 —40 -30 -20-i5 ¢ f . V. — Input Level — d8m \\ NOTES FOR USE | 4, About capacitor C10 ; To avoid parasitic oscillation at power amplifier stage, apply the suitable capacitor as C10 as follows. { For a cassette tape recorder, a ceramic capacitor or a Mylar capacitor can be used equally. ° For a cassette tape recorder with radio, use a Mylar capacitor. If a ceramic capacitor is used, a parasitic oscillation may occur caused by feed back as radiation from the capacitor to an RF stage. : 2. About recovery time at recording A recovery time depends on a time constant of a capacity value of C2 and a pallarel value of R4 and an input impedance of IC at pin 13. The recovery time can be adjusted by R4 value. : Bor . a

a NE C ELECTRONICS INC 72 DE L4e7S25 OOOaE7a Oo , \\ uPC1350C ! ese esesefFfFfeHhH eee ope . 6427525 N € C ELECTRONICS INC 72C 08678 D0 7-74-45 ~0/ ‘ PRINTED CIRCUIT BOARD DESIGN CONSIDERATION 1. Use the widest possible printed foil for a power supply and a ground. i 2. The earthing point of C8, C10 and an output terminal should be located as close as possible to the earthing . . (ground) pins (pin 1 and TAB). ° 3. One-point earthing is ideal, but if this is impossible, keep the input loop out of the output loop. Output loop Input loop Output loop ( Output GNO In Output input "4" °F Go t (pint) . (pint) (good example) (bad example) l Bos” ee,