UPA1703G

UPA1703G NEC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 7

Technical content

MOS FIELD EFFECT POWER TRANSISTORS µµµµPA1703 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE 1996© Document No. D11494EJ1V0DS00 (1st edition) Date Published December 1996 N Printed in Japan DATA SHEET

DESCRIPTION

This product is N-Channel MOS Field Effect Transis- tor designed for power management applications of notebook computers.

FEATURES

• Super Low On-Resistance R DS(on)1 = 10.5 mΩ MAX. (VGS = 10 V, ID = 5.0 A) R DS(on)2 = 17 mΩ MAX. (VGS = 4 V, ID = 5.0 A)
• Low C iss C iss = 2180 pF TYP.
• Built-in G-S Protection Diode
• Small and Surface Mount Package (Power SOP8) ABSOLUTE MAXIMUM RATINGS (T A = 25 °°°°C, all terminals are connected) Drain to Source Voltage V DSS 30 V Gate to Source Voltage V GSS ±20 V Drain Current (DC) I D(DC) ±10 A Drain Current (pulse) Notes1 ID(pulse) ±40 A Total Power Dissipation (TA = 25 °C) Notes2 PT 2.0 W Channel Temperature T ch 150 °C Storage Temperature T stg −55 to +150 Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 % 2. Mounted on ceramic substrate of 1200 mm × 0.7 mm The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device acutally used, an addtional protection circuit is externally required if voltage exceeding the rated voltage may be applied to this device. PACKAGE DIMENSIONS (in millimeter) 1.27 0.12 M 6.0 ±0.3 4.4 0.40+0.10 –0.05 0.78 MAX. 0.05 MIN. 1.8 MAX. 1.44 0.8 0.5 ±0.2 0.15+0.10 –0.05 5.37 MAX. 0.10 1, 2, 3 5, 6, 7, 8 ; Source ; Gate ; Drain Source Body Diode Gate Protection Diode Gate Drain

µµµµPA1703 ELECTRICAL CHARACTERISTICS (T A = 25 °°°°C, all terminals are connected) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT R DS(on)1 VGS = 10 V, ID = 5.0 A 8.5 10.5 m Ω R DS(on)2 VGS = 4 V, ID = 5.0 A 12 17 m Ω Gate to Source Cutoff Voltage V GS(off) VDS = 10 V, ID = 1 mA 1.0 1.6 2.0 V Forward Transfer Admittance | y fs |V DS = 10 V, ID = 5.0 A 8.0 18 S Drain Leakage Current I DSS VDS = 30 V, VGS = 0 10 µA Gate to Source Leakage Current I GSS VGS = ±20 V, VDS = 0 ±10 µA Input Capacitance C iss VDS = 10 V 2180 pF Output Capacitance C oss VGS = 0 890 pF Reverse Transfer Capacitance C rss f = 1 MHz 370 pF Turn-On Delay Time t d(on) ID = 5.0 A 25 ns Rise Time t r VGS(on) = 10 V 210 ns Turn-Off Delay Time t d(off) VDD = 15 V 120 ns Fall Time t f R G = 10 Ω 75 ns Total Gate Charge Q G ID = 10 A 40 nC Gate to Source Charge Q GS VDD = 24 V 5.6 nC Gate to Drain Charge Q GD VGS = 10 V 9.6 nC Body Diode Forward Voltage V F(S-D) IF = 10 A, VGS = 0 0.73 V Reverse Recovery Time t rr IF = 10 A, VGS = 0 46 ns Reverse Recovery Charge Q rr di/dt = 100 A/µs4 5 n C Test Circuit 1 Switching Time Test Circuit 2 Gate Charge PG. R G VGS D.U.T. R L VDD t = 1 sµ Duty Cycle ≤ 1 % VGS Wave Form ID Wave Form VGS 10 % 90 %VGS(on) 10 %0 ID 90 % 90 % td(on) tr td(off) tf 10 % R G = 10 Ω ID ton toff PG. 50 Ω D.U.T. R L VDD IG = 2 mA t Drain to Source On-state Resistance

µµ µµPA1703 FORWARD BIAS SAFE OPERATING AREA VDS - Drain to Source Voltage - V ID - Drain Current - A DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA T A - Ambient Temperature - °C dT - Percentage of Rated Power - % TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE T A - Ambient Temperature - °C PT - Total Power Dissipation - W 0 200 20 40 60 80 100 120 140 160 100 40 60 80 100 120 140 160 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0.1 0.1 100 1 10 100 TA = 25 °C Single Pulse Mounted on ceramic substrate of 1 200 mm 2 × 0.7 mm 1 ms Power Dissipation Limited DC 100 ms ID(DC) 10 ms ID(pulse) Note: Mounted on ceramic substrate of 1 200 mm 2 × 0.7 mm TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH PW - Pulse Width - s rth(t) - Transient Thermal Resistance - °C/W 0.001 0.01 0.1 100 1 000 1 m 10 m 100 m 1 10 100 1 000 10 100 Mounted on ceramic substrate of 1 200 mm 2 × 0.7 mm Single Pulse Channel to Ambient RDS(on) Limited (at V GS = 10 V) µ µ

µµµµPA1703 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT ID - Drain Current - A | yfs | - Forward Transfer Admittance - S DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VGS - Gate to Source Voltage - V R DS(on) - Drain to Source On-State Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE Tch - Channel Temperature - °C VGS(off) - Gate to Source Cutoff Voltage - V ID - Drain Current - A R DS(on) - Drain to Source On-State Resistance - mΩ VDS = 10 V Pulsed 0.1 1 100 10 100 10 15 Pulsed 10 100 Pulsed VDS = 10 V ID = 1 mA –50 0 50 100 150 1.0 2.0 VGS = 10 V VGS = 4 V ID = 5.0 A 1.5 0.5 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V ID - Drain Current - A VGS - Gate to Source Voltage - V ID - Drain Current - A 0.1 0 0.4 0.6 0.8

100 Pulsed

0.20 Pulsed VGS = 10 V 4 V Tch = –25 °C 25 °C 75 °C 125 °C VDS = 10 V Tch = –25 °C 25 °C 75 °C 125 °C FORWARD TRANSFER CHARACTERISTICS

µµµµPA1703 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE Tch - Channel Temperature - °C R DS(on) - Drain to Source On-State Resistance - mΩ SOURCE TO DRAIN DIODE FORWARD VOLTAGE VSD - Source to Drain Voltage - V ISD - Diode Forward Current - A CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V C iss, Coss, Crss - Capacitance - pF SWITCHING CHARACTERISTICS ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns 0.1 –50 0 50 100 150 ID = 5.0 A 0.1 100 0.5 Pulsed 0.1 100 1 000 10 000 1 10 100 VGS = 0 f = 1 MHz 100 1 000 1 10 100 VGS - Gate to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT IF - Diode Current - A trr - Reverse Recovery Time - ns di/dt = 100 A/ s VGS = 0 µ 0.1 1 10 100 1.0 1.5 VDD = 15 V VGS(on) = 10 V R G = 10 Ω DYNAMIC INPUT/OUTPUT CHARACTERISTICS Q G - Gate Charge - nC VDS - Drain to Source Voltage - V 0 10 20 30 40 VGS = 4 V 10 V C iss C oss C rss VDD = 24 V 15 V 6 V VGS VDS td(off) td(on) tr tf VGS = 4 V VGS = 0 1 000 100 ID = 10 A

µµµµPA1703 REFERENCE Document Name Document No. NEC semiconductor device reliability/quality control system C 11745E Quality grade on NEC semiconductor devices C11531E Semiconductor device mounting technology manual C10535E Semiconductor device package manual C10943X Guide to quality assurance for semiconductor devices MEI-1202 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037

µµµµPA1703 [MEMO]