UPA1572B

UPA1572B NEC | Alldatasheet

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Technical content

© 1996 DATA SHEET The information in this document is subject to change without notice. Compound Field Effect Power Transistor µPA1572B

DESCRIPTION

The µPA1572B is N-channel Power MOS FET Array that built in 4 circuits designed for solenoid, motor and lamp driver.

FEATURES

• Full Mold Package with 4 Circuits
• 4 V driving is possible
• Low On-state Resistance R DS(on) = 0.6 Ω MAX. (VGS = 10 V, ID = 1 A) R DS(on) = 0.8 Ω MAX. (VGS = 4 V, ID = 1 A)
• Low Input Capacitance Ciss = 110 pF TYP.

ORDERING INFORMATION

µPA1572BH 10Pin SIP ABSOLUTE MAXIMUM RATINGS (T A = 25 °C) Drain to Source Voltage (VGS = 0) VDSS 60 V Gate to Source Voltage (VDS = 0) V GSS (AC) ±20 V Drain Current (DC) I D (DS) ±2.0 A/unit Drain Current (pulse) I D (pulse) *1 ±6.0 A/unit Total Power Dissipation P T1 *2 20 W Total Power Dissipation P T2 *3 3.0 W Channel Temperature T CH 150 °C Storage Tempreature T stg −55 to +150°C Single Avalanche Current I AS *4 5.0 A Single Avalanche Energy E AS *4 0.1 mJ *1 PW ≤ 10 µs, Duty Cycle ≤ 1 % *2 4 Circuits TC = 25 °C *3 4 Circuits TA = 25 °C *4 Starting T CH = 25 °C, VDD = 30 V, VGS = 20 V → 0, RG = 25 Ω , L = 100 µH Build-in Gate Diodes are for protection from static electricity in handing. In case high voltage over VGSs is applied, please append gate protection circuits. N-CHANNEL POWER MOS FET ARRAY SWITCHING INDUSTRIAL USE 26.8 MAX. 4.0 2.5 1.4 2468 11 0 CONNECTION DIAGRAM PACKAGE DIMENSIONS in millimeters 123456789 1 0 0.6±0.1 2.54 1.4 10 MIN. 0.5±0.1 ELECTRODE CONNECTION 2, 4, 6, 8 3, 5, 7, 9 1, 10 : Gate : Drain : Source Document No. G11177EJ1V0DS00 (1st edition) Date Published May 1996 P Printed in Japan

µPA1572B ELECTRICAL CHARACTERISTICS (T A = 25 °C) CHARACTERISTIC SYMBOL MIN. TYP. MAX. UNIT TEST CONDITION Drain Leakage Current I DSS 10 µAV DS = 60 V, VGS = 0 Gate Leakage Current I GSS ±10 µAV GS = ±20 V, VDS = 0 Gate Cutoff Voltage V GS (off) 1.0 2.0 V V DS = 10 V, ID = 1.0 mA Forward Transfer Admittance Yfs 0.5 S V DS = 10 V, ID = 1.0 A Drain to Source ON-Resistance R DS (on)1 0.3 0.6 Ω VGS = 10 V, ID = 1.0 A Drain to Sourse ON-Resistance R DS (on)2 0.4 0.8 Ω VGS = 4.0 V, ID = 1.0 A Input Capacitance C iss 110 pF V DS = 10 V, VGS = 0, f = 1.0 MHz Output Capacitance C oss 70 pF Reverse Transfer Capacitance C rss 25 pF Turn-on Delay Time t d (on) 30 ns I D = 1.0 A, VGS (on) = 10 V, VDD = 30 V, RL = 30 Ω Rise Time t r 200 ns Turn-off Delay Time t d (off) 100 ns Fall Time t f 160 ns Total Gate Charge Q G 5.4 nC V GS = 10 V, ID = 2.0 A, VDD = 48 V Gate to Source Charge Q GS 0.7 nC Gate to Drain Charge Q GD 2.0 nC Body Diode Forward Voltage V F (S-D) 1.0 V I F = 2.0 A, VGS = 0 Reverse Recovery Time t rr 130 ns I F = 2.0 A, VGS = 0, di/dt = 50 A/µs Reverse Recovery Charge Q rr 110 nC

µPA1572B Test Circuit 1 Avalanche Capability L 50 Ω D.U.T. R G = 25 Ω VGS = 20 V → 0 PG. VDD VDS Starting TCH BV DSS VDD ID IAS Test Circuit 2 Switching Time R L VGS VGS (on) td (on) tr ton td (off) tr toff ID ID 90 % 90 % 10 % 10 % 90 % 10 % VGS Wave From ID Wave From D.U.T. R G VGS t µt = 1 s Duty Cycle ≤ 1 % R G = 10 ΩPG. VDD Test Circuit 3 Gate Charge R L 50 Ω D.U.T. IG = 2 mA PG. VDD

µPA1572B CHARACTERISTICS (T A = 25 °C) FORWARD BIAS SAFE OPERATING AREA VDS - Drain to Source Voltage - V ID - Drain Current - A 0.01 0.1 0.1 1.0 1.0 10 100 TC = 25 °C Single Pulse TA - Ambient Temperature - °C PT - Total Power Dissipation - W 0 50 100 150 3.0 2.0 1.0 TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE

4 Circuits operation

2 Circuits operation

3 Circuits operation

1 Circuit operation

0.5 1.5 2.5 TC - Case Temperature - °C PT - Total Power Dissipation - W 0 50 100 150 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE RDS(on) Limited(V GS =10V) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA T C - Case Temperature - °C dT - Percentage of Rated Power - % 0 20 40 60 80 100 120 140 160 100 DC ID(Pulse) 3.5 Under Same dissipation in each circuit Under Same dissipation in each circuit Tc is grease Temperature on back surface ID(DC) 0.1ms 1ms 10ms 50ms 0.5ms FORWARD TRANSFER CHARACTERISTICS VGS- Gate to Source Voltage - V ID - Drain Current - A 0.1 1.0 100 0 24 6 TA=125 °C 75 °C 25 °C -25 °C Pulsed VDS =10V DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V ID - Drain Current - A 0 2 31

8 Pulsed

VGS =20V 10V VGS =4V /,/, NEC PA1572BH Lead Print Circuit Boad µ

µPA1572B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH PW - Pulse Width - s rth(t) - Transient Thermal Resistance - °C/W 100 0.1 1.0 1 000 10 000 1 m 10 m 100 m 1 10 100 1 000 100 For Each Circuit, Single Pulse R th (CH-A) 4Circuits 3Circuits 2Circuits 1Circuit FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT ID - Drain Current - A VDS =10V Pulsed 0.01 0.1 1.0 1.0 10 0.1  yfs  - Forward Transfer Admittance - S TA=-25°C 25°C 75°C 125°C DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VGS - Gate to Source Voltage - V R DS(on) - Drain to Source On-State Resistance - Ω 0 10 0.5 Pulsed 1.0 1.5 ID = 2 A 1 A 0.4 A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT I D - Drain Current - A R DS(on) - Drain to Source On-State Resistance - Ω 0.1 1.0 10 2.0 1.0 VGS =4V VGS =10V Pulsed GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE TCH - Channel Temperature - °C VGS(off) - Gate to Source Cutoff Voltage - V − 50 0 50 100 150

2 VDS = 10 V

ID = 1 mA µ

µPA1572B VGS - Gate to Source Voltage - V DYNAMIC INPUT/OUTPUT CHARACTERISTICS Q G - Gate Charge - nC VDS - Drain to Source Voltage - V 0 2468 VGS VDS VDD =12V 30V 48V ID =2A CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V C iss, Coss, Crss - Capacitance - pF 1.0 0.1 100 1 000 1 10 100 VGS = 0 f = 1 MHz C iss C oss C rss DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE TCH - Channel Temperature -°C R DS(on) - Drain to Source On-State Resistance - Ω − 50 0 50 100 150 0.8 0.6 0.4 0.2 VGS =4V VGS =10V ID = 1A SOURCE TO DRAIN DIODE FORWARD VOLTAGE VSD - Source to Drain Voltage - V ISD - Diode Forward Current - A0.1 1.0 0.5 Pulsed 1.0 1.5 VGS =2V VGS =0 SWITCHING CHARACTERISTICS ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns 1.0 100 1 000 0.1 1.0 10 VDD =30V VGS =10V R G =10 Ω td(off) tr tf td(on) REVERSE RECOVERY TIME vs. DRAIN CURRENT ID - Drain Current - A trr - Reverse Recovery time - ns 100 1 000 0.1 1.0 10 di/dt =50A/ s VGS = 0 µ

µPA1572B SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD L - Inductive Load - H IAS - Single Avalanche Current - A 0.1 1.0 0.1 100 1 m10 10 m IAS =1A SINGLE AVALANCHE ENERGY DERATING FACTOR Starting TCH - Starting Channel Temperature - °C Energy Derating Factor - % 50 75 100 125 150 100 EAS=0.1mJ VDD = 30 V R G = 25 Ω VGS = 20 V → 0 IAS ≤ 1.0A VDD = 30 V VGS = 20 V → 0 R G = 25Ω Starting TCH =25°C µµ REFERENCE Document Name Document No. NEC semiconductor device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual C10535E Semiconductor device package manual C10943X Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide X10679E Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037

µPA1572B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard : Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5