UPA1552B NEC | Alldatasheet

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Technical content

© 1995 DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR µPA1552B N-CHANNEL POWER MOS FET ARRAY SWITCHING USE

DESCRIPTION

The µPA1552B is N-channel Power MOS FET Array that built in 4 circuits designed, for solenoid, motor and lamp driver.

FEATURES

  • 4 V driving is possible
  • Large Current and Low On-state Resistance ID(DC) = ±5.0 A R DS(on)1 ≤ 0.18 Ω MAX. (VGS = 10 V, ID = 3 A) R DS(on)2 ≤ 0.24 Ω MAX. (VGS = 4 V, ID = 3 A)
  • Low Input Capacitance Ciss = 200 pF TYP.

ORDERING INFORMATION

µPA1552BH 10 Pin SIP ABSOLUTE MAXIMUM RATINGS (T A = 25 ˚C) Drain to Source Voltage VDSS Note 1 60 V Gate to Source Voltage V GSS Note 2 ±20 V Drain Current (DC) I D(DC) ±5.0 A/unit Drain Current (pulse) I D(pulse) Note 3 ±20 A/unit Total Power Dissipation PT1 Note 4 28 W Total Power Dissipation PT2 Note 5 3.5 W Channel Temperature T CH 150 ˚ C Storage Temperature T stg –55 to +150 ˚ C Single Avalanche Current IAS Note 6 5.0 A Single Avalanche Energy EAS Note 6 2.5 mJ Notes 1. VGS = 0 2. VDS = 0 3. PW ≤ 10 µs, Duty Cycle ≤ 1 % 4. 4 Circuits, TC = 25 ˚C 5. 4 Circuits, TA = 25 ˚C 6. Starting TCH = 25 ˚C, VDD = 30 V, VGS = 20 V → 0, R G = 25 Ω , L = 100 µH The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Document No. G10599EJ2V0DS00 (2nd edition) Date Published December 1995 P Printed in Japan PACKAGE DIMENSIONS in millimeters CONNECTION DIAGRAM 26.8 MAX. 2.5 1.4 0.6±0.1 2.54 4.0 10 MIN. 1.4 0.5±0.1 1 1023456789 2, 4, 6, 8 3, 5, 7, 9 1, 10 : Gate : Drain : Source ELECTRODE CONNECTION

µPA1552B ELECTRICAL CHARACTERISTICS (T A = 25 ˚C) CHARACTERISTIC SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain Leakage Current I DSS VDS = 60 V, VGS = 0 10 µA Gate Leakage Current I GSS VGS = ±20 V, VDS = 0 ±10 µA Gate Cutoff Voltage V GS(off) VDS = 10 V, ID = 1.0 mA 1.0 2.0 V Forward Transfer Admittance | Y fs |V DS = 10 V, ID = 3.0 A 2.4 S Drain to Source On-State R DS(on)1 VGS = 10 V, ID = 3.0 A 0.09 0.18 Ω Resistance R DS(on)2 VGS = 4.0 V, ID = 3.0 A 0.12 0.24 Ω Input Capacitance C iss VDS = 10 V, VGS = 0, f = 1.0 MHz 200 pF Output Capacitance C oss 150 pF Reverse Transfer Capacitance C rss 55 pF Turn-on Delay Time t d(on) ID = 3.0 A, VGS = 10 V, VDD = 30 V, 20 ns Rise Time t r R L = 10 Ω 100 ns Turn-off Delay Time t d(off) 670 ns Fall Time t f 310 ns Total Gate Charge Q G VGS = 10 V, ID = 5.0 A, VDD = 48 V 13 nC Gate to Source Charge Q GS 2n C Gate to Drain Charge Q GD 4.7 nC Body Diode Forward Voltage V F(S-D) IF = 5.0 A, VGS = 0 1.0 V Reverse Recovery Time t rr IF = 5.0 A, VGS = 0, di/dt = 50 A/µs 280 ns Reverse Recovery Charge Q rr 820 nC Test Circuit 3 Gate Charge VGS = 20 V → 0 PG R G = 25 Ω 50 Ω D.U.T. L VDD Test Circuit 1 Avalanche Capability PG. R G = 10 Ω D.U.T. R L VDD Test Circuit 2 Switching Time R G PG. IG = 2 mA 50 Ω D.U.T. R L VDD ID VDD IAS VDS BV DSS Starting TCH VGS t = 1 s Duty Cycle ≤ 1 % VGS Wave Form ID Wave Form VGS ID 10 % 10 % 90 % 90 % 90 % 10 % VGS (on) ID ton toff td (on) tr td (off) tf t µ

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µPA1552B CHARACTERISTICS (T A = 25 ˚C) FORWARD TRANSFER CHARACTERISTICS VGS - Gate to Source Voltage - V ID - Drain Current - A 0.1 1.0 100 0 246 FORWARD BIAS SAFE OPERATING AREA VDS - Drain to Source Voltage - V ID - Drain Current - A 0.1 0.1 100 1 10 100 TC = 25 ˚C Single Pulse TA - Ambient Temperature - ˚C PT - Total Power Dissipation - W 0 50 100 150 TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE

4 Circuits operation

each circuit2 Circuits operation

3 Circuits operation

1 Circuit operation

TA = 125 ˚C 75 ˚C 25 ˚C -25 ˚C TC - Case Temperature - ˚C PT - Total Power Dissipation - W 0 50 100 150 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE

2 Circuits operation

RDS(on) Limited(V GS = 10 V) ID(pulse) PW = 1 ms 10 ms 50 ms 100 ms DC ID(DC) DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE V DS - Drain to Source Voltage - V ID - Drain Current - A 0 2 3 4 Pulsed VGS = 4 V VGS = 20 V 10 V DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TC - Case Temperature - ˚C dT - Percentage of Rated Power - % 0 20 40 60 80 100 120 140 160 100 Pulsed VGS = 10 V Under same dissipation in each circuit Lead Print Circuit Boad /,/,/,/,/, /,/, NEC PA1552BH TC is grease Temperature on back surface µ

µPA1552B DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VGS - Gate to Source Voltage - V R DS(on) - Drain to Source On-State Resistance - mΩ 0 10 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE TCH - Channel Temperature - ˚C VGS(off) - Gate to Source Cutoff Voltage - V ID - Drain Current - A R DS(on) - Drain to Source On-State Resistance - mΩ 100 1.0 100 Pulsed 200 Pulsed VDS = 10 V ID = 1 mA –50 0 50 100 150 200 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT ID - Drain Current - A 0.1 1.0 1.0 100 0.1 TA = -25 ˚C 25 ˚C 75 ˚C 125 ˚C TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH PW - Pulse Width - sec rth(t) - Transient Thermal Resistance - ˚C/W 100 0.1 1.0 1 000 1 m 10 m 100 m 1 10 100 1 000 R th(CH-C) 100 300 ID = 5 A 3 A 1 A 300 VGS = 4 V VGS = 10 V | yfs | - Forward Transfer Admittance - S VDS = 10 V Pulsed R th(CH-A) 4Circuits 3Circuits 2Circuits 1Circuit Single Pulse, For each Circuit µ

µPA1552B DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE TCH - Channel Temperature -˚C R DS(on) - Drain to Source On-State Resistance - mΩ SOURCE TO DRAIN DIODE FORWARD VOLTAGE VSD - Source to Drain Voltage - V ISD - Diode Forward Current - A CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V C iss, Coss, Crss - Capacitance - pF SWITCHING CHARACTERISTICS ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns 0.1 - 50 0 50 100 150 ID = 3 A 0.010 0.1 1.0 0.5 Pulsed 0.1 100 1 000 1 10 100 VGS = 0 f = 1 MHz 100 1 000 1.0 10 100 VGS - Gate to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT ID - Drain Current - A trr - Reverse Recovery time - ns di/dt = 50 A/ s VGS = 0 0.1 100 1 000 1.0 10 100 1.0 1.5 VDD = 30 V VGS = 10 V R G = 10 Ω DYNAMIC INPUT/OUTPUT CHARACTERISTICS Q G - Gate Charge - nC VDS - Drain to Source Voltage - V 04 8 1 2 1 62 6 10 14 200 150 100 VGS = 4 V VGS = 10 V C iss C oss C rss VGS VDS VDD = 12 V 30 V 48 V td(off) tf tr td(on) VGS = 10 V VGS = 0 ID = 5 A µ

µPA1552B SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD L - Inductive Load - H IAS - Single Avalanche Energy - mJ 1.0 0.1 100 1 m VDD = 30 V VGS = 20 V → 0 R G = 25Ω Starting TCH = 25 ˚C 10 10 m IAS = 5 A EAS = 2.5 mJ SINGLE AVALANCHE ENERGY DERATING FACTOR Starting TCH - Starting Channel Temperature - ˚C Energy Derating Factor - % 50 75 100 125 150 VDD = 30 V R G = 25 Ω VGS = 20 V → 0 IAS <= 5.0 A 100 µ REFERENCE Document Name Document No. NEC semiconductor device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual IEI-1207 Semiconductor device package manual IEI-1213 Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide MF-1134 Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037

µPA1552B [MEMO]

µPA1552B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11