UPA1523B NEC | Alldatasheet

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© 1996 DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR µPA1523B Document No. G11331EJ1V0DS00 Date Published May 1996 P Printed in Japan The information in this document is subject to change without notice. P-CHANNEL POWER MOS FET ARRAY SWITCHING INDUSTRIAL USE

DESCRIPTION

The µPA1523B is P-channel Power MOS FET Array that built in 4 circuits designed for solenoid, motor and lamp driver.

FEATURES

  • Full Mold Package with 4 Circuits
  • –4 V driving is possible
  • Low On-state Resistance R DS(on)1 = 0.8 Ω MAX. (@V GS = –10 V, ID = –1 A) R DS(on)2 = 1.3 Ω MAX. (@V GS = –4 V, ID = –1 A)
  • Low Input Capacitance Ciss = 190 pF TYP.

ORDERING INFORMATION

µPA1523BH 10 Pin SIP ABSOLUTE MAXIMUM RATINGS (T A = 25 ˚C) Drain to Source Voltage (VGS = 0) VDSS –60 V Gate to Source Voltage (VDS = 0) VGSS(AC) 20 V Drain Current (DC) I D(DC) 2.0 A/unit Drain Current (pulse) I D(pulse) *1 8.0 A/unit Total Power Dissipation P T1 *2 28 W Total Power Dissipation P T2 *3 3.5 W Channel Temperature T CH 150 ˚C Storage Temperature T stg –55 to + 150 ˚C Single Avalanche Current I AS *4 –2.0 A Single Avalanche Energy E AS *4 0.4 mJ *1 PW ≤ 10 µs, Duty Cycle ≤ 1% *2 4 Circuits, TC = 25 ˚C *3 4 Circuits, TA = 25 ˚C *4 Starting TCH = 25 ˚C, VDD = –30 V, VGS = –20 V → 0, RG = 25 Ω , L = 100 µH Build-in Gate Diodes are for protection from static electricity in handing. In case high voltage over VGSS is applied, please append gate protection circuits. 26.8 MAX. 2.5 1.40.6 ± 0.1 2.54 4.0 10 MIN. 1.4 0.5 ± 0.1 123456789 1 0 PACKAGE DIMENSIONS in millimeters CONNECTION DIAGRAM ELECTRODE CONNECTION 2, 4, 6, 8 3, 5, 7, 9 1, 10 : Gate : Drain : Source

µPA1523B ELECTRICAL CHARACTERISTICS (T A = 25 ˚C) CHARACTERISTIC SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain Leakage Current I DSS VDS = –60 V, VGS = 0 –10 µA Gate Leakage Current I GSS VGS = 20 V, VDS = 0 10 µA Gate Cutoff Voltage V GS(off) VDS = –10 V, ID = –1.0 mA –1.0 –2.0 V Forward Transfer Admittance | Y fs |V DS = –10 V, ID = –1.0 A 0.8 S Drain to Source ON-Resistance RDS(on)1 VGS = –10 V, ID = –1.0 A 0.5 0.8 Ω Drain to Source ON-Resistance RDS(on)2 VGS = –4.0 V, ID = –1.0 A 0.8 1.3 Ω Input Capacitance C iss VDS = –10 V, VGS = 0, f = 1.0 MHz 190 pF Output Capacitance C oss 115 pF Reverse Transfer Capacitance C rss 43 pF Turn-on Delay Time t d(on) ID = –1.0 A, VGS(on) = –10 V, 8 ns Rise Time t r VDD = –30 V, RL = 30 Ω 53 ns Turn-off Delay Time t d(off) 400 ns Fall Time t f 230 ns Total Gate Charge Q G VGS = –10 V, ID = –2.0 A, VDD = –48 V 10 nC Gate to Source Charge Q GS 1.1 nC Gate to Drain Charge Q GD 3.5 nC Body Diode Forward Voltage V F(S-D) IF = 2.0 A, VGS = 0 1.0 V Reverse Recovery Time t rr IF = 2.0 A, VGS = 0, di/dt = 50 A/µs 180 ns Reverse Recovery Charge Q rr 250 nC . . ± ±

µPA1523B Test Circuit 1 Avalanche Capability PG. VGS = –20 V → 0 R G = 25 Ω 50 Ω D.U.T. L VDD VDD ID IAS BV DSS VDS Starting TCH Test Circuit 2 Switching Time PG. R G R G = 10 Ω D.U.T. R L VDD t t = 1 s Duty cycle ≤ 1 % µ VGS VGS ID (—) VGS Wave Form I D Wave Form 0 10 % 90 %VGS(on) ID 0 10 % 90 % 10 % 90 % td(on) tr ton td(off) tf toff Test Circuit 3 Gate Charge PG. IG = 2 mA 50 Ω D.U.T. R L VDD

µPA1523B TYPICAL CHARACTERISTICS (T A = 25 ˚C) FORWARD BIAS SAFE OPERATING AREA VDS - Drain to Source Voltage - V ID - Drain Current - A –0.1 –0.1 –1.0 –10 –100 –1.0 –10 –100 TC = 25 ˚C Single Pulse TA - Ambient Temperature - ˚C PT - Total Power Dissipation - W 0 50 100 150 3.0 2.0 1.0 TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 0.5 1.5 2.5 TC - Case Temperature - ˚C PT - Total Power Dissipation - W 0 100 150 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE

4 Circuits operation

2 Circuits operation

3 Circuits operation

1 Circuit operation

RDS(on) Limited(V GS = –10 V) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA T C - Case Temperature - ˚C dT - Percentage of Rated Power - % 0 20 40 60 80 100 120 140 160 100 DC ID(Pulse) 3.5 Under Same dissipation in each circuit Tc is grease Temperature on back surface ID(DC) Pw = 100 s 1 ms10 ms 500 s FORWARD TRANSFER CHARACTERISTICS VGS - Gate to Source Voltage - V ID - Drain Current - A –0.01 –0.1 –10 0 –4 –8 Pulsed VDS = –10 V DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V ID - Drain Current - A 0 –4 –6–2 Pulsed VGS = – 10 V VGS = –4 V Power Dissipation Limited –2 –6 –10 TA=125 ˚C 75 ˚C 25 ˚C –25 ˚C /,/, NEC PA1523BHµ µµ Lead Print Circuit Boad Under Same dissipation in each circuit

µPA1523B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH PW - Pulse Width - s rth(t) - Transient Thermal Resistance - ˚C/W 1 000 100 10010 m1 m100 µ 1 10 1 000 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT ID - Drain Current - A –0.01 –0.1 100 –1.0 –10 0.1 | yfs | - Forward Transfer Admittance - S DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VGS - Gate to Source Voltage - V R DS(on) - Drain to Source On-State Resistance - Ω 0 –10 0.5 –20 Pulsed 1.0 1.5 ID = –2 A –1 A –0.4 A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT I D - Drain Current - A R DS(on) - Drain to Source On-State Resistance - mΩ –10–0.10 1 000 1 500 GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE TCH - Channel Temperature - ˚C VGS(off) - Gate to Source Cutoff Voltage - V –50 0 50 100 150 –2 VDS = –10 V ID = –1 mA 0.1 1.0 100 m Single Pulse R th(CH-A) 4ircuits 3ircuits 2ircuits 1ircuit R th(CH-C) 1.0 TA = –25 ˚C 25 ˚C 75 ˚C 125 ˚C V DS = –10 V Pulsed –1.0 500 Pulsed VGS = –4 V VGS = –10 V

µPA1523B VGS - Gate to Source Voltage - V DYNAMIC INPUT/OUTPUT CHARACTERISTICS Q G - Gate Charge - nC VDS - Drain to Source Voltage - V 04 2608 1 2 10 –20 –40 –60 –80 –10 –12 –14 –16 VGS VDS VDD = –12 V –30 V –48 V ID = –2 A CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V C iss, Coss, Crss - Capacitance - pF –0.1 100 1 000 10 000 –1 –10 –100 VGS = 0 f = 1 MHz C iss C oss C rss DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE TCH - Channel Temperature - ˚C R DS(on) - Drain to Source On-State Resistance - mΩ –50 0 50 100 150 1600 1200 800 400 VGS = –4 V VGS = –10 V ID = –1 A SOURCE TO DRAIN DIODE FORWARD VOLTAGE VSD - Source to Drain Voltage - V ISD - Diode Forward Current - A0.1 1.0 SWITCHING CHARACTERISTICS ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns 1.0 100 1 000 –0.01 –1.0 –10 VDD = –30 V VGS = –10 V R G = 10 Ω REVERSE RECOVERY TIME vs. DRAIN CURRENT ID - Drain Current - A trr - Reverse Recovery time - ns 100 1 000 –0.1 –1.0 –10 di/dt = 50A/ s VGS = 0 µ –0.1 td(off) tr tf td(on) 1.0 2.0 Pulsed VGS = –2 V VGS =0

µPA1523B SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD L - Inductive Load - H IAS - Single Avalanche Current - A –0.1 –1.0 –10 –0.1 100 1 m10 µµ 10 m IAS = –2 A SINGLE AVALANCHE ENERGY DERATING FACTOR Starting TCH - Starting Channel Temperature - ˚C Energy Derating Factor - % 50 75 100 125 150 100 EAS = 0.4 mJ VDD = –30 V R G = 25 Ω VGS = –20 V → 0 IAS ≤ 1.0 A VDD = –30 V VGS = –20 V → 0 R G = 25 Ω Starting TCH = 25 ˚C REFERENCE Document Name Document No. NEC semiconductor for device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual C10535E Semiconductor device package manual C10943X Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide X10679E Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037

µPA1523B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11 [MEMO]