UPA1500B NEC | Alldatasheet

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Technical content

© 1995 DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR µPA1500B N-CHANNEL POWER MOS FET ARRAY SWITCHING USE

DESCRIPTION

The µPA1500B is N-channel Power MOS FET Array that built in 4 circuits and surge absorber designed for solenoid, motor and lamp driver.

FEATURES

  • 4 V driving is possible
  • Large Current and Low On-state Resistance I D(DC) = ±3 A R DS(on)1 ≤ 0.18 Ω MAX. (VGS = 10 V, ID = 2 A) R DS(on)2 ≤ 0.24 Ω MAX. (VGS = 4 V, ID = 2 A)
  • Low Input Capacitance Ciss = 200 pF TYP.
  • Surge Absorber, built in

ORDERING INFORMATION

µPA1500BH 12 Pin SIP ABSOLUTE MAXIMUM RATINGS (T A = 25 ˚C) Drain to Source Voltage V DSS Note 1 60 V Gate to Source Voltage V GSS Note 2 ±20 V Drain Current (DC) I D(DC) ±3.0 A/unit Drain Current (pulse) I D(pulse) Note 3 ±12 A/unit Repetitive peak Reverse VoltageVRRM Note 4 65 V Diode Forward Current I F(av) Note 4 3.0 A/unit Total Power Dissipation P T1 Note 5 28 W Total Power Dissipation P T2 Note 6 4.0 W Channel Temperature T CH 150 ˚ C Storage Temperature T stg –55 to 150 ˚C Single Avalanche Current IAS Note 7 3.0 A Single Avalanche Energy E AS Note 7 0.9 mJ Notes 1. VGS = 0 2. VDS = 0 3. PW ≤ 10 µs, Duty Cycle ≤ 1 % 4. Rating of Surge Absorber 5. 4 Circuits, TC = 25 ˚C 6. 4 Circuits, TA = 25 ˚C 7. Starting TCH = 25 ˚C, VDD = 30 V, VGS = 20 V → 0, R G = 25 Ω , L = 100 µH The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Document No. G10597EJ2V0DS00 (2nd edition) Date Published December 1995 P Printed in Japan PACKAGE DIMENSIONS (in millimeters) CONNECTION DIAGRAM 234 D 6D 5 D 2R GD 1R G ZD ZD 91 0 1 1 D 8D 7 D 4R GD 3R G ZD ZD D 1 to D4 D 5 to D8 ZD R G : Body Diode : Surge Absorber : Gate to Source Protection Diode : Gate Input Resistance 330 Ω TYP. 31.5 MAX. 4.2 MAX. 123456789 1 0 1 1 1 2 2.5 TYP. 10.5 MAX.10.0 MIN. ELECTRODE CONNECTION 1, 5, 8, 12 2, 4, 9, 11 6, 7 3, 10 GATE DRAIN, ANODE SOURCE CATHODE

µPA1500B ELECTRICAL CHARACTERISTICS (T A = 25 ˚C) CHARACTERISTIC SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain Leakage Current I DSS VDS = 60 V, VGS = 0 10 µA Gate Leakage Current I GSS VGS = ±20 V, VDS = 0 ±10 µA Gate Cutoff Voltage V GS(off) VDS = 10 V, ID = 1.0 mA 1.0 2.0 V Forward Transfer Admittance | Y fs |V GS = 10 V, ID = 2.0 A 2.0 S Drain to Source On-State R DS(on)1 VGS = 10 V, ID = 2.0 A 0.10 0.18 Ω Resistance R DS(on)2 VGS = 4.0 V, ID = 2.0 A 0.14 0.24 Ω Input Capacitance C iss VDS = 10 V, VGS = 0, f = 1.0 MHz 200 pF Output Capacitance C oss 150 pF Reverse Transfer Capacitance C rss 55 pF Turn-on Delay Time t d(on) ID = 2.0 A, VGS = 10 V, VDD = 30 V, 20 ns Rise Time t r R L = 15 Ω 100 ns Turn-off Delay Time t d(off) 735 ns Fall Time t f 350 ns Total Gate Charge Q G VGS = 10 V, ID = 3.0 A, VDD = 48 V 13 nC Gate to Source Charge Q GS 2n C Gate to Drain Charge Q GD 4.7 nC Body Diode Forward Voltage V F(S-D) IF = 3 A, VGS = 0 1.0 V SURGE ABSORBER (Diode, builtin) 1 Unit Repetitive peak Reverse CurrentIRRM VR = 65 V 10 µA Diode Forward Voltage V F IF = 3.0 A 1.5 V Test Circuit 3 Gate Charge VGS = 20 V→ 0 PG R in = 25 Ω 50 Ω DUT L VDD Test Circuit 1 Avalanche Capability PG. R in = 10 Ω DUT R L VDD Test Circuit 2 Switching Time R in PG. IG = 2 mA 50 Ω DUT R L VDD ID VDD IAS VDS BV DSS Starting TCH VGS t = 1 s Duty Cycle ≤ 1 % t VGS Wave Form ID Wave Form VGS ID 10 % 10 % 90 % 90 % 90 % 10 % VGS (on) ID ton toff td (on) tr td (off) tf µ

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µPA1500B TYPICAL CHARACTERISTICS (T A = 25 ˚C) FORWARD TRANSFER CHARACTERISTICS VGS - Gate to Source Voltage - V ID - Drain Current - A 0.1 1.0

100 Pulsed

TA = 125˚C 75 ˚C 25 ˚C -25 ˚C FORWARD BIAS SAFE OPERATING AREA V DS - Drain to Source Voltage - V ID - Drain Current - A 0.1 0.1 100 1 10 100 TC = 25 ˚C Single Pulse RDS(on) Limited (V GS = 10 V) ID(Pulse) ID(DC) PW = 1 ms 10 ms 50 ms 100 ms DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE V DS - Drain to Source Voltage - V ID - Drain Current - A 0 2 3 4 PulsedVGS = 20 V 10 V 13 46 TC - Case Temperature - ˚C PT - Total Power Dissipation - W 0 50 100 150 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE

4 Circuits operation

2 Circuits operation

3 Circuits operation

1 Circuit operation

TA - Ambient Temperature - ˚C PT - Total Power Dissipation - W 0 50 100 150 TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TC - Case Temperature - ˚C dT - Percentage of Rated Power - % 0 20 40 60 80 100 120 140 160 100 DC VGS = 4 V Laed Print Circuit Boad /,/,/,/,/, NEC PA1500BH TC is grease Temperature on back surface µ

µPA1500B FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT ID - Drain Current - A | yfs | - Forward Transfer Admittance - S DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VGS - Gate to Source Voltage - V R DS(on) - Drain to Source On-State Resistance - mΩ 0 10 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE TCH - Channel Temperature - ˚C VGS(off) - Gate to Source Cutoff Voltage - V ID - Drain Current - A R DS(on) - Drain to Source On-State Resistance - mΩ 100 0.1 VDS = 10 V Pulsed 0.1 1.0 1.0 100 100 Pulsed 200 1.0 10 Pulsed 1.0 VDS = 10 V ID = 1 mA –50 0 50 100 150 200 0.5 1.5 2.0 300 400 500 600 700 ID = 0.6 A 2 A 3 A 300 VGS = 4 V VGS = 10 V TA = -25 ˚C 25 ˚C 75 ˚C 125 ˚C TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH PW - Pulse Width - sec rth(t) - Transient Thermal Resistance - ˚C/W 100 0.1 1.0 1 000 1 m 10 m 100 m 1 10 100 1 000 Single Pulse. For each Circuit R th(CH-C) R th(CH-A) 4Circuits 3Circuits 2Circuits 1Circuit 100µ

µPA1500B DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE TCH - Channel Temperature -˚C R DS(on) - Drain to Source On-State Resistance - mΩ SOURCE TO DRAIN DIODE FORWARD VOLTAGE VSD - Source to Drain Voltage - V ISD - Diode Forward Current - A SWITCHING CHARACTERISTICS ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns 0.1 –50 100 0 50 100 150 ID = 2 A 0.01 0.1 1.0 0.5 Pulsed 100 1 000 1.0 10 100 VGS - Gate to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT ID - Drain Current - A trr - Reverse Recovery time - ns di/dt = 50 A/ s VGS = 0 0.1 100 1 000 1.0 10 100 1.0 1.5 VDD = 30 V VGS = 10 V R G = 10 Ω DYNAMIC INPUT/OUTPUT CHARACTERISTICS Q g - Gate Charge - nC VDS - Drain to Source Voltage - V 0 4 8 12 162 6 10 14 200 300 VGS = 4 V VGS = 10 V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V C iss, Coss, Crss - Capacitance - pF 0.1 100 1 000 1 10 100 VGS = 0 f = 1 MHz C iss C oss C rss VGS VDD = 12 V 30 V 48 V VDS td(off) tr tf td(on) VGS = 10 V VGS = 0 ID = 3 A µ

µPA1500B SINGLE AVALANCHE ENERGY DERATING FACTOR Starting TCH - Starting Channel Temperature - ˚C Energy Derating Factor - % 50 75 100 125 150 VDD = 30 V R G = 25 Ω VGS = 20 V → 0 IAS ≤ 3.0 A 100 SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD L - Inductive Load - H IAS - Single Avalanche Energy - mJ 1.0 0.1 100 1 m10 10 m IAS = 3 A EAS = 0.9 mJ VDD = 30 V VGS = 20 V → 0 R G = 25Ω Starting TCH = 25 ˚C µ REFERENCE Document Name Document No. NEC semiconductor device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual IEI-1207 Semiconductor device package manual IEI-1213 Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide MF-1134 Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037

µPA1500B [MEMO]

µPA1500B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11