UMA1020M

UMA1020M PHILIPS | Alldatasheet

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Technical content

Product specification Supersedes data of November 1994 File under Integrated Circuits, IC03

1995 Jun 15

Low-voltage dual frequency synthesizer for radio telephones

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M

FEATURES

• Low current from 3 V supply
• Fully programmable RF divider
• 3-line serial interface bus
• Second synthesizer to control first IF or offset loop frequency
• Independent fully programmable reference dividers for each loop, driven from external crystal oscillator
• Dual phase detector outputs to allow fast frequency switching
• Integrated digital-to-analog converter
• Dual power-down modes.

APPLICATIONS

• 2 GHz mobile telephones
• Portable battery-powered radio equipment. GENERAL DESCRIPTION The UMA1020M BICMOS device integrates prescalers, programmable dividers, and phase comparators to implement two phase-locked loops. The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 5 V supplies. The principal synthesizer operates at RF input frequencies up to 2.4 GHz the auxiliary synthesizer operates at 300 MHz. The auxiliary loop is intended for the first IF or to transmit offset loop-frequency settings. Each synthesizer has a fully programmable reference divider. All divider ratios are supplied via a 3-wire serial programming bus. Separate power and ground pins are provided to the analog and digital circuits. The ground leads should be externally short-circuited to prevent large currents flowing across the die and thus causing damage. Digital supplies V DD1 and VDD2 must also be at the same potential. VCC must be equal to or greater than VDD (i.e. VDD = 3 V and VCC = 5 V for wider tuning range). The principal synthesizer phase detector uses two charge pumps, one provides normal loop feedback, while the other is only active during fast mode to speed-up switching. The auxiliary loop has a separate phase detector. All charge pump currents (gain) are fixed by an external resistance at pin I SET (pin 14). Only passive loop filters are used; the charge-pumps function within a wide voltage compliance range to improve the overall system performance. An on-chip 7-bit DAC enables adjustment of an external function, such as the temperature compensation of a crystal oscillator. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V CC , VDD supply voltage V CC ≥ VDD 2.7 − 5.5 V ICC +IDD principal synthesizer supply current auxiliary synthesizer in power-down mode − 9.4 − mA principal and auxiliary synthesizer supply current principal and auxiliary synthesizers ON − 12.1 − mA ICCPD , IDDPD current in power-down mode per supply − 12 −µ A fVCO principal input frequency 1700 − 2400 MHz fAI auxiliary input frequency 20 − 300 MHz fXTAL crystal reference input frequency 3 − 40 MHz fPPC principal phase comparator frequency − 200 − kHz fAPC auxiliary phase comparator frequency − 200 − kHz Tamb operating ambient temperature −30 − +85 °C

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M

ORDERING INFORMATION

UMA1020M SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1 Fig.1 Block diagram.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M PINNING SYMBOL PIN DESCRIPTION FAST 1 control input to speed-up main synthesizer CPPF 2 principal synthesizer speed-up charge-pump output CPP 3 principal synthesizer normal charge-pump output VDD1 4 digital power supply 1 VDD2 5 digital power supply 2 PRI 6 2 GHz principal synthesizer frequency input DGND 7 digital ground f XTAL 8 crystal frequency input from TCXO POFF 9 principal synthesizer power-down input DOUT 10 7-bit digital-to-analog output CLK 11 programming bus clock input DATA 12 programming bus data input E 13 programming bus enable input (active LOW) ISET 14 regulator pin to set the charge-pump currents AUX 15 auxiliary synthesizer frequency input AGND 16 analog ground CPA 17 auxiliary synthesizer charge-pump output V CC 18 supply for charge-pump and DAC circuits AOFF 19 auxiliary synthesizer power-down input LOCK 20 in-lock detect output (main PLL); test mode output Fig.2 Pin configuration. FUNCTIONAL DESCRIPTION Principal synthesizer Programmable reference and main dividers drive the principal PLL phase detector. Two charge pumps produce phase error current pulses for integration in an external loop filter. A hardwired power-down input POFF (pin 9) ensures that the dividers and phase comparator circuits can be disabled. The PRI input (pin 6) drives a preamplifier to provide the clock to the first divider stage. The preamplifier has a high input impedance, dominated by pin and pad capacitance. The circuit operates with signal levels from 60 mV to 180 mV (RMS), and at frequencies up to 2.4 GHz. The high frequency divider circuits use bipolar transistors, slower bits are CMOS. Divide ratios (512 to 131071) allow a 2 MHz phase comparison frequency.

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current pump is enabled via the control input FAST (pin 1). noise and breakthrough levels. phase detector thereby improving linearity. to keep the sink current in the LOW state below 400µA. interference between the charge pumps of each loop. data sent to the device is loaded in bursts framed byE. even during power-down of main and auxiliary loops. Table 1. The first entered bit is p1, the last bit is p21. addresses is given in Table 2.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M Table 1 Format of programmed data Table 2 Bit allocation (note 1) Notes 1. FT = first; LT = last; sPOFF = software power-down for principal synthesizer (1 = OFF); sAOFF = software power-down for auxiliary synthesizer (1 = OFF). 2. The test register should not be programmed with any other value except all zeros for normal operation. Table 3 Out-of-lock select LAST IN PROGRAMMING REGISTER BIT USAGE FIRST IN p21 p20 p19 p18 p17 p16 ../.. p2 p1 ADD0 ADD1 ADD2 ADD3 DATA0 DATA1 ../.. DATA15 DATA16 LATCH ADDRESS LSB DATA COEFFICIENT MSB FT REGISTER BIT ALLOCATION LT p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17 p18 p19 p20 p21 dt16 dt15 dt14 dt13 dt12 DATA FIELD dt4 dt3 dt2 dt1 dt0 ADDRESS TEST BITS(2) 0000 X X X X OLP OLA CR1 CR0 X X sPOFF sAOFF X X X X X 0 0 0 1 PM16 PRINCIPAL MAIN DIVIDER COEFFICIENT PM0 0 1 0 0 X X X X X X PR10 PRINCIPAL REFERENCE DIVIDER COEFFICIENT PR0 0 1 0 1 X X X AM13 AUXILIARY MAIN DIVIDER COEFFICIENT AM0 0 1 1 0 X X X X X X AR10 AUXILIARY REFERENCE DIVIDER COEFFICIENT AR0 0 1 1 1 X X X X X X X X X 0 DA6 7-BIT DAC DA0 1 0 0 0 OLP OLA OUT-OF-LOCK ON PIN 20 0 0 output disabled 0 1 auxiliary phase error 1 0 principal phase error 1 1 both auxiliary and principal

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M Table 4 Fast and normal charge pumps current ratio (note 1) Note 1. ISET = ; common bias current for charge pumps and DAC. Table 5 Power-down modes CR1 CR0 I CPA ICPP ICPPF ICPPF : ICPP 00 4 × ISET 4 × ISET 16 × ISET 4:1 01 4 × ISET 4 × ISET 32 × ISET 8:1 10 4 × ISET 2 × ISET 24 × ISET 1 2:1 11 4 × ISET 2 × ISET 32 × ISET 1 6:1 AOFF POFF FAST PRINCIPAL DIVIDERS AUXILIARY DIVIDERS PUMP CPA PUMP CPP PUMP CPPF DAC AND BIAS 1 1 X OFF OFF OFF OFF OFF OFF 1 0 0 ON OFF OFF ON OFF ON 1 0 1 ON OFF OFF ON ON ON 0 1 X OFF ON ON OFF OFF ON 0 0 0 ON ON ON ON OFF ON

001 O N O N O N O N O N O N

Digital-to-analog converter The 7-bits loaded via the bus into the appropriate latch drive a digital-to-analog converter. The internal current is scaled by the external resistance (R ext) at pin ISET , similar to the charge pumps. The nominal full-scale current is 2 × I SET . The output current is mirrored to produce a full-scale voltage into a user-defined ground referenced resistance, thereby allowing optimum swing from power supply rails within the 2.7 to 5.5 V limits. The bandgap reference voltage at pin I SET is temperature and supply independent. The DAC signal is monotonic across the full range of digital input codes to enable fine adjustment of other system blocks. The typical settling time for full-scale switching is 400 ns into a 12 kΩ // 20 pF load. Power-down modes The action of the control inputs on the state of internal blocks is defined by Table 5. Note that in Table 5, POFF and AOFF can be either the software or hardware power-down signals. The dividers are ON when both hardware and software power-down signals are at logic 0. When either synthesizer is reactivated after power-down, the main and reference dividers of that synthesizer are synchronized to avoid the possibility of random phase errors on power-up.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL PARAMETER MIN. MAX. UNIT VDD digital supply voltage −0.3 +5.5 V VCC analog supply voltage −0.3 +5.5 V ΔVCC −DD difference in voltage between VCC and VDD −0.3 +5.5 V Vn voltage at pins 1, 6, 8 to 15, 19 and 20 −0.3 V DD + 0.3 V V2, 3, 17 voltage at pins 2, 3 and 17 −0.3 V CC + 0.3 V ΔVGND difference in voltage between AGND and DGND (these pins should be connected together) −0.3 +0.3 V Ptot total power dissipation − 150 mW Tstg storage temperature −55 +125 °C Tamb operating ambient temperature −30 +85 °C Tj maximum junction temperature − 95 °C SYMBOL PARAMETER VALUE UNIT R th j-a thermal resistance from junction to ambient in free air 120 K/W

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply; pins 4, 5 and 18 VDD digital supply voltage V DD1 =V DD2 2.7 − 5.5 V VCC analog supply voltage V CC ≥ VDD 2.7 − 5.5 V IDD principal synthesizer digital supply current VDD = 5.5 V − 9 12.5 mA auxiliary synthesizer digital supply current VDD = 5.5 V − 2.7 4.0 mA ICC charge pumps supply current V CC = 5.5 V; Rext=12 kΩ− 0.4 1.0 mA ICCPD , IDDPD current in power-down mode per supply logic levels 0 or V DD − 12 50 µA RF principal main divider input; pin 6 fVCO RF input frequency 1700 − 2400 MHz V6(rms) AC-coupled input signal level (RMS value) R s =5 0Ω ; 1.7 GHz < fVCO < 2.0 GHz 60 − 400 mV R s =5 0Ω ; 2.0 GHz < fVCO < 2.4 GHz 60 − 180 mV ZI input impedance (real part) fVCO = 2 GHz − 300 −Ω C I typical pin input capacitance indicative, not tested− 2 − pF R pm principal main divider ratio 512 − 131071 fPPCmax maximum principal phase comparator frequency − 2000 − kHz fPPCmin minimum principal phase comparator frequency − 10 − kHz Auxiliary main divider input; pin 15 fAI input frequency 20 − 300 MHz V15(rms) AC-coupled input signal level (RMS value) R s =5 0Ω ; 2 . 7V<VDD < 3.5 V 50 − 500 mV R s =5 0Ω ; 3 . 5V<VDD < 5.5 V 100 − 500 mV ZI input impedance (real part) fAI = 100 MHz − 1 − kΩ C I typical pin input capacitance indicative, not tested− 2 − pF R am auxiliary main divider ratio 64 − 16383 fAPCmax maximum auxiliary phase comparator frequency − 2000 − kHz fAPCmin minimum auxiliary phase comparator frequency − 10 − kHz

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M Note 1. ΔI is the change in DAC output current when making the code transitions: 3FH/40H or 1FH/20H. Crystal reference dividers input; pin 8 fXTAL input frequency range from crystal 5 − 40 MHz V8(rms) sinusoidal input signal level (RMS value) V6(rms)< 224 mV 50 − 500 mV V6(rms)> 224 mV 100 − 500 mV ZI input impedance (real part) fXTAL = 30 MHz − 2 − kΩ C I typical pin input capacitance indicative, not tested− 2 − pF R pr principal reference division ratio 8 − 2047 R ar auxiliary reference division ratio 8 − 2047 Charge pump current setting resistor input; pin 14 R ext external resistor from pin 14 to ground 12 − 60 k Ω V14 regulated voltage at pin 14 R ext=1 2kΩ− 1.15 − V Charge pump outputs; pins 17, 3 and 2; Rext =1 2kΩ IOcp charge pump output current error −25 − +25 % Imatch sink-to-source current matching Vcp in range −± 5 − % ILcp charge pump off leakage current Vcp = 1⁄2VCC −5 ±1+ 5 n A Vcp charge pump voltage compliance 0.4 − VCC − 0.4 V Interface logic input signal levels; pins 13, 12, 11 and 1 VIH HIGH level input voltage 0.7V DD − VDD + 0.3 V VIL LOW level input voltage −0.3 − 0.3VDD V Ibias input bias current logic 1 or logic 0 −5 − +5 µA C I input capacitance indicative, not tested − 2 − pF DAC output signal levels; pin 10, Rext =1 2t o2 4kΩ IDAC DAC full scale output current 1.5 × ISET 2 × ISET 2.5× ISET mA V10 output voltage compliance all codes 0 − VDD − 0.4 V I10min minimum DAC current 00 code − 25 µA Imonot worst case monotonicity test:note 1 0.1 − 1.9 Lock detect output signal; pin 20 open-drain output VOL LOW level output voltage I sink= 0.4 mA −− 0.4 V SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Δ I 128

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M SERIAL BUS TIMING CHARACTERISTICS VDD =V CC =3V ; Tamb =2 5°C unless otherwise specified. Note 1. The minimum pulse width (tW ) can be smaller than 4µs provided all the following conditions are satisfied: a) Principal main divider input frequency b) Auxiliary main divider input frequency c) Reference dividers input frequency SYMBOL PARAMETER MIN. TYP. MAX. UNIT Serial programming clock; CLK t r input rise time − 10 40 ns tf input fall time − 10 40 ns Tcy clock period 100 −− ns Enable programming;E tSTART delay to rising clock edge 40 −− ns tEND delay from last falling clock edge −20 −− ns tW minimum inactive pulse width 4000 (1) −− ns tSU;E enable set-up time to next clock edge 20 −− ns Register serial input data; DATA tSU;DAT input data to clock set-up time 20 −− ns tHD;DAT input data to clock hold time 20 −− ns fVCO 512 tW fAI tW fXTAL tW Fig.3 Serial bus timing diagram.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M

APPLICATION INFORMATION

Fig.4 Typical application block diagram.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M Fig.5 Typical test and application diagram. BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB B BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBBB BBBBBBBBBBBB B BBBBBBBBBB B B BBBBBBBBBB B B BBBBBBBBBB B B BBBBBBBBBB B B BBBBBBBBBB B B BBBBBBBBBB B B BBBBBBBBBB B B BBBBBBBBBB B BBBBBBBBBBBB BBBBBBBBBB BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBB B BBBBBBBBBB

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M PACKAGE OUTLINE UNIT A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm 0.15 1.4 1.2 0.32 0.20 0.20 0.13 6.6 6.4 4.5 6.2 0.65 0.45 0.48 0.18 o o0.13 0.1 DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. 0.75 0.45 SOT266-1 90-04-05 95-02-25 w M θ A A 1 A 2 bp D H E Lp Q detail X E Z e c L v M A X (A )3 A y 0.25 11 0 20 11 pin 1 index 0 2.5 5 mm scale SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1 A max. 1.5

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M SOLDERING SO or SSOP Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these cases reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO and SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250°C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Wave soldering SO Wave soldering techniques can be used for all SO packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must be parallel to the solder flow.
• The package footprint must incorporate solder thieves at the downstream end. SSOP Wave soldering isnot recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed:
• A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). M ETHOD (SO OR SSOP) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260°C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150°C within 6 seconds. Typical dwell time is 4 seconds at 250°C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonally- opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300°C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds at 270 to 320°C.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M DEFINITIONS LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Where application information is given, it is advisory and does not form part of the specification.

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M NOTES

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M NOTES

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Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones UMA1020M NOTES

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