UM7108 UMC | Alldatasheet
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Technical content
Features
® Multi-function measurement system: ™ Provides serial data output for other applications + Analog to digital converter (UM7108F) + Data hold and Peak hold, both with LCD = Guaranteed zero reading with zero input annunciators ™ True polarity indication for precision + Short circuit beeper with LCD annunciator null detection + Low battery detector with LCD annunciator ® Convenient 9V battery operation +» Frequency counter with two LCD annunciators ® Low power operation — 10mW. (UM7108F) © Low noise A/D converter ™ Frequency counter: Auto range from 2 KHz to 20 MHz + Lownoise —- 15 uV "Triplex LCD display + Differential inputs — 1 pA bias current + Full 3 1/2-Digit Display + Differential reference for ratiometric ohms + Gannunciators — Data-hold, Peak-hold, KHz, MHz, + On-chip voltage reference — 20 ppM/*C drift Low-bat, Continuance + Low linearity error guaranteed less than 1 count + 1 annunciator drive pin for unit display + High Impedance CMOS differential inputs —10'°a + 3 decimal point drivers with 3 independent " Applications: digital panel meters, digital contol pin multi meters, thermometers, capacitance meters, + Displays "OL" for input overrange BH meters, photometers etc. General Description The UM7108 is a one chip 3 1/2-Digit Digital Multi- ‘or in preventing abnormal inputs which may confuse meter which combines an integrated A/D converter the measurements. » Peak-hold, data-hold, short circuit beeper and low battery detector in a 40-pin DIP. The UM7108F 48-pin The frequency counter is auto ranging from 2 KHz to QFP includes a frequency counter, and serial data 20 MHz over a five decade range with KHz and MHz output. annunciators, which are useful in measuring normal In UM7108, an autozero cycle guarantees a zero frequencies. reading with a 0 Volt input. CMOS structure reduces Short circuit beeper will sound whenever the readout analog input bias current to only 1 pA and low power is less than 30 after enabling the short circuit consumption. Rollover error is less than 1 count. beeper. This feature is useful in detecting short Differential reference inputs permit —_ratiometric circuits without watching the LCD. measurements for resistor or bridge transducer The UM7108 provides 3 independent decimal point applications. driving pins for the manufacturer to determine which decimal point is displayed. The 3 decimal point A 'PEAK-HOLD’ input allows the UM7108 to hold the drivers are built-in in UM7108. The UM7108 also highest A/D readout. This feature is useful in provides one annunciator pin for manufacturer to measuring the starting current of motors, maximum easily display the unit on LCD. With the above temperatures and similar applications. However, the features, the total system cost of a 3 1/2-digit "DATA-HOLD’ input allows the UM7108 to hold the digital multimeter will be reduced by using UM7108. current A/D readout or frequency readout. This The UM7108 operates from a 9 volt battery, same as feature is useful in measuring unstable measurements UM7106, with typical power of 10 mW; and the packages include 40-pin DIP and 48-pin quad fiat pack. 6-27
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@ume UM7108 Series Absolute Maximum Ratings* *Comments Reference Input Voltage (either input). ..V+ to V- These ate stress ratings only. Functional operation of Unless otherwise noted, specifications apply to UM7108 at Vsupply (V+ to V-) = 9.0V, TA = 25°C, Felock = 40 KHz Zero input Digital | Vin = 0.0v Reading | - | 00.0 2000.0 | +0000 | Reading | Full Scale = 200.0mV Ratiometric Reading 999/ Digital | Vin = Veet 999 1000 1000 Reading | Vref = 100.0mV Linearity (Max. Deviation From Best +1 | Counts | Full Scale 200.0 mv Straight Line Fit) 0r 2,000V Vin = ov rt Pe fe | Full Scale 200.0mV Leakage Current input [we | po | «| Vin = ov , Vin = ov Zero Reading |---| os | ee | os Tas 70°6 Vin = 199.0mV Seale FecorTemp Coot Ll dt [ome peer | ‘Analog Common Voltage 25Ka Between (With Respectto Positive | Vanacom 30 v Common and Positive Supply) Supply Temp Coett of Analog ec. | 25K 2 Betwoen Common Pom, Common and Pos Supply Common-mode Rejection vv | Yor =s1V. Vin = ov Ratio i. Full-scale = 200.0mV 6-29
seen |e fe |e | (Doesn't include LCD and mA | Is(Vin = 0.0V) Com. Current) Fe rd mee [ef fe | Vere - a input level - ‘ViKFREQ) Input terminal: BZINM, BZINS, PH-IP, DH-IP, RESET, FREQ/ VOLT, CLK, DP1, OP2, DP3 Output terminal: EOC, SOO, INT, DEINT AC Characteristics PH.IP and DH-IP Keys 7 =[= T=] t 6-30
@Mume UM7108 Series AC Characteristics (continued) me [ol = == = ee a A mvc [me [| ae) | me | FREQ-IN Waveform " Thr Rising Time FREQ.IN Waveform TH Falling Time FREQ-IN Waveform Tow 7 Pulse Width i fesowrm ef mf Pd fiom fe [= | = | fermen me fe | ee Timing Waveforms 1, Frequency Counter Input Waveform Hi 2. Serial Data Output uw nee Ee Tae ee 6-31
=: Ra - @Oume UM7108 Series Timing Waveforms (continued) 3. INT, DEINT Output Waveform ee eee pune, tene tame Base pease Page PinDescriptions | rm Designation Pos | ve Posttve Supply vohage 7 Integrate phase indicator. This pin is logic LOW normally but goes HIGH when integrate phase begins; goes LOW when integrate phase ends _ Frequency counter/voltage measurement FREQ /VOLT select pin. Connecting to V+ will enable the frequency counter, connecting to TEST1 or open will execute voltage measurement. This pin is internally pulled-down to TEST1 CONT/- /MHz LCD segment drive for continuity, polarity and mega-Hz B4/C4/DP3 LCD segment drive for “b* and “c* segments of MSD and decimal point 3 KH2/F3/E3 LCD segment drive for kilo-Hz and * f * and *e* segments of 3rd LSD A3/G3/03 LCD segment drive for ‘a , ‘g* and *d segments of 3d LSD B3/C3/DP2 LCD segment drive for "b* and “c segments ‘of 3rd LSD and decimal point 2
7 D-H/F2/E2 LCD segment drive for data-hold, * f * and
"e" segments of 2nd LSD 6-32
@ume UM7108 Series Pin Descriptions (continued) A2/G2/D2 LCD segment drive for ‘a’, "g” and “d" segments of 2nd LSD v7 B2/C2/DP1 LCD segment drive for “b* and *c* segments ‘of 2nd LSD and decimal point 1 P-H/F1/E1 LCD segment drive for peak-hold and * f* and "e" segments of LSD
19 A1/G1/01 LCD segment drive for ‘a’, ‘g" and ‘d*
81/C1/BAT LCD segment drive for *b* and “c* segments ‘of LSD and low battery pe | 2 | oe ‘ocermonce ts DEINT De-integrate phase indicator. This pin is logic LOW normally but goes HIGH when de-integrate phase begins; goes LOW when de-integrate phase ends
17 ANNUNC Square wave output at the LCD backplane
frequency, synchronized to COM1. Connecting an LCD segment to ANNUNC pin turns it on; connecting to backplane turns it off 27 opt 1st decimal point select input for voltage measurement. This pin is internally pulled-downto TEST1 2nd decimal point select input for voltage measurement. This pin is internally pulled down to TEST1 6-33
PinDescriptions (continued) UMT108/8 UMTI08F coe | ee | 3rd decimal point select input for voltage measurement. This pin is internally pulled downto TESTI 24 RESET Reset input pin. Connecting to V+ will cancel both Peak-hold and Data-hold func- tions. This pin is internally pulled-down toTESTt Peak-hold input pin. Connecting to V+ will make the converter only update the readout if a new conversion value is greater than the preceding value. This pin is a toggle type input pin and is in- temally pulled-down to TEST1 Data-hold input pin. Connecting to V+ will make the converter hold the current readout and the converter operation. This pin is a toggle type input pin and is internally pulled-down to TEST1 BZOUT Piezo buzzer output. 2.5 KHz audio frequ- ency output can drive a piezo buzzer 1. Whenever the readout is less than 30 and BZINS is connected to V+ , BZOUT will generate a 2.8 KHz sound output. 2. Whenever the BZINM is connected to V+ it will force the BZOUT to generate a 2.5KHz sound audio output continuously 25 35 BZINS Buzzer control slave input. This pin is (UM7108A) internally pulled-down to TEST1. See BZOUT 36 cuK | External clock input pin for serial data accessing, normally this clock signal is generated by external microcontroller 25 38 BZINM Buzzer control master pin, This pin is (UM71088) internally pulled-down to TEST1. See BZOUT 6-34
f fA . Ounce UM7108 Series PinDescriptions (continued) [ome Designation UM71084/B uM7108F 0c End of conversion indicator. When each conversion ends, this pin will generate a positive pulse, Normally, use this signal to interrupt microcontroller ve Negative power supply voltage. Connected to negative terminal of 9V battery capacitor Integration resistor connection. Use a 42 VBUFF 47KA resistor for 200.0 mV fullscale and a470K 9 resistor for 2.000 V fullscale Autozero capacitor connection. Use a Az 0.47uF capacitor for 200.0 mV full-scale, and a 0.047uF capacitor tor 2,000 V full scale vw The analog low input signal is connected 7 to this pin The analog high input signal is connected Vins ‘ to this pin This pin is primarily used to set the analog ground reference for battery opera- NA- ANA-COM tion or in systems where the input signal is referenced to the power supply A 0.1uF capacitor is used in most appli- Crees cations. If a large common-mode voltage exists and a 200 mV scale is used, a 1.0uF capacitor is recommended which will hold the rollover error to less than 0.5 count | = | : ver [some 6-35
= = , @ume UM7108 Series Pin Descriptions (continued) This analog input is required to generate Vrers a fullscale output (1,989 counts). Place 100 mV between pin 35 and pin 36 for 200.0 mV full-scale. Place 1.00 V between pin 36 and pin 36 for 2.000 V full-scale Lamp test, When connected to V+ all the segments will be tumed on and readout
37 TEST1(DGND) should be 1888, It may also be used as an
internal logical ground, nominally 4.7 V below the V+ Functional Description ‘An input signal to be measured is applied to the to the average magnitude of the input signal over the integrating capacitance for a fixed time as integration period. determined by a clock counter. The accumulated charge will be proportional to the input signal, for a fixed A. Analog Section clock rate and constant current. The resutting integral is returned to zero by integrating a Fig. 1 shows the block diagram of the Analog reference signal of polarity opposite that of the Section for UM7108. input signal. The length of time required for the Each measurement cycle is divided into three parts. integrator to retum to zero, as measured with the These are : (1) Auto-zero [AZ] clock counter to display at output, is proportional (2) Signal integration [INT] (3) Deintegration [DE] 6-36
Figure 1. UM7108 Analog Section
- Auto Zero Phase 3. De-tntegrate Phase
fer, integrator and comparator. the digital reading displayed is 1000 ( 7 ).
- Signal Integrate Phase 4. Component Value Selection:
enough to reduce the leakage current on the PC board. full scale a 470Ka Rint is needed.
Integrating Capacitor ( Cit ) Oscillator Components ( Rosc, Cosc ) Cint should be chosen to give the maximum voltage While using RC oscillator, the Rosc (between pin 39 swing without causing the saturation of integrator and pin 40) should be 100Ka and Cosc is selected ‘output swing. According to the superior temperature from the following equation: coefficient — 20ppm/*C of analog common, analog 04s common will be normally used as the differential Fosc = pose eoss— (Rose in Ma, Cose in uF) voltage reference. It is fine for a nominal +2.000V full scale integrator output swing. For 2 3/2 teadings/ second (40 KHz clock), a 0.22uF capacitor Reference Voltage Selection is suggested. If a different oscillator frequency is used, Cint must be changed in inverse proportion to The analog input required to generate full scale maintain the nominal +2.000V full scale integrator output (2000 counts) is Vin = 2 VreF, thus: output swing. ‘An additional requirement of Rint is that Cint must have low dielectric absorption to minimize rollover error. Polypropylene capacitors give undetectable errors at reasonable cost. The reference voltage used to ramp the integrator However, in many applications where the A/D con- ‘output voltage back to zero during the reference verter is connected to a transducer, there may exist integrate cycle is stored on Caer A O.1uF capacitor a nonunity scale factor between the input voltage gives good performance when Vin. is tied to analog and the digital readout. For instance, a pressure common. If a large analog common voltage exists transducer output is 400mV for 2000 |b/in, rather VreF- unequal analog common) and a 200.0mV scale is than dividing the input vohage by two, the VrEF used, a larger value is required to prevent rollover should be set to 200,0mV, then permit the transducer error. input to be used directly. Generally 1.02F will hold the rollover error to 0S The differential voltage reference can also be used count. In this case a mylar type dielectric capacitor when a digital zero readout is required when Vin is adequate. is mot zero. This case is common in temperature measuring instrumentation. A compensating offset Auto-Zero Capacitor ( Caz ) voltage can be applied between analog common and Vin and the transducer output is connected between VIN The Caz value has some influence on system noise, and analog common. The following combination is recommended: B. Digital Section nerated from a 62 Volt Zener diode and a large oaner pchamnel olewa This soppy made. if te absorb the relatively large capacitive current when 0.087HF the back plane (BP) is switched. The BP frequency is , the clock frequency divided by 240. The segments are It is better to use a mylar type capacitor to imple- driven at the same frequency and amplitude and are ment Caz in phase with BP when OFF, but out of phase when ON. In all cases, negligible DC voltage exists across the segments. 6-38
- System Timing To achieve maximum rejection of 50/60 Hz pick up, the signal integrate cycle should be a multiple of 50/60 The oscillator frequency is divided by four before Hz, the following table describes the selection of it clocks the decade counters. it is then further coscilator frequencies for 50 or 60 Hz respectively. divided to form the three convert-cycle phase. These are signal integrate (1000 counts), reference de- Oscillator Frequencies integrate (0 to 2000 counts) and auto-zero (1000 to 3000 counts). For signals less than full scale, “40 Kz, 50 KH2, 68 egukHe, 100 KHz... auto-zero gets the unused portion of reference de- 7 7 7 - integrate. This makes complete measure cycles of 4000 "33 4 73 KHz, 40 KHz, 48 KHz, 60 KHz, * As a matter of fact, the total measurement cycle is 80 KHz, 100 KHz, 4001 counts for measured values less than 2000 counts. ‘The measurement cycle becomes 4000 counts for over- Note that 40 KHz (2.5 readings/second) will reject flowmeasurement, both 50 and 60 Hz line noise. 2. Clock Circuit 3. LCDDisplay UM7108A/B/F can use tha following three clocking The UM7108A/B/F drives a triplex LCD with three nethods: PI commons. This LCD includes 31/2-digits, three 1. An external oscillator connected to OSC1 PIN. decimal point polarity sign and annunciators for 2. Acrystal between OSC2 PIN and OSC! PIN. peakhold, data-hold, continuity, frequency and low 3. An RC oscillator using all three pins (OSC3, battery. The following figure indicates the OSC2 & OSC1). assignments of the display segments to the common and segment drive lines. UM71084/B UM7108F Pin No. Pin No. com coms | oe 9 cont wie | 3 “ Ss poe we ie re | os %3 ee ec | os oe ope ‘s on | oe |e a ee Poo te ee is Poo a a | | Sn The LCD common drive frequency is obtained by dividing the oscillator frequency (Felock) by 240. Flea = ——Felock 240 6-39
@ume UM7108 Series The LCD waveform is as follows : see VE sees VLCDI com1 sees VLCD2 ses DGND sees VE tees VLCDI come sees vLCD2 tess DGND sees VE sees VLCDI COM3. sere VLCD2 — sees DGND see Ve sere VLCDI ANNUNC sees VLCD2 sees DGND see VE Altsegments re viet OFF sees VLCD2 sess DGND ‘Segments of COM1 see V4 are ON, the others sees VLCDI areOFF vers VLCD2 see DGND ‘Segments of COM3 see VE are OFF, the sees VLCDI ‘others are ON sees vLoD2 tess DGND see VE All segments are ON sere VLCDI sees VLOD2 sere DGND The annunciator output is a square wave running at ~ DGND). Connecting an annunciator of the LCD to the the LCD backplane frequency (ex. 167 Hz for Flock ANNUNC pin turns the annunciator on; connecting it to . = 40 KHz), The pk-pk amplitude is equal to (V+ its common tums it off 6-40
UM7108A/B/F LCD COMMON LAYOUT Pm (eq ez.) a re ER Ro) am 8 ALY ALY ALL cS x PQ, en rE2a oY ARYA AAG Ea ee ee ae CA UM7108A/8/F LCD SEGMENT LAYOUT Pm ar eu ec (Al CD SS Gp = § 01 00 O00 <p ED > =D = 6 16.8 6.0 16 y [KHz] | Vay L@) &)| Yap Esl 6-41
UMC also provides the following LCD sample for UM7108A/B/F to achieve full features wax 60.040.2 22.54m12=30.48 14.76 a Fee fa ee es ee Ei ei DF SS D-H ME P-+ BR BAT oe Ee : ricEL a He BA) <> 6 4 alu F alls afic> re Soy Koy Le a3 als ra] 22 MKTICEL “| ¢ Ch oss || 2) 7 3) ALM NS GV SV SY amas “| 3 *) aK - = ue | a |- — et 4-5 ! TTT TTT es Ee | V.A. 56.0 MIN Ul em used | feos an Viewing Direction 20 Notes: 1. Display Type Twisted Nematic Display el 2. Viewing Direction 6 O'Clock <> By 3. Polarizer Mode Reflective /Positive jal ° 4. DriveMethod 1/3 Duty 1/3 Bias 5. Operating Voltage 5.0V a 6. Operating Temp 10°C ~ +60°C z3 18 7. Storage Temp -20°C ~ +70°C 8. Connector Zebra Cd de pepe l= [= [= fe] = [>| feed el [ef PPE Ee EPP 6-42
- ra . @Oume UM7108 Series 4, Frequency Counter In addition to serving as an analog-to-digital con- second. The frequency counter accuracy is determined verter, the UM7108F also provides 2 KHz to 20 MHz by the oscillator accuracy. For accurate frequency five decade auto-range frequency counter. In the measurement, a 40 KHz quartz crystal oscillator is counter mode, pulses at the FREQ-IN will be counted recommended. and displayed. The decimal points are automatically set in frequency The UM7108F frequency counter derives its time base mode, the following table indicates the auto-range from the clock oscillator and gets one readout per decimal points and annunciator selection versus frequency counter input (Fin). FREQIN | _cimaipoit | 2.0 KHz to 19.99 KHz DP2 KHz 20 KHz to 199.9 KHz DPI KHz
200 KH to 1998 KH | none | Kez
Auto-Range Frequency Counter Range Selection Algorithm FREG-IN FRE. > 4.99 Hoe “ USE 2.0 Mux TO 6-43
- Serial Data Output In addition to the LCD output, the UM7108F provides The EOC pin will rise HIGH at the end of conversion serial data output for use in connection with micro- and the content of serial output data buffer will controllers. During this operation, UM7108F uses update simultaneously. CLK, SDO and EOC pins. The following is the timing The waveform of EOC pin will go LOW as soon as CLK description of this connection. pin receives clock signal. Otherwise the EOC pin will stay HIGH and then go LOW in 10 ms. Serial Data Output Format Decimal LSB sels sB|LsB usp] M Polarity Point Bits s isp) —— 2nd LSD 3rd LSD ° 1. Voltage Mode: : z “y —> Plus D14 DIS Decimal Point DO (Polar —{ og. > Minus 014.8 D15 for o 0 None “y —> MSD =1 Decimal Point Bits E o 4 opt D1 (MSD)——{ 1 _S sp -0 1 0 Dp2 D2 to DS for 3rd LSD ( From 0000 TO 1001 ) 4 pps D6 to D9 for 2nd LSD ( From 0000 TO 1001 ) D10 to D13 for LSD ( From 0000 TO 1001 ) 2. Frequency Mode: ‘0 —> KHz The rest are same as voltage mode. Special Data Format ee CCCI
0 PREP EET
Random and don't aremommas fae Pope tet [ofa = men ore PEE EEE 6-44
@umec UM7108 Series Application Circuits (for reference only) (1) For UM71084/8 LCD DISPLAY ons[22__o~ 2) veurr UM7108A/B mute [aos faz ‘eziNs| oo femlsist2) Bea} (5555) ii . BZINS— UM7108A Note: Pin 25 [ BziNM— UM71088 | —— _ ee a 6-45
@ume UM7108 Series Application Circuits (continued) (2) For UM7108F rem mre Sg [| Linen LCD DISPLAY eS CA aes es 10 2 a tur crere or2 28.06. eur UM7108F Bi < Sez sz0ut -° von CBEie ee a] osce sch _¥—_vaer= veers v= cx soo eve |t-oKohm 24Kons 4/78BIT fF rie Nominal Full-Scale Voltage | 2o0ov [| a000mv | ee