UM603 UTC | Alldatasheet

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UTC UM603 LINEAR INTEGRATED CIRCUIT UTC UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R121-003,A DUAL OPERATIONAL AMPLIFIER AND CURRENT CONTROLLER

DESCRIPTION

The UM603 is a monolithic IC that includes one independent op-amp and another op-amp for witch the non inverting input is wired to a 2.5V fixed voltage reference . This device is offering space and cost saving in many applications like power supply mana- gement or data acquisition systems

FEATURES

O P E R A T I O N A L A M P L I F I E R *Low input offset voltage: 0.5mV typ. *Low supply current: 350uA/op.(@ Vcc= 5 V) *Medium bandwidth(unity gain): 0.9MHz *Large output voltage swing: 0 V to (Vcc-1.5 V) *Input common mode voltage range includes ground *Wide power supply range: 3V to 32V ±1.5 TO ±16V VOLTAGE REFERENCE *Fixed output voltage reference 2.5V *Sink current capability : 1 to 100mA *Typical output impedance : 0.2Ω SOP-8 PIN CONFIGURATION Output1 Inverting Input1 Non-inverting Input1 Vcc- Non-inverting Input2 Inverting Input2 Output2 Vcc+1 OP1 OP2 VRef ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL VALUE UNIT Supply Voltage Vcc 36 V Differential Input Voltage Vid 36 V Input Voltage Vin -0.3 to +36 V Operating Free-air Temperature Range Vi -55 to +125 °C Maximum Junction Temperature Tj 150 °C Thermal Resistance Junction to Ambient(SO package) Rthja 175 °C/W

UTC UM603 LINEAR INTEGRATED CIRCUIT UTC UNISONIC TECHNOLOGIES CO., LTD. 2 QW-R121-003,A

ELECTRICAL CHARACTERISTICS

PARAMETER SYMBOL TEST CONDITIONS MIN TYP. MAX UNIT VCC+=5V,no load, Tmin.<Tamb<Tmax. 0.7 1.2 Total Supply Current,excluding Current in the Voltage Reference Icc VCC+=30V,no load, Tmin,<Tamb<Tmax 2 mA OPERATOR2(independent op-amp) Vcc+=+5V,Vcc=Ground,Vo=1.4V,Tamb=25°C(unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS MIN TYP. MAX UNIT Input Offset Voltage Vio Vicm=0V Tamb=25°C Tmin.≤Tamb≤Tmax. 5 mV Input Offset Voltage Drift DVio 7 μV/°C Input Offset Current Iio Tmin.≤Tamb≤Tmax. 2 75 150 nA Input Bias Current Iib Tmin.≤Tamb≤Tmax. 20 150 200 nA Large Signal Voltage Gain Avd Vcc=15V,R L=2k,Vo=1.4V~11.4V Tmin,≤Tamb≤Tmax.

100 V/mV

Supply Voltage Rejection Ratio SVR Vicm=0V, Vcc=5V ~30V 65 100 dB Vcc=+30V-see note1) 0 (Vcc+)-1.5 Input Common Mode Voltage Range Vicm Tmin.≤Tamb≤Tmax. 0 (Vcc+)-2 V Common Mode Rejction Ratio CMR Tmin.≤Tamb≤Tmax. 85 dB Output Current Source Isource Vcc=+15V,Vo=2V,Vjd=+1V 20 40 mA Short Circuit to Ground Io Vcc=+15V 40 60 mA Output Current Sink Isink Vid=-1V, Vcc=+15V,Vo=2V Vcc=+15V,Vo=0.2V V High Level Output Voltage VOH Vcc +=30V Tamb=25℃,RL=10k Tmin.≤Tamb≤Tmax. Tamb=25℃,RL=10k Tmin.≤Tamb≤Tmax. V Low Level Output Voltage VOL R L=10k Tmin.≤Tamb≤Tmax. 5 20 mV Slew Rate at Unity Gain SR Vi=0.5 ~ 3V,Vcc=15V RL=2k,CL=100pF,unity gain 0.2 0.4 V/μs Gain Bandwidth Product GBP Vcc=30V,R L=2K,CL=100pF F=100kHz,Vin=10mV 0.5 0.9 MHz Total Harmonic Distortion THD f=1kHz Av=20dB,RL=2k,Vcc=30V CL=100pF,Vo=2Vpp 0.02 Equivalent Input Noise Voltage en f=1kHz,Rs=100Ω,Vcc=30V 50 nV/√Hz 1.The input common-mode votage of either input signal voltage should not be allowed to go negative by more than OPERATOR1 (op-amp with ono-inverting input connected to the internal Vref)

UTC UM603 LINEAR INTEGRATED CIRCUIT UTC UNISONIC TECHNOLOGIES CO., LTD. 3 QW-R121-003,A Vcc+=+5V,Vcc=Ground,Tamb=1.4V,Tamb=25°C(unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS MIN TYP. MAX UNIT Input Offset Voltage Vio Vicm=0V Tamb=25°C Tmin.≤Tamb≤Tmax. 5 mV Input Offset Voltage Drift DVio 7 μV/°C Input Bias Current Iib negative input 20 nA Large Signal Voltage Gain Avd Vicm=0V Vcc=15V,RL=2k 100 V/mV Supply Voltage Rejection Ratio SVR Vicm=0V, Vcc=5V ~30V 65 100 dB Output Current Source Isource Vcc=+15V,Vo=2V,Vjd=+1V 20 40 mA Short Circuit to Ground Io Vcc=+15V 40 60 mA Output Current Sink Isink Vid=-1V, Vcc=+15V,Vo=2V Vcc=+15V,Vo=0.2V V High Level Output Voltage VOH Vcc +=30V Tamb=25℃,RL=10k Tmin.≤Tamb≤Tmax. Tamb=25℃,RL=10k Tmin.≤Tamb≤Tmax. V Low Level Output Voltage VOL R L=10k Tmin.≤Tamb≤Tmax. 5 20 mV Slew Rate at Unity Gain SR Vi=0.5 ~ 3V,Vcc=15V RL=2k,CL=100pF,unity gain 0.2 0.4 V/μs Gain Bandwidth Product GBP Vcc=30V,R L=2K,CL=100pF F=100kHz,Vin=10mV 0.5 0.9 MHz Total Harmonic Distortion THD f=1kHz Av=20dB,RL=2k,Vcc=30V CL=100pF,Vo=2Vpp 0.02 VOLTAGE REFERENCE: PARAMETER SYMBOL Value UNIT Cathode Current Ik 1 ~ 100 mA PARAMETER SYMBOL TEST CONDITIONS MIN TYP. MAX UNIT Input Offset Voltage Vref ±0.7%, Tamb=25°C Tmin.≤Tamb≤Tmax. 2.482 2.465 2.5 2.518 2.535 V Reference Input Voltage Deviation Over Temperature Range △Vref V KA=Vref;Ik=10mA Tmin.≤Tamb≤Tmax. 30 mV Minimum Cathode Current for Regualtion Imin V KA=Vref 0.5 1 mA Dynamic Impedance-note1) ∣ZKA∣ VKA=Vref, △Ik=1~100mA,f<1kHz 0.2 0.5 Ω 1.The dynamic impedance is defined as「ZKA」=△kA/△Ik

UTC UM603 LINEAR INTEGRATED CIRCUIT UTC UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R121-003,A OPERATIONAL AMPLIFIERS Unit Frequency=F(I) 1000 200 600 800 -0.01 SOURCE<= I(A) =>Sink Unit Freq Thousands -0.005 0 0.005 0.0150.01 400 GBP=F(I) 200 600 800 -0.01 SOURCE<= I(A) =>Sink GBP Thousands -0.005 0 0.005 0.0150.01 400 Vcc=+/-15V,RL=2K,CL=100PF Vcc=+/-15V,RL=2K,CL=100PF 700 500 100 300 phase and Gain Margin=F(I) -10 -12 -14 Vcc=+/-15V,RL=2K,CL=100PF Phase Margin(deg) Gain Margin(dB) SOURCE<= I(A) =>Sink Total Harmonic Distorsion THD=F(freq) 0.014 0.005 0.006 0.007 0.008 0.009 0.01 0.011 0.012 0.013 10 100 1000 10000 Frequency (Hz) THD(%) Total Harmonic Distorsion THD=F(freq) 0.01 0.1 1 10 Frequency (Hz) 100 Noise (nV/SQR(Hz)) Vio Distribution-Operator 1 Vcc+=5V,Vcc-=0V -3 -2.5 -1 0.5 Vio(mV) Distribution(%)

UTC UM603 LINEAR INTEGRATED CIRCUIT UTC UNISONIC TECHNOLOGIES CO., LTD. 5 QW-R121-003,A Vio Distribution-Operator 2 Vcc+=5V,Vcc-=0V Vio(mV) Distribution(%) Vref =F(IK) 0.5 1.5 2.5 0.0002 0.002 0.02 Cathode Current Ik(Amps) 0.2 Vref(V) Vref Stability=f(I,C) 0.01 0.02 0.03 0.04 0.05 0.06 1E-10 1E-9 1E-8 1E-7 Capacitor (F) 1E-6 Current (Amps) 1E-5 Unstable Stable