UM23C1028-A UMC | Alldatasheet

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Technical content

Features

™ 16,384 x 8-bit organization and chip select CS/CS_ ® Single +5V power supply © 3.state outputs for wired-OR expansion © Access time: 150 ns (max.) © Fully static operation = Current: Operating 30 mA (max.) = TTL-compatible inputs and outputs Standby: 30 4A (max.) ™ Available in 28 pin DIP packages (UM23C128-A/-8) = Mask Programmed for chip enable (powerdown) CE/CE or in chip form (UM23C128H-A/-B) General Description The UM23C128-A/-B is a high performance Read Only When CE/CE goes LOW/HIGH, the device will auto- Memory organized 16,384 words by 8 bits with an matically power down and remain in a low power standby access time of 150 ns. It is designed to be compatible with mode as long as CE/CE remains LOW/HIGH. This unique ali microprocessors and similar applications where high- feature provides system level power savings of as much Performance large-bit storage and simple interfacing are as 99%. The functions of Pin 22 and Pin 27 are CS,/CS, important design considerations. and CS2/CS/NC, respectively. For UM23C128-B, Pin 20 may also be programed as CS/CS (active HIGH or LOW) The UM23C128-A offers automatic powerdown with in order to eliminate bus contention in multiple bus micro powerdown controlied by the Chip Enable CE/CE input. _processor systems. Pin Configurations Pad Configuration nef 7B Vee ner 2} Yee _ aut arFlesy@Syne Aw Che 27f cs:KSync Aa Ae Aas NO Veg VMTN, 4, arcs 2 A ara 20 Avs Asha afaAs aeCfa wpe .(GFTOOO BFA ae ala AsChs 2a] As ass 2 As An ace § pan ace § aban “| a ap @ zbews, Asc 8 xpos, 1G) umaaciz8H a] cos, aCe 8 afla aCe § nplar A Te a soto Po, ag) | cect or esies oo 18 oo 18% a0 | 09 age vBos ie 7B os SEE Veo oee oy re] O4 og 10F 7 O« 9 0; ©; GND GND 0; 0, Os Og O7 ono C14 1s oy ono (44 sos 1-28

© UM23C128-A/-B Block Diagram ROW ROM ARRAY = DECODER 131,072 DRIVER am Ao —A13 ADDRESS INPUTS Pel covumn ae COLUMN SELECT [*] DECODER Ctl river CIRCUITRY >— Po _ POWER > Or CS2/CS2/NC o DOWN >— 02 _ AND >— 03 CS/CS or © CHIP So cece SELECT 5 }. — RY 5 c3,/e5, © CIRCUIT Do. > Or 1-29

Pin Description Recommended DC Operating Conditions 2 1 20.21, [ Symbot [ Parameser | Min. [Typ. [Mex [Unie | Supply [Tete | OO, | Dawu 4] Yee | Vote so | es |v a iD y CE/CE Chip Enable Input 20 - F Hen 22 Veo * Voltage 03 a _ Input

22 CS\\/CS: | Chip Select input Vi, | Low 05 v

. = Chip Select or N

27 CS2/€82/NC | No Connection

Absolute Max imum Ratings* *Comments Supply Voltage to Ground Potential 0.5 10 7,.0V These are stress ratings only. Functional operation of Output Voltage : ©. 050 Veg +0.5V this device at these or any other conditions above those Input Vol 06 toV. +osv indicated in the operational sections of this specification put Voltage . 0.8 to Vec is not implied and exposure to absolute maximum rating Power Dissipation . . . + 400 mW conditions for extended periods may affect device re- liabitity ee CE = Veg — 0.2V I Standby Supply Current HA beg . Set cE=02V Output Short Circuit Capacitance: [Seber [Paar Tin [Mc [Unk [Tentonaiions No] 1 a A 3 [65 oon Capactanee [ote 1-30

© UM23C128-A/-B AC Characteristics (T, = 0°C to #70°C, Voc = 5.0V + 10%, GND = OV) teve Cycle Time 150 ns Q cores Access Time | fe is || 2 Chie Enable Access Time | fe fe ft Chie Select Access Tire ee Output Hold After Address Change | | “ | | Output Low 2 Daley |» | " fos | Curent High 2 Oetey ee i= | = | Power Up Time f= {| | Notes: 1, Measured with device selected and output unloaded. 2. For a duration not to exceed 30 seconds, 3, This parameter is periodically sampled and is not 100% tested. All pins except for pins under test are tied to ground 4, Output LOW impedance delay (t, 2) is measured from the later of CE/CE or CS/CS going active. 5, Output HIGH impedance delay (tz) is measured from the earlier of CE/CE or CS/CS going inactive : Timing Waveforms PROPAGATION DELAY FROM ADDRESS (CE/CE = ACTIVE, CS/CS = ACTIVE) ADDRESS INPUTS a tan ton —* LOPNN UNHCR ON NN ORR DATAOUT BERR SRNR) oe 1-31

© UM23C128-A/-B PROPAGATION DELAY FROM CHIP ENABLE, OR CHIP SELECT (ADDRESS VALID) taceE rs er faz. cats ESS oaTaouT ts i Veg CURRENT Iss Po tp AC Test Conditions Sv 2508 pout Input Rise And Fall Times _ 7752 100pF* Timing Measurement Vip = 0.8V Vy =2.2V Reference Level Vo. = 0.8V Voy = 2.0V| = *INCLUDING SCOPE AND JIG Figure 1 Output Load Circuit Functions ‘Truth Table (UM23C128-A) Truth Table (UM23C128-8) [ee [esi [es; [o-o, [Moe | [es [esi ]es [ op-o, [Moe | Pip pe [ me | rewoom | x Ps [me [meron | Pep [ aT oon | [aT ATs [onan nea] LALA Povmoon[ er Read Mode 1, Data can be read in case of setting address, CS; = A, 3. “A” means “Active” CS = A, CE = A (UM23C128.A) and CS = A, CS; = "1" means “Inactive’” A, CS2 = A(UM23C 128-8). ”X"" means “Active” or “Inactive” 2. CS2/CS2/NC,CS,/CS; ,CE/CE are mask programmable 4, If Pin 27 is set to mo-connection, the Input level which can be selected for either active level. When will be internally fixed at active level. ordering, please specity —A or —B and the active level CSICSINC, CE/CEICSICS, : 1-32

43) UM23C128-A/-B

Ordering Information

Access Time ‘Operating Current ‘Standby Current Power (ns) Max. (mA) Max. (mA) Down 150 0.03 = 150 0.03 & 1-33