UM11379

UM11379 NXP | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 56

Technical content

Datasheet sections

• 1 Introduction
• 2 Overview of UJA116xA-EVB boards
• 2.1 Ground connections
• 2.2 Power supply connections
• 2.2.1 Battery connections (all UJA116xA-EVB
• 2.2.2 VIO/VBUF connections (UJA1161A/62A-
• 2.2.3 V1/RST connections
• 2.2.4 VIO/V1 connections (UJA1166A-EVB)
• 2.2.5 VEXT connection (UJA1168AXF-EVB)
• 2.3 CAN communication circuitry
• 2.4 Wake-up options
• 2.5 MCU interface
• 2.5.1 CAN TXD/RXD and SPI connections
• 2.5.2 CAN TXD/RXD and mode control
• 3 Connecting the UJA116xA to a CAN
• 3.1 Connecting boards without an SPI
• 3.2 Connecting boards with an SPI
• 4 Schematic diagrams
• 5 Bills of Materials
• 6 FlexGUI: interactive register control via
• 6.1 FlexGUI software package overview
• 6.2 Preparations for using the S32K144EVB as
• 6.2.1 FlexGUI firmware installation on
• 6.2.2 HW setup for FlexGUI operation
• 6.3 Installing the FlexGUI on a PC
• 6.4 Using the FlexGUI
• 6.4.1 Starting the FlexGUI application
• 6.4.2 Establishing a connection between the
• 6.4.3 SPI speed selection
• 6.4.4 Interactive control of the RGB LED on the
• 6.4.5 Register map
• 6.4.6 Working with the script editor
• 6.4.7 Logging read and write operations
• 6.4.8 Restrictions on using SBC in Sleep mode
• 7 References
• 8 Appendix: UJA116xA evaluation board
• 9 Revision history
• 10 Legal information

UJA116xA evaluation boards Rev. 1 — 23 April 2021 User manual NXP provides the enclosed product(s) under the following conditions: This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality. The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services. Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the date of delivery and will be replaced by a new kit. NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typical, must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the NXP product could create a situation where personal injury or death may occur. Should the Buyer purchase or use NXP products for any such unintended or unauthorized application, the Buyer shall indemnify and hold NXP and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges NXP was negligent regarding the design or manufacture of the part. Important Notice

1 Introduction

of UJA116xA product features in a variety of microcontroller IO interface environments. software development tools and drivers. Table 1. Not just the assembled product, but the entire UJA116xA product family can be UJA1168AF-EVB and UJA1168AXF-EVB boards by keeping CFDC = 0. Table 1. UJA116xA evaluation board and product overview

NXP Semiconductors UM11379 UJA116xA evaluation boards

2 Overview of UJA116xA-EVB boards

Top and bottom views of the UJA116xA evaluation boards are illustrated in Figure 1. Board dimensions are 45.1 mm × 58.4 mm. Only components needed to support basic UJA116xA functionality are included. All boards contain circuitry for reverse polarity- protected battery supply, BAT and V1 signal status LEDs, and CAN bus termination. Wake-up circuitry is included when the UJA116xA device has a WAKE pin. The board also provides several header rows (2.54 mm pitch) for connecting MCU interface and application signals. UJA1161A-EVB top (left) and bottom (right) views. UJA1162A-EVB top (left) and bottom (right) views. User manual Rev. 1 — 23 April 2021

NXP Semiconductors UM11379 UJA116xA evaluation boards UJA1163A-EVB top (left) and bottom (right) views. UJA1164A-EVB top (left) and bottom (right) views. UJA1166A-EVB top (left) and bottom (right) views. User manual Rev. 1 — 23 April 2021

UJA1168AF-EVB top (left) and bottom (right) views. UJA1168AXF-EVB top (left) and bottom (right) views. Figure 1. Top and bottom views of evaluation boards

2.1 Ground connections

All ground pins are connected to the ground plane. Table 2. Ground connections

2.2 Power supply connections

2.2.1 Battery connections (all UJA116xA-EVB boards)

Table 3. BAT/VIN connections voltage and remove noise on the battery connection. Green LED D2 lights up once the 12 V power supply has been connected. disconnecting the battery supply from pin VIN. Figure 2. 12 V power supply connection options (relevant for the entire UJA116xA_EVB

2.2.2 VIO/VBUF connections (UJA1161A/62A-EVB)

interface supply voltage. VIO is not needed in Sleep mode. Table 4. VIO/BUF connections The VIO supply can be connected to either J3 or J5. The BUF signal is available on J3. and BUF and to remove noise. Figure 3. VIO/BUF supply connection options (relevant for UJA1161A/62A only)

2.2.3 V1/RST connections (UJA1163A/64A/68AF/68AXF-EVB)

data sheets and application hints (see Section 7). Table 5. V1/RSTN connections C8 is provided to stabilize output voltage on V1 and remove noise. Figure 4. V1 supply and RST connection options (only relevant for

2.2.4 VIO/V1 connections (UJA1166A-EVB)

interface supply voltage. VIO is not needed in Sleep mode. application hints (see Section 7). Table 6. VIO/V1 connections on J3. J3 is located on the top of the evaluation board and J5 is mounted on the bottom. Decoupling capacitor C8 is provided to stabilize output voltage on V1 and remove noise. Red LED D4 lights up once the V1 output is present. Figure 5. V1 and VIO supply connection options (only relevant for UJA1166A-EVB)

2.2.5 VEXT connection (UJA1168AXF-EVB)

capacitor, C9, is connected between VEXT and GND. Table 7. VEXT connection VEXT can be accessed on J3, on the top of the evaluation board. Figure 6. VEXT supply connections (only relevant for UJA1168AXF-EVB)

2.3 CAN communication circuitry

CANH and CANL bus signals are output on connector J1. Table 8. CAN bus line connections bus load specification, typically 60 Ω. Figure 7. CAN bus interface circuitry (relevant for the entire UJA116xA-EVB family)

2.4 Wake-up options (UJA1162A/66A/68AF/68AXF-EVB)

and application hints; see Section 7). Table 9. WAKE/INH connections [1] Not valid for the UJA1168ATK/X and UJA1168ATK/XF; pin 7 is VEXT in these devices (see data sheet: Section 7). register map in the UJA1168A (as described in the UJA1168A data sheet). other devices, but is not necessarily relevant for wake-up. Figure 8. Local wake and INH circuitry

2.5 MCU interface

2.5.1 CAN TXD/RXD and SPI connections (UJA1164A/68AF/68AXF-EVB)

can be found in the data sheets and application hints (see Section 7). Table 10. TXD, RXD and SPI connections Figure 9. MCU interface

2.5.2 CAN TXD/RXD and mode control connections (UJA1161A, UJA1162A,

Table 11. TXD, RXD and mode control connections Figure 10. MCU CAN and mode control interface

NXP Semiconductors UM11379 UJA116xA evaluation boards

3 Connecting the UJA116xA to a CAN network

3.1 Connecting boards without an SPI (UJA1161A/62A/63A/66A-EVB)

The following conditions must be met before powering up the system with a 12 V supply. Common to all boards:

• Connect all boards in the ECU to a common GND
• Connect pin CTS (J3-03, J4-09) to an MCU IO input pin
• Connect pin STBN/SLPN (J3-06, J4-09) to an MCU IO output pin
• Connect TXD/RXD (J3-01/J3-02, J4-18/J4-20) pins to the MCU CAN controller TXD/ RXD pins
• Connect CANH and CANL (J1-01/J1-02) to the CAN bus twisted-pair cables Board specific:
• Connect VIO (J3-09, J5-03) on the UJA1161A-EVB, UJA1162A-EVB and UJA1166A- EVB to the MCU supply unit; VIO shares the MCU IO supply
• Connect RST (J3-09, J5-05) on the UJA1163A-EVB to the MCU CAN controller RSTN pin
• Connect V1 (J3-08, J5-03) on the UJA1163A-EVB to the MCU supply unit
• Connect V1 (J3-08, J5-03) on the UJA1166A-EVB to the application circuit to be supplied from V1
• Connect INH (J3-10) on the UJA1162A-EVB and UJA1166A-EVB to the control/enable pin on the ECU supply unit (optional) Once the above steps have been completed, the ECU/EVB can be powered up using an external battery supply. The UJA116xA starts up in Standby mode and then switches between Standby/Sleep modes and Normal mode depending on the level on pin STBN/ SLPN. An example of how to connect the UJA1163A-EVB between an MCU and the CAN bus is shown in Figure 11. User manual Rev. 1 — 23 April 2021

Figure 11. Connecting the UJA1163A-EVB in an ECU/CAN bus network

3.2 Connecting boards with an SPI (UJA1164A/68AF/68AXF-EVB)

• Connect all boards in the ECU to a common GND
• Connect SPI pins to the MCU SPI master: – SDO (J3-03, J4-09) → MISO – SDI (J3-04, J4-07) → MOSI – SCK (J3-05, J4-11) → SCK – SCSN (J3-06, J4-05) → CS
• Connect TXD/RXD (J3-01/J3-02, J4-18/J4-20, J9-09/J5-05) pins to the MCU CAN controller TXD/RXD pins
• Connect RSTN (J9-09/J5-05) to the MCU CAN controller reset pin
• Connect CANH and CANL (J1-01/J1-02) to the CAN bus twisted-pair cables
• Connect V1(J3-08, J5-03) to the MCU supply unit
• Connect INH (J3-10) on the UJA1168AF-EVB to the control/enable pin on the ECU supply unit (optional)
• Connect VEXT (J3-10) on the UJA1168AXF-EVB to the peripheral loads that need a

5 V supply (optional)

Figure 12. Connecting the UJA1168AF-EVB in an ECU/CAN bus network

4 Schematic diagrams

9 VCC

(1) Component not populated. Figure 13. UJA1168AXF-EVB schematic diagram

(1) Component not populated. Figure 14. UJA1168AF-EVB schematic diagram

14 SLP

(1) Component not populated. Figure 15. UJA1166A-EVB schematic diagram

(1) Component not populated. Figure 16. UJA1164A-EVB schematic diagram

14 STB

(1) Component not populated. Figure 17. UJA1163A-EVB schematic diagram

(1) Component not populated. Figure 18. UJA1162A-EVB schematic diagram (1) Component not populated. Figure 19. UJA1161A-EVB schematic diagram

5 Bills of Materials

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed.

101 SOT23

5001 KEYSTONE ELECTRONICS (preferred)

Table 12. Bill of Materials - UJA1168AXF-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed. Table 13. Bill of Materials - UJA1168AF-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed. Table 14. Bill of Materials - UJA1166A-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed. Table 15. Bill of Materials - UJA1164A-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed. Table 16. Bill of Materials - UJA1163A-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed. Table 17. Bill of Materials - UJA1162A-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

of the customer to validate their application. For critical components, it is vital to use the manufacturer listed. Table 18. Bill of Materials - UJA1161A-EVB [1] NXP used the ACT45B-101-2P from TDK for the latest UJA116xA EMC test report.

6 FlexGUI: interactive register control via USB

• UJA1164A-EVB
• UJA1168AF-EVB
• UJA1168AXF-EVB When the UJA116xA-EVB is plugged onto a suitable microcontroller evaluation board, the microcontroller board can be used as a USB/SPI interface between the UJA116xA-EVB and a PC. After installing the FlexGUI application on a Windows PC (see Section 6.3), the contents of the SBC registers can be viewed and/or changed interactively. FlexGUI for UJA116xA-EVB currently supports the following evaluation board:
• S32K144EVB, Rev. B (Figure 20) See www.nxp.com for more information about this board.

Figure 20. Using FlexGUI with S32K144EVB as USB/SPI interface

6.1 FlexGUI software package overview

• the flexGUI PC installer (see also Section 6.3)
• FlexGUI firmware for all supported microcontroller boards (see also Section 6.2.1)

6.2 Preparations for using the S32K144EVB as a USB interface

6.2.1 FlexGUI firmware installation on S32K144EVB

1. Confirm that the jumpers are in the correct position for firmware programming
2. Connect the board to the PC with a USB cable (Figure 22)

6.2.2 HW setup for FlexGUI operation

power-on sequence on the UJA116xA-EVB. the full board schematics for further details. Figure 24. UJA116xA-EVB/S32K144EVB jumper settings for FlexGUI operation

Figure 25. UJA116xA-EVB/S32K144EVB supply and data line interconnections pushbutton SW5 on the MCU board allows the RSTN signal to be pulled LOW manually.

6.3 Installing the FlexGUI on a PC

FlexGUI application starts automatically after a successful installation.

6.4 Using the FlexGUI

6.4.1 Starting the FlexGUI application

Figure 26. FlexGUI start options boards covered by this FlexGUI installation. connection to the board. Section 6.4.2 explains how to establish a connection.

Figure 27. Launch window - EVB selection

6.4.2 Establishing a connection between the FlexGUI and the hardware

operating system to detect the connection and locate the appropriate USB driver.

• Click the Search button to detect all available serial connections.
• Identify and select the COM port of the board. It is usually the last item on the list if no other USB cables were connected to the PC since the board was plugged in.
• Click Start to enable the connection. The text in the lower left corner of the window should turn from red to green, to indicate that the session has started successfully (Figure 30). The FlexGUI functionality can now be accessed, as discussed in the following sections.

Figure 30. FlexGUI, USB connection to MCU board established del "%USERPROFILE%\\.jssc\\windows\\jSSC-2.8_x86_64.dll". later version of the library is cached the next time FlexGUI starts up.

6.4.3 SPI speed selection

6.4.4 Interactive control of the RGB LED on the microcontroller board

Figure 31. This window contains selection boxes for the microcontroller pins that control the red, green and blue color components of the RGB LED on the microcontroller board. A 'Low' value selects a component; a 'High' value turns it off. Figure 31. Interactive control of the RGB LED on the microcontroller board

6.4.5 Register map

be read or written to interactively via this window.

The contents of the selected register, or register group, is displayed in the main window. Actual register contents from a prior read access is shown in the bottom row. Figure 34. Advanced options for register map

• As a single hexadecimal value for the entire register
• In text format, when clicking on the question mark symbol
• A color-coded button is provided for each register bit: – red = 0 – green = 1 When the bit buttons do not fit on a single row (as in Figure 32), try de-selecting checkbox Uniform Buttons (see Figure 33). The width of the buttons is then minimized to fit the bit names (Figure 35). User manual Rev. 1 — 23 April 2021

NXP Semiconductors UM11379 UJA116xA evaluation boards For each register, read and write operations can be triggered using the R and W buttons. Multiple registers can be selected using the check boxes to the left of the register names. The selected registers will be included in later multi-registers operations. Four associated buttons are provided:

• Write and read operations can be triggered with the Write and Read buttons.
• The Copy button can be used to copy data from the 'read' row(s) to the selected 'write' row(s).
• Clicking the Reset button undoes changes made to the 'write' row(s) since the most recently executed write action(s) on the associated register(s). If a register has not been previously written to, the selected rows are re-initialized (with the default values as selected via the Use Register Init Value check box; see Figure 34). For each register, an 'OK' (✓) or 'pencil' (✎) symbol is displayed to the left of the W/R buttons. The ✓ symbol indicates that the data currently in the editable text field matches the data previously written to the register (or the default initialization values if no previous write operation was executed). A ✎ symbol indicates that the data in the editable text field differs from the data previously written to the register (or from the default values). User manual Rev. 1 — 23 April 2021

6.4.6 Working with the script editor

settings (see Section 6.4.4) can also be included in such scripts. Figure 37. Script editor window selector tools in the left column. A script can also be loaded from a file. hovered above these buttons. Script execution is logged in the 'Results' window. application with the help of Windows Task Manager. Table 19. Syntax for script editor commands [1] The PAUSE command should not be used when the auto-repeat option (∞) has been selected.

NXP Semiconductors UM11379 UJA116xA evaluation boards Example scripts using all available commands: // This is an example script // Do not run this script with the auto-repeat option, // because the script includes a PAUSE command // write value 0x07 to Mode-control register SET_REG:UJA1168AF:Primary control:Mode control:0x07 // read Global event status register GET_REG:UJA1168AF:Event capture:Global event status // turn on red LED SET_DPIN:UJA1168AF:RedLED:LOW // give user time to identify the current LED color PAUSE:RGB LED will change from red to green // turn off red LED & turn on green LED SET_DPIN:UJA1168AF:RedLED:HIGH SET_DPIN:UJA1168AF:GreenLED:LOW Example script that programs the SBC for Software Development mode: // Script for programming UJA1168AF SBC MTPNV registers to Software Development mode // For UJA1164A-EVB/UJA1168AXF-EVB replace “UJA1168AF” with applicable device name // Read MTPNV status register GET_REG:UJA1168AF:MTPNV and ID Registers:MTPNV status // The user can now check if device is ready for programming PAUSE:Only if MTPNV status value was an odd number, programming can be successful // Set default reset length to maximum and no auto-start of VEXT/INH SET_REG:UJA1168AF:MTPNV and ID Registers:Start-up control:0x0 // Set Software Development mode, allow Sleep mode and set max reset threshold as default SET_REG:UJA1168AF:MTPNV and ID Registers:SBC configuration control:0x04 // Enter the CRC code that fits to above selections SET_REG:UJA1168AF:MTPNV and ID Registers:MTPNV CRC control:0xFB A tool is provided as an attachment to this document to calculate the CRC (see last two lines in above script).

6.4.7 Logging read and write operations

Each executed read or write access is logged in the upper left corner of the FlexGUI window. The logged data can be saved to a log file at any time. A number of Log Level filter options are available to tailor the logged data to the needs of the user (see Figure 38). When 'FINEST' is selected, all bits of signals SDI ('out') and SDO ('in') are displayed for each SPI transfer (see script execution example in Figure 39). User manual Rev. 1 — 23 April 2021

NXP Semiconductors UM11379 UJA116xA evaluation boards

6.4.8 Restrictions on using SBC in Sleep mode

After executing a Sleep mode command successfully (UJA1168AF-EVB and UJA1168AXF-EVB only), the SBC turns off the 5 V output on V1 supplying the microcontroller. As a result, the connection between the GUI and the SBC will be lost after a short delay. This needs to be taken into account when testing the Sleep mode command using the Register map tab or when executing scripts that include a Sleep mode command. To resume GUI operation after the SBC has entered Sleep mode, the SBC must be woken up via an enabled wake source (CAN and/or WAKE pin). The GUI then needs to re-connect to the board. User manual Rev. 1 — 23 April 2021

NXP Semiconductors UM11379 UJA116xA evaluation boards

7 References

[1] UJA1161A data sheet — Self-supplied high-speed CAN transceiver with Standby mode: https://www.nxp.com/docs/en/data-sheet/UJA1161A.pdf [2] UJA1162A data sheet — Self-supplied high-speed CAN transceiver with Sleep mode: https://www.nxp.com/docs/en/data-sheet/UJA1162A.pdf [3] UJA1163A data sheet — Mini high-speed CAN system basis chip: https://www.nxp.com/docs/en/data-sheet/UJA1163A.pdf [4] UJA1164A data sheet — Mini high-speed CAN system basis chip with Standby mode & watchdog: https://www.nxp.com/docs/en/data-sheet/UJA1164A.pdf [6] UJA1166A data sheet — High-speed CAN transceiver with 5 V LDO and Sleep mode: https://www.nxp.com/docs/en/data-sheet/UJA1166A.pdf [8] UJA1168A data sheet — Mini high-speed CAN system basis chip for partial networking: https://www.nxp.com/docs/en/data-sheet/UJA1168A.pdf [4] AH1902 application hints — Mini high speed CAN system basis chips UJA116xA, available from NXP Semiconductors User manual Rev. 1 — 23 April 2021

8 Appendix: UJA116xA evaluation board images

Figure 41. UJA1162A-EVB

Figure 42. UJA1163A-EVB

Figure 43. UJA1164A-EVB

Figure 44. UJA1166A-EVB

Figure 45. UJA1168AF-EVB

Figure 46. UJA1168AXF-EVB

NXP Semiconductors UM11379 UJA116xA evaluation boards

9 Revision history

v.1 20210218 Initial version

Revision history

User manual Rev. 1 — 23 April 2021

NXP Semiconductors UM11379 UJA116xA evaluation boards

10 Legal information

10.1 Definitions

Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information.

10.2 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Security — Customer understands that all NXP products may be subject to unidentified or documented vulnerabilities. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. NXP has a Product Security Incident Response Team (PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.

10.3 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. NXP — wordmark and logo are trademarks of NXP B.V. User manual Rev. 1 — 23 April 2021