IRLR2905 IRF | Alldatasheet
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HEXFET ® Power MOSFET S D G Parameter Typ. Max. Units R θJC Junction-to-Case ––– 1.4 R θJA Case-to-Ambient (PCB mount)** ––– 50 °C/W R θJA Junction-to-Ambient ––– 110 Thermal Resistance VDSS = 55V R DS(on) = 0.027Ω ID = 42A
Description
www.irf.com 1 D-Pak TO-252AA I-Pak TO-251AA l Logic-Level Gate Drive l Ultra Low On-Resistance l Surface Mount (IRLR2905) l Straight Lead (IRLU2905) l Advanced Process Technology l Fast Switching l Fully Avalanche Rated Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The D-PAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 Parameter Max. Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 42 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 30 A IDM Pulsed Drain Current 160 PD @T C = 25°C Power Dissipation 110 W Linear Derating Factor 0.71 W/°C VGS Gate-to-Source Voltage ± 16 V EAS Single Pulse Avalanche Energy 210 mJ IAR Avalanche Current 25 A EAR Repetitive Avalanche Energy 11 mJ dv/dt Peak Diode Recovery dv/dt 5.0 V/ns TJ Operating Junction and -55 to + 175 TSTG Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Absolute Maximum Ratings PD- 91334E
2 www.irf.com S D G Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current MOSFET symbol (Body Diode) ––– ––– showing the ISM Pulsed Source Current integral reverse (Body Diode) ––– ––– p-n junction diode. VSD Diode Forward Voltage ––– ––– 1.3 V T J = 25°C, IS = 25A, VGS = 0V trr Reverse Recovery Time ––– 80 120 ns T J = 25°C, IF = 25A Q rr Reverse RecoveryCharge ––– 210 320 nC di/dt = 100A/µs ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Source-Drain Ratings and Characteristics 160 A VDD = 25V, starting TJ = 25°C, L =470µH RG = 25Ω , IAS = 25A. (See Figure 12) Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Pulse width ≤ 300µs; duty cycle ≤ 2%. This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact. Uses IRLZ44N data and test conditions.ISD ≤ 25A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS , TJ ≤ 175°C Notes: Parameter Min. Typ. Max. Units Conditions V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V V GS = 0V, ID = 250µA ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.070 ––– V/°C Reference to 25°C, ID = 1mA VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V V DS = VGS , ID = 250µA gfs Forward Transconductance 21 ––– ––– S V DS = 25V, ID = 25A ––– ––– 25 µA VDS = 55V, VGS = 0V ––– ––– 250 V DS = 44V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 16V Gate-to-Source Reverse Leakage ––– ––– -100 V GS = -16V Q g Total Gate Charge ––– ––– 48 I D = 25A Q gs Gate-to-Source Charge ––– ––– 8.6 nC V DS = 44V Q gd Gate-to-Drain ("Miller") Charge ––– ––– 25 V GS = 5.0V, See Fig. 6 and 13 td(on) Turn-On Delay Time ––– 11 ––– V DD = 28V tr Rise Time ––– 84 ––– ns ID = 25A td(off) Turn-Off Delay Time ––– 26 ––– R G = 3.4Ω, VGS = 5.0V tf Fall Time ––– 15 ––– R D = 1.1Ω, See Fig. 10 Between lead, 6mm (0.25in.) from package and center of die contact C iss Input Capacitance ––– 1700 ––– V GS = 0V C oss Output Capacitance ––– 400 ––– pF V DS = 25V C rss Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz, See Fig. 5 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) nH IGSS S D G LS Internal Source Inductance ––– 7.5 ––– RDS(on) Static Drain-to-Source On-Resistance LD Internal Drain Inductance ––– 4.5 ––– IDSS Drain-to-Source Leakage Current Caculated continuous current based on maximum allowable junction temperature; Package limitation current = 20A.
www.irf.com 3 Fig 4. Normalized On-Resistance Vs. Temperature Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics Fig 3. Typical Transfer Characteristics 100 1000 0.1 1 10 100 I , Drain-to-Source Current (A)D V , Drain-to-Source Voltage (V )DS A 20µ s PULSE W IDTH T = 25°CJ VGS TOP 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 2.5V 100 1000 0.1 1 10 100 I , Drain-to-Source Current (A)D V , Drain-to-Source Voltage (V )DS A 20µ s PULSE W IDTH T = 175°C VGS TOP 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 2.5V J 100 1000 T = 25°CJ GSV , Gate-to-Source Voltage (V) DI , Drain-to-Source Current (A) T = 175°CJ A V = 25V 20µs PULSE W IDTH DS 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 JT , Junction Temperature (°C) R , Drain-to-Source On ResistanceDS(on) (Norm alized) V = 10V GS A I = 41AD
4 www.irf.com Fig 8. Maximum Safe Operating Area Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 7. Typical Source-Drain Diode Forward Voltage 400 800 1200 1600 2000 2400 2800 1 10 100 C, Capacitance (pF) DSV , Drain-to-Source Voltage (V ) A V = 0V, f = 1MHz C = C + C , C SHORTED C = C C = C + C GS iss gs gd ds rss gd oss ds gdC iss C oss C rss 0 1 02 03 04 05 06 07 0 Q , Total Gate Charge (nC )G V , Gate-to-Source Voltage (V)GS A FOR TEST CIRCUIT SEE FIGURE 13 V = 44V V = 28V I = 25A DS DS D 100 1000 T = 25°CJ V = 0V GS V , Source-to-Drain Voltage (V ) I , Reverse Drain Current (A) SD SD A T = 175°CJ 100 1000 1 10 100 V , Drain-to-Source Voltage (V )DS I , Drain Current (A) OPERATION IN THIS AREA LIMITED BY R D DS(on) 10µs 100µs 1ms 10ms A T = 25°C T = 175°C Sin gle Pulse C J
www.irf.com 5 Fig 10a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr td(off) tf Fig 10b. Switching Time Waveforms VDS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % R D VGS R G D.U.T. -VDD Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case Fig 9. Maximum Drain Current Vs. Case Temperature 25 50 75 100 125 150 175 T , Case Temperature( C) I , Drain Current (A) D LIMITED BY PACKAGE 0.01 0.1 Notes: 1. Duty factor D =t / t 2. Peak T= P x Z + T 1 2 J DM thJC C P t t DM t , Rectangular Pulse Duration (sec) Thermal Response (Z ) thJC 0.01 0.02 0.05 0.10 0.20 D = 0.50 SINGLE PULSE (THERMAL RESPONSE )
6 www.irf.com Q G Q GS Q GD VG Charge D.U.T. VDS IDIG 3mA VGS .3µF 50KΩ .2µF12V Current Regulator Same Type as D.U.T. Current Sampling Resistors 10 V Fig 13b. Gate Charge Test CircuitFig 13a. Basic Gate Charge Waveform Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Fig 12a. Unclamped Inductive Test Circuit tp V (BR)DSS IAS R G IAS 0. 01Ωtp D.U.T LV DS - V DD DRIVER A 15V 20V 100 200 300 400 500 25 50 75 100 125 150 175 J E , Single Pulse Avalanche Energy (mJ)AS A Starting T , Junction Temperature (°C ) I TOP 10A 17A BOTTOM 25A V = 25V D DD
www.irf.com 7 P.W. Period di/dt Diode Recovery dv/dt Ripple ≤ 5% Body Diode Forward Drop Re-Applied Voltage Reverse Recovery Current Body Diode Forward Current VGS =10V VDD ISD Driver Gate Drive D.U.T. ISD Waveform D.U.T. VDS Waveform Inductor Curent D = P.W . Period Fig 14. For N-Channel HEXFETS * VGS = 5V for Logic Level Devices Peak Diode Recovery dv/dt Test Circuit R G VDD
- dv/dt controlled by RG
- Driver same type as D.U.T.
- ISD controlled by Duty Factor "D"
- D.U.T. - Device Under Test D.U.T Circuit Layout Considerations
- Low Stray Inductance
- Ground Plane
- Low Leakage Inductance Current Transformer
8 www.irf.com Package Outline TO-252AA Outline Dimensions are shown in millimeters (inches) TO-252AA (D-PARK) Part Marking Information 6.73 (.265) 6.35 (.250) - A - 1 2 3 6.22 (.245) 5.97 (.235) - B - 3X 0.89 (.035) 0.64 (.025) 0.25 (.010) M A M B 4.57 (.180) 2.28 (.090) 2X 1.14 (.045) 0.76 (.030) 1.52 (.060) 1.15 (.045) 1.02 (.040) 1.64 (.025) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 6.45 (.245) 5.68 (.224) 0.51 (.020) M IN. 0.58 (.023) 0.46 (.018) LEAD ASSI GNMENTS 1 - G A TE 2 - D R A IN 3 - S O U R CE 4 - D R A IN 10.42 (.410) 9.40 (.370) NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLI NG DI MENSI ON : I NCH. 3 C O N FO R MS TO JE D E C O U TLIN E TO -252AA .
4 DI MENSI ONS SHOW N ARE BEFORE SOLDER DI P,
SOLDER DIP MAX. +0.16 (.006). INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE EXAMPLE : THIS IS AN IRFR120 WITH ASSEMBLY LOT CODE 9U1P FIRST PORTION OF PART NUMBER SECOND PORTION OF PART NUMBER 120 IRFR 9U 1P A
www.irf.com 9 Package Outline TO-251AA Outline Dimensions are shown in millimeters (inches) TO-251AA (I-PARK) Part Marking Information 6.73 (.265) 6.35 (.250) - A - 6.22 (.245) 5.97 (.235) - B - 3X 0.89 (.035) 0.64 (.025) 1.14 (.045) 0.76 (.030) 5. 46 (.215) 5. 21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) LEAD ASSIGNMENTS 1 - G ATE 2 - D RA IN 3 - SOURCE 4 - D RA IN NOTES: 1 DI MENSI ONI NG & TOLERANCI NG PER ANSI Y14.5M, 1982. 2 CONTROLLI NG DI MENSI ON : I NCH. 3 C O NF O R MS TO JEDE C O UTLINE TO -252AA.
4 D IM EN SIO N S S HO W N A R E BE FO RE SO LDE R D IP,
SOLDER DIP MAX. +0.16 (.006). 9.65 (.380) 8.89 (.350) 2.28 (.090) 1.91 (.075) 1.52 (.060) 1.15 (.045) 1 2 3 6.45 (.245) 5.68 (.224) 0.58 (.023) 0.46 (.018) INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE FIRST PORTION OF PART NUMBE R SECOND PORTION OF PART NUMBER 120 9U 1P EXAMPLE : THIS IS AN IRFU120 WITH ASSEMBLY LOT CODE 9U1P IRFU
10 www.irf.com Tape & Reel Information TO-252AA Dimensions are shown in millimeters (inches) TR 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION FEED DI RECTI ON 16.3 ( .641 ) 15.7 ( .619 ) TRR TRL NOTES : 1. CONTROLLI NG DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MI LLI METERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. NOTES : 1. OU TLINE CONFO RMS TO EIA-481. 16 mm
13 INC H
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