TXUN0104

TXU0104_V02 TI | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 46

Technical content

TXU0104 / TXUN0104 4-Bit Fixed Direction Voltage-Level Translator with Schmitt- Trigger Inputs and 3-State Outputs

1 Features

• Fully configurable dual-rail design allows each port to operate from 1.1V to 5.5V
• Up to 200Mbps support for 3.3V to 5.0V
• Schmitt-trigger inputs allows for slow and noisy inputs
• Inputs with integrated static pull-down resistors prevent channels from floating
• High drive strength (up to 12mA at 5V)
• Low power consumption – 2.5µA maximum (25°C) – 6µA maximum (–40°C to 125°C)
• VCC isolation and VCC disconnect (Ioff-float) feature – If either VCC input is <100 mV or disconnected, all outputs are disabled and become high- impedance
• Ioff supports partial-power-down mode operation
• Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
• TXU0104 supports active high OE, TXUN0104 supports active low OE
• Pinout compatible with TXB family level shifters
• Available in other variants that support common applications: TXU0204, TXU0304
• Operating temperature from –40°C to +125°C
• Latch-up performance exceeds 100mA per JESD 78, class II
• ESD protection exceeds JESD 22 – 2500V human-body model – 1500V charged-device model

2 Applications

• Eliminate slow or noisy input signals
• Driving indicator LEDs or buzzers
• Debouncing a mechanical switch
• General purpose I/O level shifting
• Push-pull level shifting (UART, SPI, JTAG, and so forth)

3 Description

TXU0104 / TXUN0104 is a 4-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to V CCA logic level, OE pin can be referenced to either V CCA or V CCB logic levels, and Bx pins are referenced to V CCB logic levels. The A port is able to accept input voltages ranging from 1.1V to 5.5V, while the B port can also accept input voltages from 1.1V to 5.5V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. The only difference between TXU0104 and TXUN0104 is the OE / OE signal being active high and active low respectively. See Section 7.4 for a summary of the operation of the control logic.

Package Information

PART NUMBER PACKAGE (1) PACKAGE SIZE (2) TXU0104 BQA (VQFN, 14) 3.00mm × 2.50mm PW (TSSOP, 14) 5.00mm × 4.40mm RUT (UQFN, 12) 2.00mm × 1.70mm DTR (X2SON, 12) 1.70mm × 1.00mm TXUN0104 RUT (UQFN, 12) 2.00mm × 1.70mm (1) For more information, see Section 11. (2) The package size (length × width) is a nominal value and includes pins, where applicable. TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

VCC(MIN) B4Y TXU0104 Functional Block Diagram GND OE VCCA VCCB B1Y B2Y B3Y VCC(MIN) B4Y TXUN0104 Functional Block Diagram TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

2 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

11 Mechanical, Packaging, and Orderable

www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TXU0104 TXUN0104

4 Pin Configuration and Functions

Figure 4-1. PW 14-Pin TSSOP Top View Thermal Pad GND VCCA VCCBOE B1Y B2Y B3Y B4Y NC NC Figure 4-2. BQA Package 14-Pin VQFN Transparent Top View B1Y B2Y B3Y B4Y 65 7 1112 VCCA VCCB OEGND Figure 4-3. RUT Package 12-Pin UQFN Transparent Top View 6 75 1112VCCA GND B4Y B3Y B2Y B1Y VCCB OE Figure 4-4. DTR Package 12-Pin X2SON Transparent Top View Table 4-1. TXU0104 Pin Functions PIN I/O DESCRIPTION Name PW, BQA RUT, DTR A1 2 2 I Input A1. Referenced to VCCA. A2 3 3 I Input A2. Referenced to VCCA. A3 4 4 I Input A3. Referenced to VCCA. A4 5 5 I Input A4. Referenced to VCCA. B1Y 13 10 O Output B1. Referenced to VCCB. B2Y 12 9 O Output B2. Referenced to VCCB. B3Y 11 8 O Output B3. Referenced to VCCB. B4Y 10 7 O Output B4. Referenced to VCCB. GND 7 6 — Ground NC 6, 9 — No internal connection. OE 8 12 I Output Enable. Pull to GND to place all outputs in high-impedance mode. Pull to VCCA or VCCB to enable all outputs. VCCA 1 1 — A-port supply voltage. 1.1V ≤ VCCA ≤ 5.5V VCCB 14 11 — B-port supply voltage. 1.1V ≤ VCCB ≤ 5.5V PAD — — Thermal pad. May be grounded (recommended) or left floating. TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

4 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

Figure 4-5. RUT Package, 12-Pin UQFN (Transparent Top View) (TXUN0104) Table 4-2. TXUN0104 Pin Functions PIN TYPE DESCRIPTION NAME NO. A1 2 I Input A1. Referenced to VCCA. A2 3 I Input A2. Referenced to VCCA. A3 4 I Input A3. Referenced to VCCA. A4 5 I Input A4. Referenced to VCCA. B1Y 10 O Output B1. Referenced to VCCB. B2Y 9 O Output B1. Referenced to VCCB. B3Y 8 O Output B1. Referenced to VCCB. B4Y 7 O Output B1. Referenced to VCCB. GND 6 - Ground OE 12 I Output Enable (active-low). Pull to VCCA or VCCB to place all outputs in high-impedance mode. Pull to GND to enable all outputs. VCCA 1 - A-port supply voltage. 1.1V ≤ VCCA ≤ 5.5V VCCB 11 - B-port supply voltage. 1.1V ≤ VCCB ≤ 5.5V www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TXU0104 TXUN0104

5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCA Supply voltage A –0.5 6.5 V VCCB Supply voltage B –0.5 6.5 V VI Input Voltage(2) I/O Ports (A Port) –0.5 6.5 VI/O Ports (B Port) –0.5 6.5 OE –0.5 6.5 VO Voltage applied to any output in the high-impedance or power-off state(2) A Port –0.5 6.5 V B Port –0.5 6.5 VO Voltage applied to any output in the high or low state(2) (3) A Port –0.5 VCCA + 0.5 V B Port –0.5 VCCB + 0.5 IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –20 mA IO Continuous output current –25 25 mA Continuous current through VCC or GND –100 100 mA Tj Junction Temperature 150 °C Tstg Storage temperature –65 150 °C (1) Stresses beyond those listed under Section 5.1 may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Section 5.3 Exposure beyond the limits listed in Section 5.3 may affect device reliability. (2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The output positive-voltage rating may be exceeded up to 6.5V maximum if the output current rating is observed.

5.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1500 (1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process. TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

6 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) (1) (2) (3) MIN MAX UNIT VCCA Supply voltage A 1.08 5.5 V VCCB Supply voltage B 1.08 5.5 V IOH High-level output current VCCO = 1.1V –1.5 mA VCCO = 1.4V –3 VCCO = 1.65V –4.5 VCCO = 2.3V –8 VCCO = 3V –10 VCCO = 4.5V –12 IOL Low-level output current VCCO = 1.1V 1.5 mA VCCO = 1.4V 3 VCCO = 1.65V 4.5 VCCO = 2.3V 8 VCCO = 3V 10 VCCO = 4.5V 12 VI Input voltage (3) 0 5.5 V VO Output voltage Active State 0 VCCO V Tri-State 0 5.5 TA Operating free-air temperature –40 125 °C (1) VCCI is the VCC associated with the input port. (2) VCCO is the VCC associated with the output port. (3) All control inputs and data I/Os of this device have weak pulldowns to ensure the line is not floating when undefined external to the device. The input leakage from these weak pulldowns is defined by the II specification indicated under Electrical Characteristics

5.4 Thermal Information

THERMAL METRIC(1) TXU0104/TXUN0104 UNITPW TSSOP) BQA WQFN) RUT (UQFN) DTR (X2SON)

14 PINS 14 PINS 12 PINS 12 PINS

RθJA Junction-to-ambient thermal resistance 135.8 87.2 171.9 176.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 65.0 90.0 100.4 84.1 °C/W RθJB Junction-to-board thermal resistance 78.8 56.0 97.1 99.1 °C/W YJT Junction-to-top characterization parameter 15.6 9.8 10.9 2.6 °C/W YJB Junction-to-board characterization parameter 78.2 56.0 95.5 98.9 °C/W RθJC(bottom) Junction-to-case (bottom) thermal resistance N/A 33.0 N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TXU0104 TXUN0104

5.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN TYP MAX MIN TYP MAX VT+ Positive- going input- threshold voltage Data Inputs (Ax, Bx) (Referenced to VCCI) V 3V 3V 1.48 1.92 1.48 1.92 OE (Referenced to VCCA or VCCB) V 3V 3V 1.48 1.92 1.48 1.92 VT- Negative- going input- threshold voltage Data Inputs (Ax, Bx) (Referenced to VCCI) V 3V 3V 0.89 1.5 0.89 1.5 OE (Referenced to VCCA or VCCB) V 3V 3V 0.89 1.5 0.89 1.5 ΔVT Input- threshold hysteresis (VT+ – VT-) Data Inputs (Ax, Bx) (Referenced to VCCI) V 3V 3V 0.46 0.72 0.46 0.72 OE (Referenced to VCCA or VCCB) V 3V 3V 0.39 0.72 0.39 0.72 TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

8 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN TYP MAX MIN TYP MAX VOH High-level output voltage (3) - 0.1 Vcco - 0.1 V IOH = –3mA 1.4V 1.4V 1.0 1.0 IOH = –8mA 2.3V 2.3V 1.7 1.7 IOH = –10mA 3V 3V 2.2 2.2 IOH = –12mA 4.5V 4.5V 3.7 3.7 VOL Low-level output voltage (4) V IOL = 3mA 1.4V 1.4V 0.35 0.35 IOL = 8mA 2.3V 2.3V 0.7 0.7 IOL = 10 mA 3V 3V 0.8 0.8 IOL = 8mA 4.5V 4.5V 0.55 0.55 IOL = 12mA 4.5V 4.5V 0.8 0.8 II Input leakage current OE Data Inputs (Ax, Bx) VI = VCCI or GND Ioff Partial power down current A Port or B Port VI or VO = 0V - 5.5 V µA Ioff-float Floating supply Partial power down current A Port or B Port VI or VO = GND µA IOZ Tri-state output current A or B Port: VI = VCCI or GND VO = VCCO or GND OE = GND ICCA VCCA supply current VI = VCCI or GND IO = 0 µA 0V 5.5V -0.3 -1 -1 5.5V 0V 1 1.5 3 VI = GND IO = 0 5.5V Floating(5) 1.5 7 15 ICCB VCCB supply current VI = VCCI or GND IO = 0 µA 0V 5.5V 1 1.5 3 5.5V 0V -0.3 -1 -1 VI = GND IO = 0 Floating(5) 5.5V 1.5 7 15 ICCA + ICCB Combined supply current VI = VCCI or GND Ci Control Input www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TXU0104 TXUN0104

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN TYP MAX MIN TYP MAX Cio Data I/O Capacitance OE = GND, VO = 1.65V DC +1MHz -16dBm sine wave 3.3V 3.3V 3 4 4 pF (1) VCCI is the VCC associated with the input port (2) VCCO is the VCC associated with the output port (3) Tested at VI = VT+(MAX) (4) Tested at VI = VT-(MIN) (5) Floating is defined as a node that is both not actively driven by an external device and has leakage not exeeding 10nA

5.6 Switching Characteristics: Tsk, TMAX

over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCCI VCCO Operating free-air temperature (TA) UNIT-40°C to 125°C MIN TYP MAX TMAX - Maximum Data Rate 50% Duty Cycle Input One channel switching 20% of pulse > 0.7*VCCO 20% of pulse < 0.3*VCCO Up Translation 3.0V - 3.6V 4.5V - 5.5V 200 Mbps 1.65V - 1.95V 4.5V - 5.5V 150 1.1V - 1.3V 4.5V - 5.5V 30 1.65V - 1.95V 3.0V - 3.6V 100 1.1V - 1.3V 3.0V - 3.6 V 30 1.1V - 1.3V 1.65V - 1.95V 20 Down Translation 4.5V - 5.5V 3.0V - 3.6V 125 4.5V - 5.5V 1.65V - 1.95V 50 4.5V - 5.5V 1.1V - 1.3V 10 3.0V - 3.6V 1.65V - 1.95V 50 3.0V - 3.6V 1.1V - 1.3V 10 1.65V - 1.95V 1.1V - 1.3V 10 tsk - Output skew Timing skew between any switching outputs on the rising or falling edge Up Translation 3.0V - 3.6V 4.5V - 5.5V 3 ns 1.65V - 1.95V 4.5V - 5.5V 10 1.1V - 1.3V 4.5V - 5.5V 42 1.65V - 1.95V 3.0V - 3.6V 8 1.1V - 1.3V 3.0V - 3.6V 42 1.1V - 1.3V 1.65V - 1.95V 45 Down Translation 4.5V - 5.5V 3.0V - 3.6V 3 4.5V - 5.5V 1.65V - 1.95V 10 4.5V - 5.5V 1.1V - 1.3V 42 3.0V - 3.6V 1.65V - 1.95V 8 3.0V - 3.6V 1.1V - 1.3V 42 1.65V - 1.95V 1.1V - 1.3V 45 TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

10 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

5.7 Switching Characteristics, VCCA = 1.2 ± 0.1V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO TEST CONDITIONS B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns -40°C to 125°C 34.9 156 33.3 167 32 169 31.7 173 32 177 34.2 187 OE B www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TXU0104 TXUN0104

5.8 Switching Characteristics, VCCA = 1.5 ± 0.1V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO TEST CONDITIONS B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A -40°C to 85°C 20 91 19 82 18.8 81 19.2 82 19.6 83 12.2 87 ns OE B ten Enable time OE A ns OE B TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

12 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

5.9 Switching Characteristics, VCCA = 1.8 ± 0.15V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO TEST CONDITIONS B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns -40°C to 125°C 30.9 83 28 71 26.6 69 27.5 70 27.2 71 20 73 OE B ten Enable time OE A ns OE B www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TXU0104 TXUN0104

5.10 Switching Characteristics, VCCA = 2.5 ± 0.2V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO TEST CONDITIONS B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A -40°C to 85°C 12.9 65 10.5 51 9 51 8.1 43 8.4 44 5 45 ns OE B -40°C to 85°C 23.2 112 16.5 74 14 61 9 46 9.1 44 6.4 39 ten Enable time OE A ns OE B -40°C to 85°C 16.3 183 9.2 74 6 54 4 36 2.1 31 0.5 27 TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

14 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

5.11 Switching Characteristics, VCCA = 3.3 ± 0.3V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO TEST CONDITIONS B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TXU0104 TXUN0104

5.12 Switching Characteristics, VCCA = 5.0 ± 0.5V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO TEST CONDITIONS B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

16 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

5.13 Operating Characteristics

TA = 25℃ (1) PARAMETER Test Conditions Supply Voltage (VCCB = VCCA) TYP TYP TYP TYP TYP TYP CpdA (2) A to B: outputs enabled A Port CL = 0, RL = Open f = 10MHz trise = tfall = 1 ns 2 2 2 2 2 3 pF A to B: outputs disabled 2 2 2 2 2 3 B to A: outputs enabled 12 12 12 13 13 16 B to A: outputs disabled 2 2 2 2 2 3 CpdB (3) A to B: outputs enabled B Port CL = 0, RL = Open f = 10MHz trise = tfall = 1ns 12 12 12 13 13 16 pF A to B: outputs disabled 2 2 2 2 2 3 B to A: outputs enabled 2 2 2 2 2 3 B to A: outputs disabled 2 2 2 2 2 3 (1) For additional information about how power dissipation capacitance affects power consumption, see the CMOS Power Consumption and Cpd Calculation application report (2) A-Port power dissipation capacitance per transceiver (3) B-Port power dissipation capacitance per transceiver www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TXU0104 TXUN0104

5.14 Typical Characteristics

I OH - Output High Current (mA) V OH - Output High Voltage (V) 0 3 6 9 12 15 18 21 24 1.5 1.75 2.25 2.5 2.75 3.25 3.5 3.75 4.25 4.5 4.75 V CC = 5.0V V CC = 3.3V V CC = 2.5V Figure 5-1. Typical (TA=25°C) Output High Voltage (VOH) vs Source Current (IOH) I OH - Output High Current (mA) V OH - Output High Voltage (V) 0.75 0.9 1.05 1.2 1.35 1.5 1.65 1.8 1.95 V CC = 1.8V V CC = 1.5V V CC = 1.2V Figure 5-2. Typical (TA=25°C) Output High Voltage (VOH) vs Source Current (IOH) I OL - Output Low Current (mA) V OL - Output Low Voltage (V) 0 3 6 9 12 15 18 21 24 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 0.275 0.3 0.325 0.35 V CC = 2.5V V CC = 3.3V V CC = 5.0V Figure 5-3. Typical (TA=25°C) Output Low Voltage (VOL) vs Sink Current (IOL) I OL - Output Low Current (mA) V OL - Output Low Voltage (V) 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 0.275 0.3 0.325 0.35 V CC = 1.2V V CC = 1.5V V CC = 1.8V Figure 5-4. Typical (TA=25°C) Output Low Voltage (VOL) vs Sink Current (IOL) V IN - Input Voltage (V) I CC - Supply Current (mA) 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 V CC = 2.5 V V CC = 3.3 V V CC = 5 V Figure 5-5. Typical (TA=25°C) Supply Current (ICC) vs Input Voltage (VIN) V IN - Input Voltage (V) I CC - Supply Current (mA) 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 V CC = 1.2 V V CC = 1.5 V V CC = 1.8 V Figure 5-6. Typical (TA=25°C) Supply Current (ICC) vs Input Voltage (VIN) TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

18 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

6 Parameter Measurement Information

6.1 Load Circuit and Voltage Waveforms

Unless otherwise noted, generators supply all input pulses that have the following characteristics:

• f = 1MHz
• ZO = 50Ω
• Δt/ΔV ≤ 1ns/V Output Pin Under Test CL (1) RL RL GND Open 2 x VCCO Measurement Point A. CL includes probe and jig capacitance. Figure 6-1. Load Circuit Table 6-1. Load Circuit Conditions Parameter VCCO RL CL S1 VTP tpd Propagation (delay) time 1.1V – 5.5V 10kΩ 5pF Open N/A ten, tdis Enable time, disable time 1.1V – 1.6V 10kΩ 5pF 2 × VCCO 0.1V 1.65V – 2.7V 10kΩ 5pF 2 × VCCO 0.15V 3.0V – 5.5V 10kΩ 5pF 2 × VCCO 0.3V ten, tdis Enable time, disable time 1.1V – 1.6V 10kΩ 5pF GND 0.1V 1.65V – 2.7V 10kΩ 5pF GND 0.15V 3.0V – 5.5V 10kΩ 5pF GND 0.3V Input A, B VCCI (1) VCCI / 2 0 V Output B, A VOH (2) VOL (2) tpd tpd VCCI / 2 VCCI / 2 V CCI / 2 1. VCCI is the supply pin associated with the input port. 2. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1 Figure 6-2. Propagation Delay VCCI (1) 0 V 100 kHz 500 ps/V ± 1 s/V VOH (2) VOL (2) Ensure Monotonic Rising and Falling EdgeOutput B, A Input A, B 1. VCCI is the supply pin associated with the input port. 2. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1 Figure 6-3. Input Transition Rise and Fall Rate www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TXU0104 TXUN0104

Output(1) tdis GND VCCA / 2 VCCO (3) VOL (4)VOL + VTP ten VCCO / 2 Output(2) VOH (4) GND VOH - VTP VCCO / 2 OE 1. Output waveform on the condition that input is driven to a valid Logic Low. 2. Output waveform on the condition that input is driven to a valid Logic High. 3. VCCO is the supply pin associated with the output port. 4. VOH and VOL are typical output voltage levels with specified RL, CL, and S1. Figure 6-4. Enable Time And Disable Time TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

20 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

7 Detailed Description

7.1 Overview

The TXU0104 / TXUN0104 is a 4-bit translating transceiver that uses two individually configurable power-supply rails. The device is operational with VCCA and VCCB supplies as low as 1.1V and as high as 5.5V. Additionally, the device can be operated with V CCA = V CCB. The A port is designed to track V CCA, and the B port is designed to track VCCB. The TXU0104 / TXUN0104 device is designed for asynchronous communication between data buses, and transmits data with fixed direction from the A bus to the B bus on some channels and from the B bus to the A bus on the remaining channels. The output-enable input is used to disable the outputs so the buses are effectively isolated. The output-enable pin of the TXU0104 / TXUN0104 can be referenced to either V CCA or VCCB. On the TXU0104, the OE pin can be left floating or externally pulled down to ground to ensure the high-impedance state of the level shifter outputs during power up or power down. On the TXUN0104, the OE pin needs to be externally pulled up to VCC to ensure the high-impedance state of the level shifter outputs during power up or power down. This device is fully specified for partial-power-down applications using the I off current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input or output while the device is powered down. The VCC isolation or VCC disconnect feature ensures that if either VCC is less than 100 mV or disconnected with the complementary supply within recommended operating conditions, outputs are disabled and set to the high-impedance state while the supply current is maintained. The I off-float circuitry ensures that no excessive current is drawn from or sourced into an input or output while the supply is floating. Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

7.2 Functional Block Diagram

VCC(MIN) B4Y www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TXU0104 TXUN0104

7.3 Feature Description

7.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns

Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input capacitance given in the Section 5.5. The worst case resistance is calculated with the maximum input voltage, given in the Section 5.1, and the maximum input leakage current, given in the Electrical Characteristics, using ohm's law (R = V ÷ I). The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics, which makes this device extremely tolerant to slow or noisy inputs. Driving the inputs slowly will increase dynamic current consumption of the device. See Understanding Schmitt Triggers for additional information regarding Schmitt-trigger inputs.

7.3.1.1 Inputs with Integrated Static Pull-Down Resistors

This device has 5M Ω typical integrated weak pull-downs for each input. This feature allows all inputs to be left floating without the concern for unstable outputs or increased current consumption. This also helps to reduce external component count for applications where not all channels are used or need to be fixed low. If an external pull-up is required, it should be no larger than 1MΩ to avoid contention with the 5MΩ internal pull-down.

7.3.2 Control Logic (OE / OE) with VCC(MIN) Circuitry

The output-enable input (OE / OE) is used to disable the outputs so the buses are effectively isolated. The output-enable pin of the TXU0x04 has VCC(MIN) circuitry, which allows the OE / OE pins to operate with the lower supply voltage. The Over-Voltage Tolerant Inputs feature allows the OE / OE pins to operate with the higher supply voltage. This combination means that the enable pin can be referenced to either V CCA or V CCB supply. Multiple permutations of each device are possible since the controller can be placed on either the A or B port and can still control the enable pin.

7.3.3 Balanced High-Drive CMOS Push-Pull Outputs

A balanced output allows the device to sink and source similar currents. The high drive capability of this device creates fast edges into light loads, so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. Section 5.1 defines the electrical and thermal limits that must be followed at all times.

7.3.4 Partial Power Down (Ioff)

The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting current backflow into the device. The I off in the Section 5.5 specifies the maximum leakage into or out of any input or output pin on the device.

7.3.5 VCC Isolation and VCC Disconnect

The outputs for this device are disabled and enter a high-impedance state when either supply is <100 mV or left floating (disconnected), with the complementary supply within recommended operating conditions. It is recommended that the inputs are kept low before floating (disconnecting) either supply. The ICCx(floating) in the Section 5.5 specifies the maximum supply current. The I off(float) in the Section 5.5 specifies the maximum leakage into or out of any input or output pin on the device. TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

22 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

Supply disconnected I CCB maintained Ioff(float)Ioff(float) OE VCCA VCCB B1YA1 VCC(MIN) Disabled VCCBVCCA GND Figure 7-1. VCC Disconnect Feature (TXU0104)

7.3.6 Over-Voltage Tolerant Inputs

Input signals to this device can be driven above the supply voltage so long as they remain below the maximum input voltage value specified in the Section 5.3.

7.3.7 Glitch-Free Power Supply Sequencing

Either supply rail may be powered on or off in any order without producing a glitch on the inputs or outputs (that is, where the output erroneously transitions to VCC when it should be held low or vice versa). Glitches of this nature can be misinterpreted by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device configuration of the peripheral, or even a false data initialization by the peripheral. www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TXU0104 TXUN0104

7.3.8 Negative Clamping Diodes

Figure 7-2 depicts the inputs and outputs to this device that have negative clamping diodes. CAUTION Voltages beyond the values specified in the Section 5.1 table can cause damage to the device. The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. GND Level Shifter Input or I/O configured as input VCCA Device -IIK -IOK VCCB I/O configured as output Figure 7-2. Electrical Placement of Clamping Diodes for Each Input and Output

7.3.9 Fully Configurable Dual-Rail Design

The V CCA and V CCB pins can be supplied at any voltage from 1.1V to 5.5V, making the device suitable for

7.3.10 Supports High-Speed Translation

The TXU0104 / TXUN0104 device can support high data-rate applications. The translated signal data rate can be up to 200 Mbps when the signal is translated from 3.3 V to 5.0 V.

7.4 Device Functional Modes

Table 7-1. Function Table CONTROL INPUTS Port Status OPERATION OE (TXU0104) OE (TXUN0104) Input Output H L L L Unidirectional non- inverting voltage translation H L H H Unidirectional non- inverting voltage translation L H X Hi-Z Isolation TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

24 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

8 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The TXU0104 / TXUN0104 device can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The TXU0104 / TXUN0104 device is ideal for use in applications where a push-pull driver is connected to the data Inputs. The maximum data rate can be up to 200Mbps when device translates a signal from 3.3V to 5.0V.

8.2 Typical Application

1.2 V 5.0 V 0.1 µF 0.1 µF TXU0104 GND GPIO1 A1GPIO2 B1Y B2Y B3Y B4Y GPIO3 GPIO4 GPIO5 Figure 8-1. TXU0104 LED Driver Application

8.2.1 Design Requirements

Use the parameters listed in Table 8-1 for this design example. Table 8-1. Design Parameters DESIGN PARAMETERS EXAMPLE VALUES Input voltage range 1.1V to 5.5V Output voltage range 1.1V to 5.5V

8.2.2 Detailed Design Procedure

To begin the design process, determine the following:

• Input voltage range – Use the supply voltage of the device that is driving the TXU0104 device to determine the input voltage range. For a valid logic-high, the value must exceed the positive-going input-threshold voltage (VT+) of the input port. For a valid logic low the value must be less than the negative-going input-threshold voltage (VT-) of the input port.
• Output voltage range – Use the supply voltage of the device that the TXU0104 device is driving to determine the output voltage range. www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: TXU0104 TXUN0104

8.2.3 Application Curve

Figure 8-2. Up Translation at 1MHz (1.2V to 5V)

8.3 Power Supply Recommendations

Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing without any supply sequencing requirements such as ramp order or ramp rate. Section 7.3.7 describes how this device was designed with various power supply sequencing methods in mind to help prevent unintended triggering of downstream devices.

8.4 Layout

8.4.1 Layout Guidelines

To ensure reliability of the device, following common printed-circuit board layout guidelines are recommended:

• Use bypass capacitors on the power supply pins and place them as close to the device as possible. A 0.1µF capacitor is recommended, but transient performance can be improved by having 1µF and 0.1µF capacitors in parallel as bypass capacitors.
• The high drive capability of this device creates fast edges into light loads so routing and load conditions should be considered to prevent ringing. TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

26 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

8.4.2 Layout Example

B G Legend 6 75 1112VCCA GND B4Y B3Y B2Y B1Y VCCB OE 8 mil G B 0.1µF 01005 A 0.1µF 01005 G G TXU0104DTR Figure 8-3. Layout Example – TXU0104 www.ti.com TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: TXU0104 TXUN0104

9 Device and Documentation Support

9.1 Device Support

9.2 Documentation Support

9.2.1 Related Documentation

• Texas Instruments, Understanding Schmitt Triggers application report
• Texas Instruments, CMOS Power Consumption and Cpd Calculation application report

9.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.4 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.5 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

9.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.7 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (September 2021) to Revision B (February 2025) Page Changes from Revision * (May 2021) to Revision A (September 2021) Page

• Changed the status of the TXU0104BQA, TXU0104RUT, and TXU0104DTR devices from: Product Preview

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. TXU0104, TXUN0104 SCES937B – MAY 2021 – REVISED FEBRUARY 2025 www.ti.com

28 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: TXU0104 TXUN0104

www.ti.com 1-Mar-2025 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TXU0104BQAR ACTIVE WQFN BQA 14 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TX0104 Samples TXU0104DTRR ACTIVE X2QFN DTR 12 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1KJ Samples TXU0104PWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TXU0104 Samples TXU0104RUTR ACTIVE UQFN RUT 12 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1J4 Samples TXUN0104RUTR ACTIVE UQFN RUT 12 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1UE Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1

www.ti.com 1-Mar-2025 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TXU0104 :

• Automotive : TXU0104-Q1 NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 2-Mar-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Mar-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TXU0104BQAR WQFN BQA 14 3000 210.0 185.0 35.0 TXU0104DTRR X2QFN DTR 12 3000 189.0 185.0 36.0 TXU0104PWR TSSOP PW 14 2000 356.0 356.0 35.0 TXU0104RUTR UQFN RUT 12 3000 189.0 185.0 36.0 TXUN0104RUTR UQFN RUT 12 3000 210.0 185.0 35.0 Pack Materials-Page 2

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. WQFN - 0.8 mm max heightBQA 14 PLASTIC QUAD FLATPACK - NO LEAD2.5 x 3, 0.5 mm pitch 4227145/A

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. PACKAGE OUTLINE 4224636/A 11/2018 www.ti.com WQFN - 0.8 mm max height PLASTIC QUAD FLAT PACK-NO LEAD BQA0014A A 0.08 C

0.1 C A B

0.05 C B SYMM SYMM 2.6 2.4 3.1 2.9PIN 1 INDEX AREA 0.8 0.7 0.05 0.00 SEATING PLANE C 1.1 0.9 1.6 1.4 2X 0.5 8X 0.5 14X 0.3 0.2 14X 0.5 0.3 (0.2) TYP 7 8 141 PIN 1 ID (OPTIONAL)

NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. EXAMPLE BOARD LAYOUT 4224636/A 11/2018 www.ti.com WQFN - 0.8 mm max heightBQA0014A PLASTIC QUAD FLAT PACK-NO LEAD SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X (1) (1.5)2X (0.5) 8X (0.5) (2) 2X (0.5) 14X (0.25) 14X (0.6) (2.3) (2.8) (Ø0.2) VIA TYP (R0.05) TYP 7 8

0.07 MAX

0.07 MIN

(PREFERRED) SOLDER MASK DEFINED

NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. EXAMPLE STENCIL DESIGN 4224636/A 11/2018 www.ti.com WQFN - 0.8 mm max heightBQA0014A PLASTIC QUAD FLAT PACK-NO LEAD SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 88% PRINTED COVERAGE BY AREA SCALE: 20X SYMM SYMM (0.95) (1.38) 8X (0.5) (2) 2X (0.5) 14X (0.25) 14X (0.6) (2.3) (2.8) (R0.05) TYP 7 8

www.ti.com PACKAGE OUTLINE C 12X 0.25 0.15 12X 0.6 0.4 1.6 10X 0.4

0.55 MAX

0.05 0.00 B 1.8 1.6 A 2.1 1.9 0.6 0.4 0.25 0.15 (0.15) (0.15) TYP 4220310/A 11/2016 UQFN - 0.55 mm max heightRUT0012A PLASTIC QUAD FLATPACK - NO LEAD PIN 1 INDEX AREA SEATING PLANE 0.08 C (OPTIONAL) PIN 1 ID

0.1 C B A

0.05 C SYMM SYMM NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. SCALE 6.800 OPTIONAL TERMINAL & PIN 1 ID PIN 1 ID

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MIN

0.05 MAX

12X (0.2) (1.4) 8X (0.4) (1.7) 4220310/A 11/2016 UQFN - 0.55 mm max heightRUT0012A PLASTIC QUAD FLATPACK - NO LEAD SYMM SYMM LAND PATTERN EXAMPLE SCALE:30X NOTES: (continued) 3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)

www.ti.com EXAMPLE STENCIL DESIGN 12X (0.7) 12X (0.2) 8X (0.4) (1.7) (1.4) (R0.05) TYP 4220310/A 11/2016 UQFN - 0.55 mm max heightRUT0012A PLASTIC QUAD FLATPACK - NO LEAD NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SYMM SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE: 30X

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. PACKAGE OUTLINE 4226527/B 04/2021 www.ti.com X2QFN - 0.4 mm max height PLASTIC QUAD FLATPACK-NO LEAD DTR0012A A 0.08 C B 1.1 0.9 1.8 1.6PIN 1 ID SEATING PLANE C0.4 0.3 0.04 0.00 (0.127) TYP 4X 0.25 0.15 4X 0.22 0.12 (0.127) TYP PIN 1 ID 0.44 0.73 1.38 4X 0.26 0.16 4X 0.31 0.21 (0.2) TYP 4X 0.28 0.18 (0.24) TYP 4X 0.25 0.15 0.05 C 0.05 C 4 8 (0.2) TYP (0.2) TYP 3 9

NOTES: (continued) 3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 4. Solder mask tolerances between and around signal pads can vary based on board fabrication site. EXAMPLE BOARD LAYOUT 4226527/B 04/2021 www.ti.com X2QFN - 0.4 mm max heightDTR0012A PLASTIC QUAD FLATPACK-NO LEAD LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 40X METAL SOLDER MASK OPENING SOLDER MASK OPENING METAL UNDER SOLDER MASK NON- SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED EXPOSED METAL EXPOSED METAL SOLDER MASK DETAILS NOT TO SCALE (1.03) (1) (0.44) (0.37) (0.69) 4X (0.2) 4X (0.37) 4X (0.4) 4X (0.26) (0.2) TYP 4X (0.2) (0.2) TYP 4X (0.23) PKG PKG (R0.05) TYP (1.7)

NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. EXAMPLE STENCIL DESIGN 4226527/B 04/2021 www.ti.com X2QFN - 0.4 mm max heightDTR0012A PLASTIC QUAD FLATPACK-NO LEAD SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE: 40X (1.06) (1.03) (0.44) (0.37) (0.69) 4X (0.2) 4X (0.34) 4X (0.2) 4X (0.23) PKG PKG 4 8 (R0.05) TYP (0.22) TYP (0.22) TYP (1.73) 3 9

www.ti.com PACKAGE OUTLINE C 12X 0.65 3.9 14X 0.30 0.17 6.6

6.2 TYP

1.2 MAX

0.15 0.05 0.25 GAGE PLANE 0 -8 4X (0 -12 ) B 4.5 4.3 NOTE 4 A 5.1 4.9 NOTE 3 0.75 0.50 (0.15) TYP TSSOP - 1.2 mm max heightPW0014A SMALL OUTLINE PACKAGE 4220202/B 12/2023 0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. SEATING PLANE A 20 DETAIL A TYPICAL SCALE 2.500

www.ti.com EXAMPLE BOARD LAYOUT 14X (1.5) 14X (0.45) 12X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0014A SMALL OUTLINE PACKAGE 4220202/B 12/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SYMM SYMM 7 8 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 14X (1.5) 14X (0.45) 12X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0014A SMALL OUTLINE PACKAGE 4220202/B 12/2023 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X SYMM SYMM 7 8

IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated