TXU202-Q1 TI | Alldatasheet

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Technical content

TXU0202-Q1 Single-Bit Fixed Direction Voltage-Level Translator With Schmitt-Trigger Inputs and 3-State Outputs

1 Features

  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Up to 200 Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allows for slow and noisy inputs
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • High drive strength (up to 12 mA at 5 V)
  • Low power consumption – 2.5 µA maximum (25°C) – 6 µA maximum (–40°C to 125°C)
  • VCC isolation and VCC disconnect (Ioff-float) feature – If either VCC input is ;amplt;100 mV or disconnected, all outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
  • Pinout compatible with TXB family level shifters
  • Available in another variant that supports common applications: TXU0102
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22 – 2500-V human-body model – 1500-V charged-device model

2 Applications

  • Eliminate slow or noisy input signals
  • Driving indicator LEDs or buzzers
  • Debouncing a mechanical switch
  • General purpose I/O level shifting
  • Push-pull level shifting (UART, SPI, JTAG, and so forth)

3 Description

TXU0202-Q1 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. The Ax pins are referenced to V CCA logic level, the OE pin can be referenced to either V CCA or V CCB logic levels, and the Bx pins are referenced to V CCB logic levels. The A port can accept input voltages ranging from 1.1 V to

5.5 V, while the B port can also accept input voltages

from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic. Package Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TXU0202 VSSOP (DCU) (8) 2.30 mm × 2.00 mm SON (DTT) (8) 1.95 mm × 1.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. OE VCCA VCCB GND B1Y A2Y VCC(MIN) TXU0202-Q1 Functional Block Diagram TXU202-Q1 SCES949 – AUGUST 2022 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

12.3 Receiving Notification of Documentation Updates..26

13 Mechanical, Packaging, and Orderable

4 Revision History

August 2022 * Initial Release TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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5 Pin Configuration and Functions—TXU0202-Q1

Figure 5-1. DCU Package, 8-Pin VSSOP (Top View) 4 5 GND VCCA A2Y B1Y VCCB OE A1 Figure 5-2. DTT Package, 8-Pin SON Transparent (Top View) Table 5-1. TXU0202 Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. B2 1 I Input B2. Referenced to VCCB. GND 2 — Ground. VCCA 3 — A-port supply voltage. 1.1 V ≤ VCCA ≤ 5.5 V A2Y 4 O Output A2. Referenced to VCCA. A1 5 I Input A1. Referenced to VCCA. OE 6 I Output Enable. Pull to GND to place all outputs in high-impedance mode. Pull to VCCA or VCCB to enable all outputs. VCCB 7 — B-port supply voltage. 1.1 V ≤ VCCB ≤ 5.5 V B1Y 8 O Output B1. Referenced to VCCB. (1) I = input, O = output www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TXU202-Q1

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCA Supply voltage A –0.5 6.5 V VCCB Supply voltage B –0.5 6.5 V VI Input Voltage(2) I/O Ports (A Port) –0.5 6.5 VI/O Ports (B Port) –0.5 6.5 OE –0.5 6.5 VO Voltage applied to any output in the high-impedance or power-off state(2) A Port –0.5 6.5 V B Port –0.5 6.5 VO Voltage applied to any output in the high or low state(2) (3) A Port –0.5 VCCA + 0.5 V B Port –0.5 VCCB + 0.5 IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –20 mA IO Continuous output current –25 25 mA Continuous current through VCC or GND –100 100 mA Tj Junction Temperature 150 °C Tstg Storage temperature –65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002 (1) ±2500 V Charged device model (CDM), per AEC Q100-011 ±1500 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) (1) (2) (3) MIN MAX UNIT VCCA Supply voltage A 1.08 5.5 V VCCB Supply voltage B 1.08 5.5 V IOH High-level output current VCCO = 1.1 V –1.5 mA VCCO = 1.4 V –3 VCCO = 1.65 V –4.5 VCCO = 2.3 V –8 VCCO = 3 V –10 VCCO = 4.5 V –12 IOL Low-level output current VCCO = 1.1 V 1.5 mA VCCO = 1.4 V 3 VCCO = 1.65 V 4.5 VCCO = 2.3 V 8 VCCO = 3 V 10 VCCO = 4.5 V 12 VI Input voltage (3) 0 5.5 V VO Output voltage Active State 0 VCCO V Tri-State 0 5.5 TA Operating free-air temperature –40 125 °C (1) VCCI is the VCC associated with the input port. (2) VCCO is the VCC associated with the output port. (3) All control inputs and data I/Os of this device have weak pulldowns to ensure the line is not floating when undefined external to the device. The input leakage from these weak pulldowns is defined by the II specification indicated under Electrical Characteristics.

6.4 Thermal Information

THERMAL METRIC (1) TXU0202-Q1 UNITDCU (VSSOP) DTT (SON)

8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 257.0 249.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 106.9 175.2 °C/W RθJB Junction-to-board thermal resistance 168.3 145.4 °C/W YJT Junction-to-top characterization parameter 47.2 32.1 °C/W YJB Junction-to-board characterization parameter 167.3 145.0 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TXU202-Q1

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN TYP MAX MIN TYP MAX VT+ Positive- going input- threshold voltage Data Inputs (Ax, Bx) (Referenced to VCCI) V 3 V 3 V 1.48 1.92 1.48 1.92 OE (Referenced to VCCA or VCCB) V 3 V 3 V 1.48 1.92 1.48 1.92 VT- Negative- going input- threshold voltage Data Inputs (Ax, Bx) (Referenced to VCCI) V 3 V 3 V 0.89 1.5 0.89 1.5 OE (Referenced to VCCA or VCCB) V 3 V 3 V 0.89 1.5 0.89 1.5 ΔVT Input- threshold hysteresis (VT+ – VT-) Data Inputs (Ax, Bx) (Referenced to VCCI) V 3 V 3 V 0.46 0.72 0.46 0.72 OE (Referenced to VCCA or VCCB) V 3 V 3 V 0.39 0.72 0.39 0.72 TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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6.5 Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN TYP MAX MIN TYP MAX VOH High-level output voltage (3) – 0.1 VCCO – 0.1 V IOH = –3 mA 1.4 V 1.4 V 1 1 IOH = –8 mA 2.3 V 2.3 V 1.7 1.7 IOH = –10 mA 3 V 3 V 2.2 2.2 IOH = –12 mA 4.5 V 4.5 V 3.7 3.7 VOL Low-level output voltage (4) V IOL = 3 mA 1.4 V 1.4 V 0.35 0.35 IOL = 8 mA 2.3 V 2.3 V 0.7 0.7 IOL = 10 mA 3 V 3 V 0.8 0.8 IOL = 8 mA 4.5 V 4.5 V 0.55 0.55 IOL = 12 mA 4.5 V 4.5 V 0.8 0.8 II Input leakage current OE Data Inputs (Ax, Bx) VI = VCCI or GND Ioff Partial power down current A Port or B Port VI or VO = 0 V – 5.5 V µA Ioff- float Floating supply Partial power down current A Port or B Port VI or VO = GND µA IOZ Tri-state output current A or B Port: VI = VCCI or GND VO = VCCO or GND OE = GND ICCA VCCA supply current VI = VCCI or GND IO = 0 µA 0 V 5.5 V –0.3 –1 –1 5.5 V 0 V 1 1.5 3 VI = GND IO = 0 5.5 V Floating(5) 1.5 7 15 ICCB VCCB supply current VI = VCCI or GND IO = 0 µA 0 V 5.5 V 1 1.5 3 5.5 V 0 V –0.3 –1 –1 VI = GND IO = 0 Floating(5) 5.5 V 1.5 7 15 ICCA ICCB Combined supply current VI = VCCI or GND Ci Control Input www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TXU202-Q1

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT25°C –40°C to 85°C –40°C to 125°C MIN TYP MAX MIN TYP MAX MIN TYP MAX Cio Data I/O Capacitance OE = GND, VO = 1.65 V DC +1 MHz −16 dBm sine wave 3.3 V 3.3 V 3 4 4 pF (1) VCCI is the VCC associated with the input port. (2) VCCO is the VCC associated with the output port. (3) Tested at VI = VT+(MAX). (4) Tested at VI = VT-(MIN). (5) Floating is defined as a node that is both not actively driven by an external device and has leakage not exeeding 10 nA. TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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6.6 Switching Characteristics, VCCA = 1.2 ± 0.1 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TXU202-Q1

6.7 Switching Characteristics, VCCA = 1.5 ± 0.1 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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6.8 Switching Characteristics, VCCA = 1.8 ± 0.15 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TXU202-Q1

6.9 Switching Characteristics, VCCA = 2.5 ± 0.2 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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6.10 Switching Characteristics, VCCA = 3.3 ± 0.3 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TXU202-Q1

6.11 Switching Characteristics, VCCA = 5.0 ± 0.5 V See Figure 7-1 and Table 7-1 for test circuit and loading. See Figure 7-2, Figure 7-3, and Figure 7-4 for measurement waveforms. PARAMETER FROM TO Test Conditions B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B ns B A tdis Disable time OE A ns OE B ten Enable time OE A ns OE B TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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6.12 Operating Characteristics

TA = 25℃ (1) PARAMETER Test Conditions Supply Voltage (VCCB = VCCA) TYP TYP TYP TYP TYP TYP CpdA (2) A to B: outputs enabled A Port CL = 0, RL = Open f = 10 MHz trise = tfall = 1 ns 2 2 2 2 2 3 pF A to B: outputs disabled 2 2 2 2 2 3 B to A: outputs enabled 12 12 12 13 13 16 B to A: outputs disabled 2 2 2 2 2 3 CpdB (3) A to B: outputs enabled B Port CL = 0, RL = Open f = 10 MHz trise = tfall = 1 ns 12 12 12 13 13 16 pF A to B: outputs disabled 2 2 2 2 2 3 B to A: outputs enabled 2 2 2 2 2 3 B to A: outputs disabled 2 2 2 2 2 3 (1) See the CMOS Power Consumption and Cpd Calculation application report for additional information about how power dissipation capacitance affects power consumption. (2) A-Port power dissipation capacitance per transceiver. (3) B-Port power dissipation capacitance per transceiver. www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TXU202-Q1

6.13 Typical Characteristics

I OH - Output High Current (mA) V OH - Output High Voltage (V) 0 3 6 9 12 15 18 21 24 1.5 1.75 2.25 2.5 2.75 3.25 3.5 3.75 4.25 4.5 4.75 V CC = 5.0V V CC = 3.3V V CC = 2.5V Figure 6-1. Typical (TA=25°C) Output High Voltage (VOH) vs Source Current (IOH) I OH - Output High Current (mA) V OH - Output High Voltage (V) 0.75 0.9 1.05 1.2 1.35 1.5 1.65 1.8 1.95 V CC = 1.8V V CC = 1.5V V CC = 1.2V Figure 6-2. Typical (TA=25°C) Output High Voltage (VOH) vs Source Current (IOH) I OL - Output Low Current (mA) V OL - Output Low Voltage (V) 0 3 6 9 12 15 18 21 24 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 0.275 0.3 0.325 0.35 V CC = 2.5V V CC = 3.3V V CC = 5.0V Figure 6-3. Typical (TA=25°C) Output Low Voltage (VOL) vs Sink Current (IOL) I OL - Output Low Current (mA) V OL - Output Low Voltage (V) 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 0.275 0.3 0.325 0.35 V CC = 1.2V V CC = 1.5V V CC = 1.8V Figure 6-4. Typical (TA=25°C) Output Low Voltage (VOL) vs Sink Current (IOL) V IN - Input Voltage (V) I CC - Supply Current (mA) 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 V CC = 2.5 V V CC = 3.3 V V CC = 5 V Figure 6-5. Typical (TA=25°C) Supply Current (ICC) vs Input Voltage (VIN) V IN - Input Voltage (V) I CC - Supply Current (mA) 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 V CC = 1.2 V V CC = 1.5 V V CC = 1.8 V Figure 6-6. Typical (TA=25°C) Supply Current (ICC) vs Input Voltage (VIN) TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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7 Parameter Measurement Information

7.1 Load Circuit and Voltage Waveforms

Unless otherwise noted, generators supply all input pulses that have the following characteristics:

  • f = 1 MHz
  • ZO = 50 Ω
  • Δt/ΔV ≤ 1 ns/V Output Pin Under Test CL (1) RL RL GND Open 2 x VCCO Measurement Point 1. CL includes probe and jig capacitance. Figure 7-1. Load Circuit Table 7-1. Load Circuit Conditions Parameter VCCO RL CL S1 VTP tpd Propagation (delay) time 1.1 V – 5.5 V 10 kΩ 5 pF Open N/A ten, tdis Enable time, disable time 1.1 V – 1.6 V 10 kΩ 5 pF 2 × VCCO 0.1 V 1.65 V – 2.7 V 10 kΩ 5 pF 2 × VCCO 0.15 V 3.0 V – 5.5 V 10 kΩ 5 pF 2 × VCCO 0.3 V ten, tdis Enable time, disable time 1.1 V – 1.6 V 10 kΩ 5 pF GND 0.1 V 1.65 V – 2.7 V 10 kΩ 5 pF GND 0.15 V 3.0 V – 5.5 V 10 kΩ 5 pF GND 0.3 V Input A, B VCCI (1) VCCI / 2 0 V Output B, A VOH (2) VOL (2) tpd tpd VCCI / 2 VCCI / 2 V CCI / 2 1. VCCI is the supply pin associated with the input port. 2. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1 Figure 7-2. Propagation Delay VCCI (1) 0 V 100 kHz 500 ps/V ± 1 s/V VOH (2) VOL (2) Ensure Monotonic Rising and Falling EdgeOutput B, A Input A, B 1. VCCI is the supply pin associated with the input port. 2. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1 Figure 7-3. Input Transition Rise and Fall Rate www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TXU202-Q1

Output(1) tdis GND VCCA / 2 VCCO (3) VOL (4)VOL + VTP ten VCCO / 2 Output(2) VOH (4) GND VOH - VTP VCCO / 2 OE 1. Output waveform on the condition that input is driven to a valid Logic Low. 2. Output waveform on the condition that input is driven to a valid Logic High. 3. VCCO is the supply pin associated with the output port. 4. VOH and VOL are typical output voltage levels with specified RL, CL, and S1. Figure 7-4. Enable Time And Disable Time TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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8 Detailed Description

8.1 Overview

The TXU0202-Q1 is a 4-bit translating transceiver that uses two individually configurable power-supply rails. The device is operational with VCCA and VCCB supplies as low as 1.1 V and as high as 5.5 V. Additionally, the device can be operated with V CCA = V CCB. The A port is designed to track V CCA, and the B port is designed to track VCCB. The TXU0202-Q1 device is designed for asynchronous communication between data buses, and transmits data with fixed direction from the A bus to the B bus on some channels and from the B bus to the A bus on the remaining channels. The output-enable input (OE) is used to disable the outputs so the buses are effectively isolated. The output-enable pin of the TXU0202-Q1 (OE) can be referenced to either V CCA or VCCB. The OE pin can be left floating or externally pulled down to ground to ensure the high-impedance state of the level shifter outputs during power up or power down. This device is fully specified for partial-power-down applications using the I off current. The Ioff protection circuitry ensures that no excessive current is drawn from or sourced into an input or output while the device is powered down. The VCC isolation or VCC disconnect feature ensures that if either VCC is less than 100 mV or disconnected with the complementary supply within recommended operating conditions, then the outputs disable and are set to the high-impedance state while the supply current is maintained. The I off-float circuitry ensures that no excessive current is drawn from or sourced into an input or output while the supply is floating. Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

8.2 Functional Block Diagram

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8.3 Feature Description

8.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns

Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum input voltage, given in the Absolute Maximum Ratings , and the maximum input leakage current, given in the Electrical Characteristics, using ohm's law (R = V ÷ I). The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics , which makes this device extremely tolerant to slow or noisy inputs. Driving the inputs slowly will increase dynamic current consumption of the device. See Understanding Schmitt Triggers for additional information regarding Schmitt-trigger inputs.

8.3.1.1 Inputs with Integrated Static Pull-Down Resistors

This device has 5 M Ω typical integrated weak pull-downs for each input. This feature allows all inputs to be left floating without the concern for unstable outputs or increased current consumption. This also helps to reduce external component count for applications where not all channels are used or need to be fixed low. If an external pull-up is required, it should be no larger than 1 MΩ to avoid contention with the 5 MΩ internal pull-down.

8.3.2 Control Logic (OE) with VCC(MIN) Circuitry

The output-enable input (OE) is used to disable the outputs so the buses are effectively isolated. The output-enable pin of the TXU0x04 has V CC(MIN) circuitry, which allows the OE pin to operate with the lower supply voltage. The Over-Voltage Tolerant Inputs feature allows the OE pin to operate with the higher supply voltage. This combination means that the enable pin can be referenced to either V CCA or V CCB supply. Multiple permutations of each device are possible since the controller can be placed on either the A or B port and can still control the enable pin.

8.3.3 Balanced High-Drive CMOS Push-Pull Outputs

A balanced output allows the device to sink and source similar currents. The high drive capability of this device creates fast edges into light loads, so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. The electrical and thermal limits that must be followed at all times are defined in Absolute Maximum Ratings.

8.3.4 VCC Isolation and VCC Disconnect

The outputs for this device disable and enter a high-impedance state when either supply is <100 mV or left floating (disconnected), with the complementary supply within the recommended operating conditions. It is recommended to keep the inputs low before floating (disconnecting) either supply. The I CCx(floating) in the Electrical Characteristics specifies the maximum supply current. The I off(float) in the Electrical Characteristics specifies the maximum leakage into or out of any input or output pin on the device. TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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Supply disconnected I CCB maintained Ioff(float)Ioff(float) OE VCCA VCCB B1YA1 VCC(MIN) Disabled VCCBVCCA GND Figure 8-1. VCC Disconnect Feature

8.3.5 Over-Voltage Tolerant Inputs

Input signals to this device can be driven above the supply voltage as long as they remain below the maximum input voltage value specified in the Recommended Operating Conditions.

8.3.6 Glitch-Free Power Supply Sequencing

Either supply rail may be powered on or off in any order without producing a glitch on the inputs or outputs (that is, where the output erroneously transitions to VCC when it should be held low or vice versa). Glitches of this nature can be misinterpreted by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device configuration of the peripheral, or even a false data initialization by the peripheral. www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TXU202-Q1

8.3.7 Negative Clamping Diodes

Figure 8-2 shows the inputs and outputs to this device that have negative clamping diodes. CAUTION Voltages beyond the values specified in the Absoulte Maximum Ratings table can cause damage to the device. The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. GND Level Shifter Input or I/O configured as input VCCA Device -IIK -IOK VCCB I/O configured as output Figure 8-2. Electrical Placement of Clamping Diodes for Each Input and Output

8.3.8 Fully Configurable Dual-Rail Design

The V CCA and V CCB pins can be supplied at any voltage from 1.1 V to 5.5 V, making the device suitable for

8.3.9 Supports High-Speed Translation

The TXU0202-Q1 device can support high data-rate applications. The translated signal data rate can be up to 200 Mbps when the signal is translated from 3.3 V to 5.0 V.

8.4 Device Functional Modes

Table 8-1. Function Table CONTROL INPUTS Port Status OPERATION OE Input Output H L L Unidirectional non-inverting voltage translation H H H Unidirectional non-inverting voltage translation L X Hi-Z Isolation TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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9 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

9.1 Application Information

The TXU0202-Q1 device can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The TXU0202-Q1 device is ideal for use in applications where a push-pull driver is connected to the data Inputs. The maximum data rate can be up to 200 Mbps when the device translates a signal from 3.3 V to 5.0 V.

9.2 Typical Application

5.0 V 1.8 V 0.1 µF 0.1 µF TXU0202 GND TX RX B2A2YRX TX Figure 9-1. TXU0202-Q1 LED Driver Application

9.2.1 Design Requirements

Use the parameters listed in Table 9-1 for this design example. Table 9-1. Design Parameters DESIGN PARAMETERS EXAMPLE VALUES Input voltage range 1.1 V to 5.5 V Output voltage range 1.1 V to 5.5 V

9.2.2 Detailed Design Procedure

To begin the design process, determine the following:

  • Input voltage range – Use the supply voltage of the device that is driving the TXU0202-Q1 device to determine the input voltage range. For a valid logic-high, the value must exceed the positive-going input-threshold voltage (VT+) of the input port. For a valid logic low the value must be less than the negative-going input-threshold voltage (VT-) of the input port.
  • Output voltage range – Use the supply voltage of the device that the TXU0202-Q1 device is driving to determine the output voltage range. www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TXU202-Q1

9.2.3 Application Curve

Figure 9-2. Up Translation at 1 MHz (1.2 V to 5 V)

10 Power Supply Recommendations

Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing without any supply sequencing requirements such as ramp order or ramp rate. Glitch-Free Power Supply Sequencing describes how this device was designed with various power supply sequencing methods in mind to help prevent unintended triggering of downstream devices. TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: TXU202-Q1

11 Layout

11.1 Layout Guidelines

To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended:

  • Use bypass capacitors on the power supply pins and place them as close to the device as possible. A 0.1 µF capacitor is recommended, but transient performance can be improved by having 1 µF and 0.1 µF capacitors in parallel as bypass capacitors.
  • The high drive capability of this device creates fast edges into light loads so routing and load conditions should be considered to prevent ringing.

11.2 Layout Example

0.1µF 01005 UART TX from MCU 0.1µF 01005 Copper TracesVia to VCCB Via to VCCA Via to GNDA B G Legend TXU0202DTT 4 5 A2Y VCCB OE GND VCCA G A B UART TX to Chip 4 mil G B1Y UART RX from Chip Figure 11-1. Layout Example – TXU0202-Q1 www.ti.com TXU202-Q1 SCES949 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: TXU202-Q1

12 Device and Documentation Support

12.1 Device Support

12.1.1 Regulatory Requirements

No statutory or regulatory requirements apply to this device. There are no special characteristics for this product.

12.2 Documentation Support

12.2.1 Related Documentation

  • Texas Instruments, Understanding Schmitt Triggers application report
  • Texas Instruments, CMOS Power Consumption and Cpd Calculation application report

12.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

12.4 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

12.5 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

12.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.7 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. TXU202-Q1 SCES949 – AUGUST 2022 www.ti.com

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Product Folder Links: TXU202-Q1

www.ti.com 22-Sep-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TXU0202QDCURQ1 ACTIVE VSSOP DCU 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TXU0202-Q1 : Addendum-Page 1

www.ti.com 22-Sep-2022

  • Catalog : TXU0202 NOTE: Qualified Version Definitions:
  • Catalog - TI's standard catalog product Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2022 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2022 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TXU0202QDCURQ1 VSSOP DCU 8 3000 180.0 180.0 18.0 Pack Materials-Page 2

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