TXS0102DCUR

TXS0102_10 TI | Alldatasheet

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FEATURES

(TOP VIEW)

1 B18

(BOTTOM VIEW) A2 54 A1 3 6 OEVCCA 2 7 VCCBGND

8 B11B2 A1

www.ti.com SCES640C JANUARY 2007 REVISED MAY 2009 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR FOR OPEN-DRAIN AND PUSH-PULL

APPLICATIONS

I C/SMBus Max Data Rates UART Mbps (Push Pull) GPIO Mbps (Open Drain) Available in the Texas Instruments NanoFree Package 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port CCA V CCB V CC Isolation Feature If Either V CC Input Is at GND, Both Ports Are in the High-Impedance State No Power-Supply Sequencing Required Either V CCA or V CCB Can Be Ramped First I off Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD A Port 2500-V Human-Body Model (A114-B) 250-V Machine Model (A115-A) 1500-V Charged-Device Model (C101) B Port 8-kV Human-Body Model (A114-B) 250-V Machine Model (A115-A) 1500-V Charged-Device Model (C101) This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the V CCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the V CCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. NanoFree, NanoStar are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2007 2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

1.8 V System Controller 3.3 V System 3.3 V1.8 V A2 B2 0.1 /C0109F0.1 /C0109F 1 /C0109F TXS0102 SCES640C JANUARY 2007 REVISED MAY 2009 www.ti.com ORDERING INFORMATION T A PACKAGE (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING (3) NanoStar WCSP (DSBGA) Reel of 3000 TXS0102YZPR 2H_ 0.23-mm Large Bump YZP Reel of 3000 TXS0102DCTR NFE_ C to C SSOP DCT Tube of 250 TXS0102DCTT NFE VSSOP DCU Reel of 3000 TXS0102DCUR NFE_ (1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com (3) DCT: The actual top-side marking has three additional characters that designate the year, month, and wafer fab/assembly site. DCU: The actual top-side marking has one additional character that designates the wafer fab/assembly site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the wafer fab/assembly site. Pin identifier indicates solder-bump composition SnPb, Pb-free). PIN

DESCRIPTION

NO. NAME TYPE FUNCTION DCT, YZP DCU I/O Input/output Referenced to V CCB GND GND Ground V CCA PWR A-port supply voltage. 1.65 V V CCA 3.6 V and V CCA V CCB I/O Input/output Referenced to V CCA I/O Input/output Referenced to V CCA Output enable (active High). Pull OE low to place all outputs in 3-state mode. OE Input Referenced to V CCA V CCB PWR B-port supply voltage. 2.3 V V CCB 5.5 V I/O Input/output Referenced to V CCB TYPICAL OPERATING CIRCUIT Submit Documentation Feedback Copyright 2007 2009, Texas Instruments Incorporated Product Folder Link(s): TXS0102

(1) RECOMMENDED OPERATING CONDITIONS (1) (2) TXS0102 www.ti.com SCES640C JANUARY 2007 REVISED MAY 2009 over recommended operating free-air temperature range (unless otherwise noted) MIN MAX UNIT V CCA Supply voltage range 0.5 4.6 V V CCB Supply voltage range 0.5 6.5 V A port 0.5 4.6 V I Input voltage range (2) V B port 0.5 6.5 A port 0.5 4.6 Voltage range applied to any output V O V in the high-impedance or power-off state (2) B port 0.5 6.5 A port 0.5 V CCA 0.5 V O Voltage range applied to any output in the high or low state (2) (3) V B port 0.5 V CCB 0.5 I IK Input clamp current V I mA I OK Output clamp current V O mA I O Continuous output current mA Continuous current through V CCA V CCB or GND 100 mA DCT package 220 θ JA Package thermal impedance (4) DCU package 227 C/W YZP package 102 T stg Storage temperature range 150 C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of V CCA and V CCB are provided in the recommended operating conditions table. (4) The package thermal impedance is calculated in accordance with JESD 51-7. V CCA V CCB MIN MAX UNIT V CCA Supply voltage (3) 1.65 3.6 V V CCB Supply voltage 2.3 5.5 V 1.65 V to 1.95 V V CCI 0.2 V CCI A-port I/Os 2.3 V to 5.5 V 2.3 V to 3.6 V V CCI 0.4 V CCI High-level V IH V input voltage B-port I/Os V CCI 0.4 V CCI 1.65 V to 3.6 V 2.3 V to 5.5 V OE input V CCA 0.65 5.5 A-port I/Os 0.15 Low-level V I L (4) B-port I/Os 1.65 V to 3.6 V 2.3 V to 5.5 V 0.15 V input voltage OE input V CCA 0.35 A-port I/Os, push-pull driving Input transition Δ Δ v B-port I/Os, push-pull driving 1.65 V to 3.6 V 2.3 V to 5.5 V ns/V rise or fall rate Control input T A Operating free-air temperature C (1) V CCI is the supply voltage associated with the input port. (2) V CCO is the supply voltage associated with the output port. (3) V CCA must be less than or equal to V CCB and V CCA must not exceed 3.6 (4) The maximum V IL value is provided to ensure that a valid V OL is maintained. The V OL value is V IL plus the voltage drop across the pass-gate transistor. Copyright 2007 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TXS0102

(1) (2) (3) TXS0102 SCES640C JANUARY 2007 REVISED MAY 2009 www.ti.com over recommended operating free-air temperature range (unless otherwise noted) T A C C to C TEST PARAMETER V CCA V CCB UNIT CONDITIONS MIN TYP MAX MIN MAX I OH µ V OHA 1.65 V to 3.6 V 2.3 V to 5.5 V V CCA 0.67 V V IB V CCB 0.4 V I OL mA, V OLA 1.65 V to 3.6 V 2.3 V to 5.5 V 0.4 V V IB 0.15 V I OH µ V OHB 1.65 V to 3.6 V 2.3 V to 5.5 V V CCB 0.67 V V IA V CCA 0.2 V I OL mA, V OLB 1.65 V to 3.6 V 2.3 V to 5.5 V 0.4 V V IA 0.15 V I I OE 1.65 V to 3.6 V 2.3 V to 5.5 V µ A A port V to 5.5 V µ A I off B port to 3.6 V V µ A I OZ A or B port 1.65 V to 3.6 V 2.3 V to 5.5 V µ A 1.65 V to V CCB 2.3 V to 5.5 V 2.4 V I V O open, I CCA 3.6 V V 2.2 µ A I O V 5.5 V 1.65 V to V CCB 2.3 V to 5.5 V V I V O open, I CCB 3.6 V V µ A I O V 5.5 V V I V CCI or GND, I CCA I CCB 1.65 V to V CCB 2.3 V to 5.5 V 14.4 µ A I O C I OE 3.3 V 3.3 V 2.5 3.5 pF A or B port 3.3 V 3.3 V C io A port pF B port 7.5 (1) V CCI is the V CC associated with the input port. (2) V CCO is the V CC associated with the output port. (3) V CCA must be less than or equal to V CCB and V CCA must not exceed 3.6 Submit Documentation Feedback Copyright 2007 2009, Texas Instruments Incorporated Product Folder Link(s): TXS0102

www.ti.com SCES640C JANUARY 2007 REVISED MAY 2009 over recommended operating free-air temperature range, V CCA 1.8 V 0.15 V (unless otherwise noted) V CCB 2.5 V V CC 3.3 V V CC V 0.2 V 0.3 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX Push-pull driving Data rate Mbps Open-drain driving Push-pull driving Pulse t w Data inputs ns duration Open-drain driving 500 500 500 over recommended operating free-air temperature range, V CCA 2.5 V 0.2 V (unless otherwise noted) V CCB 2.5 V V CC 3.3 V V CC V 0.2 V 0.3 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX Push-pull driving Data rate Mbps Open-drain driving Push-pull driving Pulse t w Data inputs ns duration Open-drain driving 500 500 500 over recommended operating free-air temperature range, V CCA 3.3 V 0.3 V (unless otherwise noted) V CC 3.3 V V CC V 0.3 V 0.5 V UNIT MIN MAX MIN MAX Push-pull driving Data rate Mbps Open-drain driving Push-pull driving t w Pulse duration Data inputs ns Open-drain driving 500 500 Copyright 2007 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TXS0102

www.ti.com over recommended operating free-air temperature range, V CCA 1.8 V 0.15 V (unless otherwise noted) V CCB 2.5 V V CCB 3.3 V V CCB V FROM TO 0.2 V 0.3 V 0.5 V PARAMETER TEST CONDITIONS UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX Push-pull driving 5.3 5.4 6.8 t PHL Open-drain driving 2.3 8.8 2.4 9.6 2.6 A B ns Push-pull driving 6.8 7.1 7.5 t PLH Open-drain driving 260 208 198 Push-pull driving 4.4 4.5 4.7 t PHL Open-drain driving 1.9 5.3 1.1 4.4 1.2 B A ns Push-pull driving 5.3 4.5 0.5 t PLH Open-drain driving 175 140 102 t en OE A or B 200 200 200 ns t dis OE A or B ns Push-pull driving 3.2 9.5 2.3 9.3 7.6 t rA A-port rise time ns Open-drain driving 165 132 Push-pull driving 10.8 2.7 9.1 2.7 7.6 t rB B-port rise time ns Open-drain driving 145 106 Push-pull driving 5.9 1.9 1.7 13.3 t fA A-port fall time Open-drain driving 4.4 6.9 4.3 6.4 4.2 6.1 ns Push-pull driving 2.9 13.8 2.8 16.2 2.8 16.2 t fB B-port fall time Open-drain driving 6.9 13.8 7.5 16.2 16.2 t SK(O) Channel-to-channel skew 0.7 0.7 0.7 ns Push-pull driving Max data rate Mbps Open-drain driving Submit Documentation Feedback Copyright 2007 2009, Texas Instruments Incorporated Product Folder Link(s): TXS0102

www.ti.com SCES640C JANUARY 2007 REVISED MAY 2009 over recommended operating free-air temperature range, V CCA 2.5 V 0.2 V (unless otherwise noted) V CCB 2.5 V V CCB 3.3 V V CCB V FROM TO 0.2 V 0.3 V 0.5 V PARAMETER TEST CONDITIONS UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX Push-pull driving 3.2 3.7 3.8 t PHL Open-drain driving 1.7 6.3 2.1 5.8 A B ns Push-pull driving 3.5 4.1 4.4 t PLH Open-drain driving 250 206 190 Push-pull driving 3.6 4.3 t PHL Open-drain driving 1.8 4.7 2.6 4.2 1.2 B A ns Push-pull driving 2.5 1.6 t PLH Open-drain driving 170 140 103 t en OE A or B 200 200 200 ns t dis OE A or B ns Push-pull driving 2.8 7.4 2.6 6.6 1.8 5.6 t rA A-port rise time ns Open-drain driving 149 121 Push-pull driving 3.2 8.3 2.9 7.2 2.4 6.1 t rB B-port rise time ns Open-drain driving 151 112 Push-pull driving 1.9 5.7 1.9 5.5 1.8 5.3 t fA A-port fall time ns Open-drain driving 4.4 6.9 4.3 6.2 4.2 5.8 Push-pull driving 2.2 7.8 2.4 6.7 2.6 6.6 t fB B-port fall time ns Open-drain driving 5.1 8.8 5.4 9.4 5.4 10.4 t SK(O) Channel-to-channel skew 0.7 0.7 0.7 ns Push-pull driving Max data rate Mbps Open-drain driving Copyright 2007 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TXS0102

www.ti.com over recommended operating free-air temperature range, V CCA 3.3 V 0.3 V (unless otherwise noted) V CCB 3.3 V V CCB V FROM TO 0.3 V 0.5 V PARAMETER TEST CONDITIONS UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX Push-pull driving 2.4 3.1 t PHL Open-drain driving 1.3 4.2 1.4 4.6 A B ns Push-pull driving 4.2 4.4 t PLH Open-drain driving 204 165 Push-pull driving 2.5 3.3 t PHL Open-drain driving 124 B A ns Push-pull driving 2.5 2.6 t PLH Open-drain driving 139 105 t en OE A or B 200 200 ns t dis OE A or B ns Push-pull driving 2.3 5.6 1.9 4.8 t rA A-port rise time ns Open-drain driving 116 Push-pull driving 2.5 6.4 2.1 7.4 t rB B-port rise time ns Open-drain driving 116 Push-pull driving 5.4 1.9 t fA A-port fall time ns Open-drain driving 4.3 6.1 4.2 5.7 Push-pull driving 2.3 7.4 2.4 7.6 t fB B-port fall time ns Open-drain driving 7.6 4.8 8.3 t SK(O) Channel-to-channel skew 0.7 0.7 ns Push-pull driving Max data rate Mbps Open-drain driving Submit Documentation Feedback Copyright 2007 2009, Texas Instruments Incorporated Product Folder Link(s): TXS0102

B Gate Bias One shot T2T1 VCCA VCCB A Gate Bias One- shot 10k 10k One shot One- shot TXS0102 www.ti.com SCES640C JANUARY 2007 REVISED MAY 2009 The TXS0102 can be used to bridge the digital-switching compatibility gap between two voltage nodes to successfully interface logic threshold levels found in electronic systems. It should be used in a point-to-point topology for interfacing devices or systems operating at different interface voltages with one another. Its primary target application use is for interfacing with open-drain drivers on the data I/Os such as I C or 1-wire, where the data is bidirectional and no control signal is available. The TXS0102 can also be used in a push-pull driver is connected to the data I/Os, but the TXB0102 might be a better option for such push-pull applications. The TXS0102 architecture (see Figure is an auto-direction-sensing based translator that does not require a direction-control signal to control the direction of data flow from A to B or from B to Figure Architecture of a TXS01xx Cell These two bidirectional channels independently determine the direction of data flow without a direction-control signal. Each I/O pin can be automatically reconfigured as either an input or an output, which is how this auto-direction feature is realized. The TXS0102 is part of TI's "Switch" type voltage translator family and employs two key circuits to enable this voltage translation: An N-channel pass-gate transistor topology that ties the A-port to the B-port and Output one-shot (O.S.) edge-rate accelerator circuitry to detect and accelerate rising edges on the A or B ports For bidirectional voltage translation, pull-up resistors are included on the device for dc current sourcing capability. The V GATE gate bias of the N-channel pass transistor is set at approximately one threshold voltage T above the V CC level of the low-voltage side. Data can flow in either direction without guidance from a control signal. The O.S. rising-edge rate accelerator circuitry speeds up the output slew rate by monitoring the input edge for transitions, helping maintain the data rate through the device. During a low-to-high signal rising edge, the O.S. circuits turn on the PMOS transistors (T1, T2) to increase the current drive capability of the driver for approximately ns or 95% of the input edge, whichever occurs first. This edge-rate acceleration provides high ac drive by bypassing the internal 10-k Ω pull-up resistors during the low-to-high transition to speed up the signal. The output resistance of the driver is decreased to approximately Ω to Ω during this acceleration phase. To minimize dynamic I CC and the possibility of signal contention, the user should wait for the O.S. circuit to turn-off before applying a signal in the opposite direction. The worst-case duration is equal to the minimum pulse-width number provided in the Timing Requirements section of this data sheet. Copyright 2007 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TXS0102

www.ti.com The continuous dc-current "sinking" capability is determined by the external system-level open-drain (or push-pull) drivers that are interfaced to the TXS0102 I/O pins. Since the high bandwidth of these bidirectional I/O circuits is used to facilitate this fast change from an input to an output and an output to an input, they have a modest dc-current "sourcing" capability of hundreds of micro-Amps, as determined by the internal 10-k Ω pullup resistors. The fall time fA t fB of a signal depends on the edge-rate and output impedance of the external device driving TXS0102 data I/Os, as well as the capacitive loading on the data lines. Similarly, the t PHL and max data rates also depend on the output impedance of the external driver. The values for t fA t fB t PHL and maximum data rates in the data sheet assume that the output impedance of the external driver is less than Ω TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay on for approximately ns. The maximum capacitance of the lumped load that can be driven also depends directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic I CC load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance that the TXS0102 output sees, so it is recommended that this lumped-load capacitance be considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level affects. During operation, ensure that V CCA V CCB at all times. The sequencing of each power supply will not damage the device during the power up operation, so either power supply can be ramped up first. The TXS0102 has an OE input that is used to disable the device by setting OE low, which places all I/Os in the Hi-Z state. The disable time dis indicates the delay between the time when OE goes low and when the outputs are disabled (Hi-Z). The enable time en indicates the amount of time the user must allow for the one-shot circuitry to become operational after OE is taken high. Each A-port I/O has an internal 10-k Ω pullup resistor to V CCA and each B-port I/O has an internal 10-k Ω pullup resistor to V CCB If a smaller value of pullup resistor is required, an external resistor must be added from the I/O to V CCA or V CCB (in parallel with the internal 10-k Ω resistors). Adding lower value pull-up resistors will effect V OL levels, however. The internal pull-ups of the TXS0102 are disabled when the OE pin is low. Submit Documentation Feedback Copyright 2007 2009, Texas Instruments Incorporated Product Folder Link(s): TXS0102

/charBnZrBnZrBnZrBnZrBnZrBnZrBnZrBnZrUnder Test LOAD CIRCUIT FOR ENABLE/DISABLE TIME MEASUREMENT 2 × VCCO Open 50 k/C0087 tPLH tPHL Output Control (low-level enabling) Output W aveform 1 S1 at 2 × VCCO (see Note B) Output W aveform 2 S1 at GND (see Note B) tPZL tPZH tPLZ tPHZ VCCA /2VCCA /2 VCCI 0 V VCCO /2 VOH VOL 0 V 0.1 /C0121 VCCO VCCO /2 0.9 /C0121 VCCO VCCO /2 0 V VCCI 0 V VCCI/2 V CCI/2 tw Input VCCA VCCO VOLT AGE W AVEFORMS PROPAGA TION DELA Y TIMES VOLT AGE W AVEFORMS PULSE DURA TION VOLT AGE W AVEFORMS ENABLE AND DISABLE TIMES Output Input tPZL /tPLZ tPHZ /tPZH 2 × VCCO Open TEST S1 A. C L includes probe and jig capacitance. B. W aveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR/C011810 MHz, ZO = 50 W , dv/dt ≥/charBnZrBnZrBnZrBnZrBnZrBnZrBnZrBnZr1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. V CCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. J. All parameters and waveforms are not applicable to all devices. 50 k/C0087

1 M/C008715 pF

DAT A RA TE, PULSE DURA TION, PROPAGA TION DELA Y, OUTPUT RISE AND F ALL TIME MEASUREMENT USING A PUSH-PULL DRIVER VCCOVCCI DUT IN OUT DAT A RA TE, PULSE DURA TION, PROPAGA TION DELA Y, OUTPUT RISE AND F ALL TIME MEASUREMENT USING AN OPEN-DRAIN DRIVER VCCOVCCI DUT IN OUT VCCI/2 V CCI/2 0.9 /C0121 VCCO VCCO /2 tr 0.1 /C0121 VCCO tf TXS0102 www.ti.com SCES640C JANUARY 2007 REVISED MAY 2009 Figure Load Circuit and Voltage Waveforms Copyright 2007 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TXS0102

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TXS0102DCTR ACTIVE SM8 DCT 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCTRE4 ACTIVE SM8 DCT 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCTT ACTIVE SM8 DCT 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCTTE4 ACTIVE SM8 DCT 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCTTG4 ACTIVE SM8 DCT 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCUR ACTIVE US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCURG4 ACTIVE US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCUT ACTIVE US8 DCU 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102DCUTG4 ACTIVE US8 DCU 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TXS0102YZPR ACTIVE DSBGA YZP 8 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 6-Jan-2010 Addendum-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 6-Jan-2010 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TXS0102DCUR US8 DCU 8 3000 202.0 201.0 28.0 TXS0102YZPR DSBGA YZP 8 3000 220.0 220.0 34.0 PACKAGE MATERIALS INFORMATION www.ti.com 6-Jan-2010 Pack Materials-Page 2

MPDS049B – MAY 1999 – REVISED OCTOBER 2002 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ 0,60 0,20 0,25 0° – 8° 0,15 NOM Gage Plane 4188781/C 09/02 4,25 0,30 0,15 2,90 3,752,70 3,15 2,75 0,10 0,00 1,30 MAX Seating Plane 0,10 M0,130,65 PIN 1 INDEX AREA NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion D. Falls within JEDEC MO-187 variation DA.

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