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Document overview

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Technical content

Features

  • NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N combination), PAL (60), SECAM with automatic format detection
  • T h r e e 1 0 - b i t A D C s a n d analog clamping circuit
  • Fully programmable static gain or automatic gain control for the CVBS channel
  • Programmable white peak control for the Y or CVBS channel
  • Software selectable analog inputs allows composite, S-video, analog YPbPr or RGB
  • High quality adaptive 2D comb filter for both NTSC and PAL inputs
  • PAL delay line for color phase error correction
  • Image enhancement with 2D dynamic peaking/CTI
  • Digital subcarrier PLL for accurate color decoding
  • Programmable hue, brightness, saturation, contrast, sharpness
  • Selectable differential or single-ended CVBS input
  • Digital horizontal PLL and advanced synchronization processing for VCR playback and weak signal performance
  • High quality horizontal and ve rtical filtered down scaling with arbitrary scale down ratio
  • Up to 2CH differential or 4CH single ended CVBS input

FIGURE 1. FUNCTIONAL BLOCK DIAGRAM

2 FN8645.2 April 20, 2015 Submit Document Feedback Intersil products are manufactured, assembled and tested utilizing ISO9001 or TS16949 quality systems as applicable noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com For additional products, see www.intersil.com/en/products.html Features (Continued) Analog RGB Inputs

  • Triple high speed 10-bit ADCs with clamping and programmable gain amplifier
  • SOG and H/VSYNC support for YPbPr or RGB input
  • Built-in line locked PL L with sync separator
  • Supports input resolution up to 1080p Digital Inputs Support
  • Supports both BT.656 and 601 video formats
  • Supports YCbCr/RGB 24-bit input (bidirectional) up to 1080p resolution
  • Single channel LVDS input up to 720p resolution
  • Supports RGB 565 + BT.656 at the same time TFT Panel Support
  • Built-in programmable timing controller
  • Supports 3, 4, 6 or 8 bits per pixel up to 16.8 million colors with built-in dithering engine
  • Supports digital panels (TTL) or single channel LVDS panels up to WXGA (1366x768) resolution, 85MHz
  • Supports serial (8-bit) RGB panel Font Based On Screen Display
  • Eight window font OSD with bordering/shadow
  • 10kB programmable font RAM and 512 display RAM
  • 1/2/3/4 bits/pixels
  • Supports variable width (12/16), height (2~32) SPI Flash Based On Screen Display
  • 9 bitmap based OSD windows in 2 layers through SPI with alpha blending between layers
  • Supports 4/6/8 bits/pixels
  • Supports RLE decompression for two windows Image Processing
  • High quality scaler with both up/down and panorama/water-glass scaling support
  • Built-in 2D deinterlacing function
  • Programmable brightness, contrast, saturation, hue and sharpness
  • Programmable color transient improvement control
  • Supports programmable cropping of input video and graphics
  • Independent RGB gain and offset controls
  • D T V h u e a d j u s t m e n t
  • Programmable 8-bit gamma correction for each color
  • B l a c k / w h i t e s t r e t c h Clock Generation
  • Spread spectrum profile based on triangular modulation with center spread
  • Programmable modulation frequency and spread width Timing Controller (TCON)
  • Supports programmable interface signals for control
  • Column (source) driver/row (gate) driver MCU
  • Industry standard 8052 based
  • Code fetch from external SPI flash memory
  • 256B code cache
  • 2 k X D A T A m e m o r y
  • Supports power save mode with 32k internal clock
  • ISP (In System Programming) through I
  • Supports 24-bit addressing BT.656 Output
  • Independent ITU-R 656 compatible YCbCr(4:2:2) output format
  • Supports progressive ITU-R 656 output format for both interlaced and progressive inputs
  • ITU-R 656 output generated from decoder, ARGB, DRGB and post scaling path Touch Screen Controller
  • Built-in 4-wire resistive touch screen
  • 1 2 – b i t A D C
  • 4 channel auxiliary input Miscellaneous
  • Supports Fast mode I 2C interface up to 400kHz
  • Short diagnostics:
  • S h o r t - t o - b a t t e r y
  • S h o r t - t o - g r o u n d
  • U p t o 4 P W M s
  • G P I O s
  • 1.8V/3.3V internal operation
  • 1.8V I/O support
  • P o w e r - d o w n m o d e
  • S i n g l e 2 7 M H z c r y s t a l
  • 128 Ld LQFP with exposed thermal pad and 172 ball TFBGA package
  • TW8836AT-LB2-GE is AEC-Q100 qualified