TW8834 INTERSIL | Alldatasheet
Document overview
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Technical content
Features
NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N combination), PAL (60), SECAM with automatic format detection 10-bit ADC and analog clamping circuit Fully programmable static gain or automatic gain control for CVBS channel Programmable white peak control for the CVBS channel High quality adaptive 2D comb filter for both NTSC and PAL inputs PAL delay line for color phase error correction Image enhancement with 2D dynamic peaking/CTI Digital subcarrier PLL for accurate color decoding Programmable hue, brightness, saturation, contrast, sharpness Selectable differential or single-ended CVBS input Digital horizontal PLL and advanced synchronization processing for VCR playback and weak signal performance High quality horizontal and vertical filtered down scaling with arbitrary scale down ratio Up to 3CH differential or 6CH single ended CVBS input Digital Inputs Support Supports both BT.656 and 601 video formats with H/VSYNC Supports RGB 24-bit input up to 1080p resolution Single channel LVDS (open LDI) input up to 720p resolution TFT Panel Support Built-in programmable timing controller Supports 3, 4, 6 or 8 bits per pixel up to 16.8 million colors with built-in dithering engine Supports digital panels (TTL) or single channel LVDS panels up to WXGA (1366 x 768) resolution, 85MHz Supports serial (8-bit) RGB panel Timing Controller (TCON) Supports programmable interface signals for control Column (source) driver/row (gate) driver BT.656 Output Independent ITU-R 656 compatible YCbCr(4:2:2) output format ITU-R 656 output generated from decoder, LVDS, DRGB and post scaling path Max 148.5MHz with 3.3V, 74MHz with 1.8V Font Based On Screen Display Four window font OSD with bordering/shadow 6912B programmable font RAM and 512 display RAM 1/2/3/4 bits/pixel Supports variable width (12/16), height (2~32) Image Processing High quality scaler with both up/down and panorama/water-glass scaling support
For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9001 or TS16949 quality systems as applicable noted in the quality certifications found at http://www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see http://www.intersil.com Built-in 2D deinterlacing function Programmable brightness, contrast, saturation, hue and sharpness Programmable color transient improvement control Supports programmable cropping of input video and graphics Independent RGB gain and offset controls DTV hue adjustment Programmable 8-bit Gamma correction for each color Black/white stretch Clock Generation Spread spectrum profile based on triangular modulation with center spread Programmable modulation frequency and spread width Miscellaneous Supports Fast Mode Plus I2C interface up to 1.2Mbps Short diagnostics: Short-to-battery Short-to-ground Up to 3 PWM outputs GPIOs 1.8V internal operation 1.8V DTV input support 1.8V/3.3V BT.656 output support Hardware mute pin Single 27MHz crystal 100 pin TQFP TW8834AT-TA2-GR is AEC qualified TW8834 Functional Block Diagram YIN0+ / YIN0 YIN0- / YIN1 10bit ADC 2D Comb Decoder CSC Font OSD Dither Gamma OUT MUX TCON TCON Signals TTL 24/18bit OSC SSPLL Registers I2C Diagnostic PWM GPIO IRQ YIN2+ / YIN2 YIN2- / YIN3 BT.656 Encoder BT.656 M U X I N M U X DTV Interface DRGB888 Scaler 2D-DI AAF Image Enhancer Timing Gen. GenLock PLL LVDS LVDS Measurement DIAG0 / YIN4+ / YIN4 LVDS-RXLVDS IRQ Sharing pins Sharing pinsDIAG1 / YIN4- / YIN5