TVL-55682D101U-LW-I-AAN

TVL-55682D101U-LW-I-AAN KSS | Alldatasheet

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Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 1/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 1 of 33 Product Information To: Product Name: TVL-55682D101U-LW-I-AAN Document Issue Date: 2013/02/21 Note: 1. Please contact Kyocera Display before designing your product based on this product. 2. The information contained herein is presented merely to indicate the characteristics and performance of our products. No responsibility is assumed by KYOCERA DISPLAY for any intellectual property claims or other problems that may result from application based on the module described herein.

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 2/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 2 of 33 FQ-7-30-0-009-02C Revision Date Page Old Description New Description Remark 00 2011/05/10 All -- First issued

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 3/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 3 of 33

Contents

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 4/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 4 of 33

1 General Descriptions

1.1 Introduction

The TVL-55682AAN is a Color Active Matrix Thin Film Transistor (TFT) Liquid Crystal Display (LCD) module, which uses amorphous Silicon TFT as a switching device. It is composed of a TFT LCD panel, a timing controller, voltage reference, common voltage, column driver, and row driver circuit. This TFT LCD has a 10.1-inch (diagonally measured) active display area with WSVGA resolution (1,024 vertical by 600 horizontal pixel array).

1.2 Features

■ 10.1” TFT LCD Panel ■ LED Light-bar Backlight System ■ Supports WSVGA (V:1,024 lines, H:600 pixels) Resolution ■ Compatible with RoHS Standard

1.3 Product Summary

Items Specifications Unit Remark Screen Diagonal 10.1 inch Active Area 222.72(H) x 125.28(V) mm Pixels(H x V) 1,024 (x3) x 600 - Pixel Pitch 0.2175(H) x 0.2088(V) mm Pixel Arrangement R.G.B. Vertical Stripe - Display Mode TN Mode, Normally White - White Luminance 200 (Typ.) cd/ m 2

5 Points Average,

Contrast Ratio 500 (Typ.) - Response Time 8 (Typ.) ms View Angle(L/R/U/D) 45/45/15/35 (Typ.) - Input Voltage +3.3 (Typ.) V Power Consumption 2.4 Watt Black Pattern Module Weight 190 (Max.) g Outline Dimension(H x V x D) 235.5(H) x 143.5(V) x 5.2(D) (Max.) mm Electrical Interface (Logic) LVDS - Support Color 262 K - NTSC 45 (Typ.) % Optimum Viewing Direction 6 o’clock - Surface Treatment Anti-Glare -

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 5/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 5 of 33

1.4 Functional Block Diagram

Figure 1 shows the functional block diagram of the LCD module. Figure 1 Block Diagram

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1.5 Pixel Format Image

Figure 2 shows the relationship of the input signals and LCD pixel format image. Figure 2 Pixel Format

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2 Absolute Maximum Ratings

The followings are maximum values which, if exceeded, may cause faulty operation or damage to the LCD module. Table 1 Item Symbol Min. Max. Unit Conditions Supply Voltage V DD -0.3 4.0 V - Supply V_LED Voltage V _LED 5 21 V - Input Signal - -0.3 2.7 V LVDS Signals Operating Temperature TOP 0 50 ℃ Note(3) Operating Humidity HOP 10 80 %RH Note(3) Storage Temperature TST -20 60 ℃ Note(3) Storage Humidity HST 10 90 %RH Note(3) Level - 1.5 G Vibration Bandwidth - 10 ～500Hz Hz 30min. for X, Y, Z axis Shock Level - 220 G Half Sine Waveform, 2ms LED Current I _LED - 20.5 mA Per LED Note (1)Maximum Wet-Bulb should be 39 ℃ and No condensation. (2)When you apply the LCD module for OA system, please make sure to keep the temperature of LCD module under 60 ℃. (3)Storage /Operating temperature & humidity:

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 8/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 8 of 33

3 Electrical Specification

3.1 Electrical Characteristics

Table 2 Electrical Characteristics Symbol Parameter Min. Typ. Max. Units Condition VDD Logic/LCD Drive Voltage 3 3.3 3.6 V Note (1) IDD VDD Current - 160 - mA Black Pattern, 60Hz PDD VDD Power - - 0.53 W Black Pattern, 60Hz Irush Rush Current - - 2 A Note (2) VDD rp Allowable Logic/LCD Drive Ripple Voltage - - 300 mVp-p V_LED LED Input 5 12 21 V - VF LED Forward Voltage 2.95 3.3 3.4 V - IF LED Forward Current 19.5 20 20.5 mA - PLED LED Power Consumption - - 1.87 W Note(3) LT LED Life Time 10,000 - - Hours Note(4) High 2 3.3 3.6 V VPWM_EN PWM Signal Voltage Low 0 - 0.5 V FPWM Output PWM Frequency - 200 1K Hz - High 2 3.3 3.6 V V_LED_EN LED Enable Voltage Low 0 - 0.5 V PWM PWM Duty Ratio 5 - 100 % - Note: (1)VDD Power Dip Condition

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3.2 Interface Connector

Table 3 Connector Name / Designation Manufacturer I-PEX (or equivalent) Mating Receptacle/Part Number 20453-040T(I-PEX) Table 4 Signal Pin Assignment Pin # Signal Name Description Remarks

1 GND Ground

2 V DD Power Supply 3.3V (Typ.) 3 V DD Power Supply 3.3V (Typ.) 4 V EDID EDID +3.3V Power

5 NC Not Connected(Reserve) LCD panel self test ena ble

6 CLK _EDID EDID Clock Input

7 DAT _EDID EDID Data Input

8 RXin0- －LVDS Differential Data Input(R0-R5,G0)

9 RXin0+ ＋LVDS Differential Data Input(R0-R5,G0)

10 GND Ground

11 RXin1- －LVDS Differential Data Input(G1-G5,B0-B1)

12 RXin1+ ＋LVDS Differential Data Input(G1-G5,B0-B1)

13 GND Ground

14 RXin2- －LVDS Differential Data Input(B2-B5,HS,VS,DE)

15 RXin2+ ＋LVDS Differential Data Input(B2-B5,HS,VS,DE)

16 GND Ground

17 CLKN- －LVDS Differential Clock Input

18 CLKN+ ＋LVDS Differential Clock Input

19 NC Not Connected(Reserve)

20 NC Not Connected(Reserve)

21 NC Not Connected(Reserve)

22 GND Ground-Shield

23 NC Not Connected(Reserve)

24 NC Not Connected(Reserve)

25 GND Ground-Shield

26 NC Not Connected(Reserve)

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27 NC Not Connected(Reserve)

28 GND Ground-Shield

29 NC Not Connected(Reserve)

30 NC Not Connected(Reserve)

31 V _LED_GND LED Ground

32 V _LED_GND LED Ground

33 V _LED_GND LED Ground

34 NC Not Connected(Reserve)

35 V PWM_EN System PWM Logic Input Level

36 V _LED_EN LED Enable Input Level(+3.3V)

37 NC Not Connected(Reserve)

38 V _LED LED Power Supply 5-21V

39 V _LED LED Power Supply 5-21V

40 V _LED LED Power Supply 5-21V

Note: All input signals shall be at low or Hi-Z state when V DD is off.

3.3 LVDS Receiver

3.3.1 Signal Electrical Characteristics For LVDS Receiver

The built-in LVDS receiver is compatible with (ANSI/TIA/TIA-644 ) standard. Table 5 LVDS Receiver Electrical Characteristics Parameter Symbol Min. Typ. Max. Unit Conditions Differential Input High Threshold V th - - +100 mV Vcm =+1.2V Differential Input Low Threshold V tl -100 - - mV Vcm =+1.2V Magnitude Differential Input Voltage |V id | 100 - 600 mV Common Mode Voltage V cm |Vid/2|+0.6 1.2 1.8-|Vid/2| V Common Mode Voltage Offset ∆Vcm - - 50 mV Vcm =+1.2V Note: (1)Input signals shall be at low or Hi-Z state when VDD is off. (2)All electrical characteristics for LVDS signal are defined and shall be measured at the interface connector of LCD. (3)All values are measured at condition of V DD =3.3V and Ta=25 ℃.

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3.3.2 LVDS Receiver Internal Circuit

Figure 8 LVDS Receiver Internal Circuit shows the internal block diagram of the LVDS receiver. This LCD module equips termination resistors for LVDS link. Figure 8 LVDS Receiver Internal Circuit

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3.4 Interface Timings

Parameter Symbol Unit Min. Typ. Max. LVDS Clock Frequency(single) F dck MHz 44.4 50.4 65.2 H Total Time H total Clocks 1,320 1,344 1,362 H Active Time H ac Clocks 1,024 1,024 1,024 V Total Time V total Lines 612 625 638 V Active Time V ac Lines 600 600 600 Frame Rate V sync Hz 55 60 65 Figure 9 Timing Characteristics

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 15/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 15 of 33 Note: TES is data enable signal setup time.

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3.5 Power ON/OFF Sequence

VDD power, interface signals, and lamp on/off sequence are showing on Figure 10. Signals shall be Hi-Z state or low level when VDD is off. Figure 10 Table 7 Power Sequencing Requirements Parameter Symbol Min. Typ. Max. Unit VDD Rising Time T1 0.5 - 10 ms VDD Good to Signal Valid T2 30 - 90 ms Signal Valid to Backlight on T3 200 - - ms Backlight Power on Time T4 0.5 - - ms Backlight V DD Good to System PWM on T5 10 - - ms System PWM on to Backlight Enable on T6 10 - - ms Backlight Enable off to System PWM off T7 0 - - ms System PWM off to B/L Power Disable T8 10 - - ms Backlight Power off Time T9 - 10 30 ms Backlight off to Signal Disable T10 200 - - ms Signal Disable to Power Down T11 0 - 50 ms VDD Falling Time T12 - 10 30 ms Power off T13 500 - - ms

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4 Optical Characteristics

The optical characteristics are measured under stable conditions as following notes. Table 8 Optical Characteristics Specification Item Conditions Min. Typ. Max. Unit Note Left 40 45 - Deg. Horizontal Right 40 45 - Deg. Up 10 15 - Deg. Viewing Angle [degrees] K=Contrast Ratio>10 Vertical Down 30 35 - Deg. (1),(2) Contrast Ratio Center 400 500 - - (1),(3) Rising - 3 - ms Falling - 5 - ms Response Time Rising + Falling - 8 16 ms (1),(4) Red x 0.579 - (1) Red y 0.346 - (1) Green x 0.336 - (1) Green y 0.560 - (1) Blue x 0.156 - (1) Blue y Typ. -0.03 0.123 Typ. +0.03 - (1) White x 0.283 0.313 0.343 - (1) Color Chromaticity (CIE1931) White y 0.299 0.329 0.359 - (1) White Luminance [cd/m^2] I_LED =20mA, 13points 62.5 - - Luminance Uniformity [%] I_LED =20mA, 5points 80.0 - - - (1), (6) Note: (1) Measurement Setup The LCD module should be stabilized at 25℃ for 15 minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 19/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 19 of 33 (3)Definition of Contrast Ratio (CR) The contrast ratio can be calculated by the following expression Contrast Ratio (CR) = L63 / L0 L63: Luminance of gray level 63, L0: Luminance of gray level 0 (4)Definition of Response Time (T R , T F) Figure 13 Definition of Response Time (5)Definition of Luminance White Measure the luminance of gray level 63 at 5 points(Fig.14). Center of Luminance = Y1 Average Luminance of 5 points = (6)Definition of Luminance Uniformity(Variation) Measure the luminance of gray level 63 at 13 points. Uniformity of 13 points = x 100% Uniformity of 5 points = x 100% Y 1 + Y 2 + Y 3 + Y 4 + Y 5 Min Luminance of Y1~Y13 Max Luminance of Y1~Y13 Max Luminance of Y1~Y5 Min Luminance of Y1~Y5

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 20/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 20 of 33 10mm 10mm 10mm 10mm 1/4 H 1/2 H 3/4 H 1/4 V 1/2 V 3/4 V Y 1 Y 11 Y 5 Y 4 Y 2 Y 12 Y 13 Y 8 Y 7 Y 6 Y 9 Y 10 Y 3 Figure 14 Measurement Locations of 13 Points

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5 Mechanical Characteristics

Figure 15 Reference Outline Drawing (Front Side)

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5.1 Dimension Specifications

Width 235.00±0.5 mm Height 143.00±0.5 mm Thickness(Max.) 5.2 mm X 226.47±0.5 mm Bezel Opening Y 128.48±0.5 mm Weight(Max.) 190 g BM Width ︱a-b︱ & ︱c-d︱ ≤1.0 mm a b Bezel opening Active area c d

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6 Package Specification

(40pcs)

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7 Lot Mark

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7.1 Lot Mark

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Code 1,2,4,5,6,7,8,9,10,11,16: KYOCERA DISPLAY internal flow control code. Code 3: Production Location. Code 12: Production Year. Code 13: Production Month. Code 14,15: Production Date. Code 17,18,19,20: Serial Number. Note (1) Production Year Year 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 Mark 6 7 8 9 A B C D E F Note (2) Production Month Month Jan. Mark 1 2 3 4 5 6 7 8 9 A B C 7.2 23 product barcode 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Code 1,2: MD Module Domain. Code 3,4,5,6,7: KYOCERA DISPLAY Internal Module Name. Code 8,9,10,13,16: KYOCERA DISPLAY Internal Flow Control Code. Code 11,12: Cell location “Suzhou” is defined as “SZ”. Code 14 ,15: Module line “kunshan” is defined as” KS”. Code 17,18,19 : Year, Month, Day Refer to KYOCERA DISPLAY Barcode Note(1),Note(2) in Page22. Code 20~23 : Serial Number.

8 General Precaution

8.1 Use Restriction

This product is not authorized for use in life supporting systems, aircraft navigation control systems, military systems and any other application where performance failure could be life-threatening or otherwise catastrophic.

8.2 Handling Precaution

1) Please mount LCD module by using mounting holes arranged in four corners tightly. 2) Do not disassemble or modify the module. It may damage sensitive parts inside LCD module, and may cause scratches or dust on the display. KYOCERA DISPLAY does not warrant the module, if customers disassemble or modify the module.

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 27/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 27 of 33 3) If LCD panel is broken and liquid crystal spills out, do not ingest or inhale liquid crystal, and do not contact liquid crystal with skin. If liquid crystal contacts mouth or eyes, rinse out with water immediately. If liquid crystal contacts skin or cloths, wash it off immediately with alcohol and Rinse thoroughly with water. 4) Disconnect power supply before handling LCD module. 5) Refrain from strong mechanical shock and /or any force to the module. 6) Do not exceed the absolute maximum rating values, such as the supply voltage variation, input voltage variation, variation in parts’ parameters, environmental temperature; etc otherwise LCD module may be damaged. It’s recommended employing protection circuit for power supply. 7) Do not touch, push or rub the polarizer with anything harder than HB pencil lead. And please do not rub with dust clothes with chemical treatment. Do not touch the surface of polarizer for bare hand or greasy cloth. (Some cosmetics are detrimental to the polarizer.) 8) When the surface is dusty, please wipe gently with absorbent cotton or other soft Material. When cleaning the adhesives, please use absorbent cotton wetted with a little petroleum benzene. Normal-hexane is recommended for cleaning the adhesives used to attach front/ rear polarizer. Do not use acetone, toluene and alcohol because they cause chemical damage to the polarizer. 9) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes deformations and color fading. 10) Protection film must be removed very slowly from the surface of LCD module to prevent from electrostatic occurrence. 11) Because LCD module uses CMOS-IC on circuit board and TFT-LCD panel, it is very weak to electrostatic discharge, Please be careful with electrostatic discharge .Persons who handle the module should be grounded through adequate methods. 12) Do not adjust the variable resistor located on the module.

8.3 Storage Precaution

1) Please do not leave LCD module in the environment of high humidity and high temperature for a long time. 2) The module shall not be exposed under strong light such as direct sunlight. Otherwise, Display characteristics may be changed. 3) The module should be stored in a dark place. It is prohibited to apply sunlight or fluorescent light in storage.

8.4 Operation Precaution

1) Do not connect or disconnect the module in the "Power On” condition. 2) Power supply should always be turned on/off by 9.0 "Power on/off sequence". 3) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference should be done by system manufacturers. Grounding and shielding methods may be important to minimize the interference. 4) After installation of the TFT Module into an enclosure, do not twist nor bend the TFT Module even momentary. At designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the TFT Module from outside.

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8.5 Others

1) Ultra-violet ray filter is necessary for outdoor operation. 2) Avoid condensation of water which may result in improper operation or disconnection of electrode. 3) If the module keeps displaying the same pattern for a long period of time, the image may be "Sticked" to the screen. 4) This module has its circuitry PCB on the rear side and should be handled carefully in order not to be stressed.

8.6 Disposal

When disposing LCD module, obey the local environmental regulations.

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9 EDID Data Structure

Address Address Field Name & Comments Value Value Value (Decimal) (HEX) (HEX) (BIN) (DEC) 0 0 Header 00 00000000 0 1 1 Header FF 11111111 255 2 2 Header FF 11111111 255 3 3 Header FF 11111111 255 4 4 Header FF 11111111 255 5 5 Header FF 11111111 255 6 6 Header FF 11111111 255 7 7 Header 00 00000000 0 8 8 Manufacture Code 26 00100110 38 9 9 Manufacture Code CF 11001111 207 10 0A Product Code F4 11110100 244 11 0B Product Code 03 00000011 3 12 0C LCD module Serial No –(“0” if not used) 00 00 000000 0 13 0D LCD module Serial No –(“0” if not used) 00 00 000000 0 14 0E LCD module Serial No –(“0” if not used) 00 00 000000 0 15 0F LCD module Serial No –(“0” if not used) 00 00 000000 0 16 10 Week of Manufacture 0A 00001010 10 17 11 Year of Manufacture 14 00010100 20 18 12 EDID Structure Ver # = 1 01 00000001 1 19 13 EDID revision # = 3 03 00000011 3 20 14 Video I/P definition = Digital I/P (80h) 80 1 0000000 128 21 15 Max H Image Size = (Rounded to cm) 16 0001011 0 22 22 16 Max V Image Size = (Rounded to cm) 0D 00001101 13 23 17 Display Gamma 78 01111000 120 24 18 Feature Support ( No DPMS, Active off, RGB, 0A 00001010 10

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 30/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 30 of 33 Timing BLK 1) 25 19 Red/Green Low bits (RxRy/GxGy) 21 00100001 33 26 1A Blue/White Low bits (BxBy/WxWy) D0 11010000 208 27 1B Red X Rx 94 10010100 148 28 1C Red Y Ry 58 01011000 88 29 1D Green X Gx 56 01010110 86 30 1E Green Y Gy 8F 10001111 143 31 1F Blue X Bx 27 00100111 39 32 20 Blue Y By 1F 00011111 31 33 21 White X Wx 50 01010000 80 34 22 White Y Wy 54 01010100 84 35 23 Established timings 1 (00h if not used) 00 00 000000 0 36 24 Established timing 2 (00h if not used) 00 000 00000 0 37 25 Manufacturer's timings (00h if not used) 00 0 0000000 0 38 26 Standard timing ID1 (01h if not used) 01 0000 0001 1 39 27 Standard timing ID1 (01h if not used) 01 0000 0001 1 40 28 Standard timing ID2 (01h if not used) 01 0000 0001 1 41 29 Standard timing ID2 (01h if not used) 01 0000 0001 1 42 2A Standard timing ID3 (01h if not used) 01 0000 0001 1 43 2B Standard timing ID3 (01h if not used) 01 0000 0001 1 44 2C Standard timing ID4 (01h if not used) 01 0000 0001 1 45 2D Standard timing ID4 (01h if not used) 01 0000 0001 1 46 2E Standard timing ID5 (01h if not used) 01 0000 0001 1 47 2F Standard timing ID5 (01h if not used) 01 0000 0001 1 48 30 Standard timing ID6 (01h if not used) 01 0000 0001 1 49 31 Standard timing ID6 (01h if not used) 01 0000 0001 1 50 32 Standard timing ID7 (01h if not used) 01 0000 0001 1 51 33 Standard timing ID7 (01h if not used) 01 0000 0001 1 52 34 Standard timing ID8 (01h if not used) 01 0000 0001 1 53 35 Standard timing ID8 (01h if not used) 01 0000 0001 1 54 36 Pixel Clock LSB B0 10110000 176 55 37 Pixel Clock HSB 13 00010011 19

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 31/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 31 of 33 56 38 Horizontal Active (lower 8 bits) 00 00000000 0 57 39 Hor blanking (lower 8 bits) 40 01000000 64 58 3A Horizontal Active/Horizontal blanking (upper4:4 bits) 41 01000001 65 59 3B Vertical active(lower 8 bits) 58 01011000 88 60 3C Vertical blanking(lower 8 bits) 19 00011001 25 61 3D Vertical Active : Vertical Blanking (upper4:4 bits) 20 00100000 32 62 3E Horizontal Sync Offset 30 00110000 48 63 3F Horizontal Sync Pulse Width 20 00100000 32 64 40 Vertical Sync Offset , Sync Width 3A 0011101 0 58 65 41 Horizontal Vertical Sync Offset/Width upper 2 bits 00 00000000 0 66 42 Horizontal Image Size DF 11011111 223 67 43 Vertical Image Size 7D 01111101 125 68 44 Horizontal Image Size / Vertical image size 0 0 00000000 0 69 45 Horizontal Border = (0 for Notebook LCD) 00 0 0000000 0 70 46 Vertical Border = (0 for Notebook LCD) 00 000 00000 0 71 47 Non-interlaced, Normal, No stereo, Separate sync, H/V Pol Negatives, 19 00011001 25 72 48 Timing Descriptor #2 00 00000000 0 73 49 00 00000000 0 74 4A 00 00000000 0 75 4B 0F 00001111 15 76 4C 00 00000000 0 77 4D 00 00000000 0 78 4E 00 00000000 0 79 4F 00 00000000 0 80 50 00 00000000 0 81 51 00 00000000 0 82 52 00 00000000 0 83 53 00 00000000 0

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 32/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 32 of 33 84 54 00 00000000 0 85 55 00 00000000 0 86 56 00 00000000 0 87 57 00 00000000 0 88 58 00 00000000 0 89 59 Module revision 01 00000001 1 90 5A Detailed timing/monitor descriptor#3 00 00000 000 0 91 5B Flag 00 00000000 0 92 5C Flag 00 00000000 0 93 5D FE (hex) defines ASCII string FE 11111110 254 94 5E Flag 00 00000000 0 95 5F Manufacture I 49 01001001 73 96 60 Manufacture n 6E 01101110 110 97 61 Manufacture f 66 01100110 102 98 62 Manufacture o 6F 01101111 111 99 63 Manufacture v 56 01010110 86 100 64 Manufacture i 69 01101001 105 101 65 Manufacture s 73 01110011 115 102 66 Manufacture i 69 01101001 105 103 67 Manufacture o 6F 01101111 111 104 68 Manufacture n 6E 01101110 110 105 69 New line character indicates end of ASCII string 0A 00001010 10 106 6A 20 00100000 32 107 6B 20 00100000 32 108 6C Detailed timing/monitor descriptor #4 00 000 00000 0 109 6D 00 00000000 0 110 6E 00 00000000 0 111 6F FE (hex) defines ASCII string FE 11111110 254 112 70 Flag 00 00000000 0 113 71 Manufacture P/N 4D 01001101 77 114 72 Manufacture P/N 31 00110001 49

Document Title TVL-55682D101U-LW-I-AAN Product Spec ification Page No. 33/33 Document No. Issue Date 2013/02/21 Revision 00 KYOCERA DISPLAY CORPORATION 5-7-18,Higashi Nippori, Tel: +81-3-5811-8780 Arakawa-ku, Tokyo, Japan 116-0014 Fax:+81-3-5811-8782 Page 33 of 33 115 73 Manufacture P/N 30 00110000 48 116 74 Manufacture P/N 31 00110001 49 117 75 Manufacture P/N 4E 01001110 78 118 76 Manufacture P/N 57 01010111 87 119 77 Manufacture P/N 54 01010100 84 120 78 Manufacture P/N 32 00110010 50 121 79 Manufacture P/N 20 00100000 32 122 7A Manufacture P/N 52 01010010 82 123 7B Manufacture P/N 32 00110010 50 124 7C New line character indicates end of ASCII string 20 00100000 32 125 7D 0A 00001010 10 126 7E Extension Flag = 00 00 00000000 0 127 7F Checksum 11 00010001 17