TSZ151 STM | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 39

Technical content

Datasheet sections

  • 1 Pin description
  • 1.1 TSZ151 single operational amplifier (SC70-5)
  • 1.2 TSZ151 single operational amplifier (SOT23-5)
  • 1.3 TSZ152 dual operational amplifier
  • 2 Maximum ratings
  • 3 Electrical characteristics
  • 4 Typical performance characteristics
  • 5 Application information
  • 5.1 Operating voltages
  • 5.3 Maximum power dissipation
  • 5.4 PCB layout recommendations
  • 5.5 Decoupling capacitor
  • 5.6 Macromodel
  • 6 Typical applications
  • 6.1 Low-side current sensing
  • 7 Package information
  • 7.1 SC70-5 (or SOT323-5) package information
  • 7.2 SOT23-5 package information
  • 7.3 SO8 package information
  • 7.4 MiniSO8 package information
  • 7.5 DFN8 2 x 2 wettable flank package information
  • 8 Ordering information

Features

  • Very high accuracy and stability: offset voltage – 7 µV max. at 25 °C – 10 µV over full temperature range (-40 °C to 125 °C)
  • Rail-to-rail input and output
  • Low supply voltage: from 1.8 to 5.5 V
  • Low power consumption: 210 µA at 5 V
  • Gain bandwidth product: 1.6 MHz
  • Extended temperature range: -40 to 125 °C
  • AEC-Q100 qualified
  • Benefits: – Higher accuracy without calibration – Accuracy is virtually unaffected by temperature change

Applications

  • High accuracy signal conditioning
  • Automotive current measurement and sensors signal conditioning

Description

The TSZ151 and TSZ152 are single and dual operational amplifiers featuring very low offset voltages with virtually zero-drift versus temperature changes. The TSZ151 and TSZ152 are single and dual offers rail-to-rail input and output, an excellent speed/power consumption ratio, and 1.6 MHz gain bandwidth product, while consuming just 210 µA at 5 V. The device also features an ultra-low input bias current. These features make the TSZ151 and TSZ152 are ideal for high-accuracy sensor interfaces. Product status link Channel Automotive Package TSZ151ICT 1 SC70-5 TSZ151IYCT 1 • SC70-5 TSZ151ILT 1 SOT23-5 TSZ151IYLT 1 • SOT23-5 TSZ152IDT 2 SO8 TSZ152IYDT 2 • SO8 TSZ152IST 2 MiniSO8 TSZ152IYST 2 • MiniSO8 TSZ152IQT 2 DFN8 TSZ152IYQT 2 • DFN8

Related products

Zero drift amplifier for more power savings (400 kHz, 31 µA) TSZ181 TSZ182 Zero drift amplifier for higher bandwidth (3 MHz, 800 µA) Very high accuracy (7 µV) high bandwidth (1.6 MHz) zero-drift 5 V op amp TSZ151, TSZ152 Datasheet DS14459 - Rev 4 - January 2025 For further information, contact your local STMicroelectronics sales office.

1 Pin description

1.1 TSZ151 single operational amplifier (SC70-5)

Figure 1. Pin connection (top view) Table 1. Pin description

1 IN+ Non-inverting input channel

2 VCC- Negative supply voltage

3 IN- Inverting input channel

4 OUT Output channel

5 VCC+ Positive supply voltage

1.2 TSZ151 single operational amplifier (SOT23-5)

Figure 2. Pin connection (top view) Table 2. Pin description

1 OUT Output channel

3 IN+ Non-inverting input channel

4 IN- Inverting input channel

1.3 TSZ152 dual operational amplifier

Figure 3. Pin connections (top view)

  1. The exposed pad of the DFN8 2x2 can be connected to VCC- or left floating.

Table 3. Pin description

1 OUT1 Output channel

2 IN1- Inverting input channel

3 IN1+ Non-inverting input channel

4 VCC- Negative supply voltage

5 IN2+ Non-inverting input channel

6 IN2- Inverting input channel

7 OUT2 Output channel

8 VCC+ Positive supply voltage

2 Maximum ratings

Table 4. Absolute maximum ratings

  1. All voltage values are with respect to the VCC- pin, unless otherwise specified.
  2. The maximum input voltage value may be extended on the condition that the input current is limited to ±10 mA.
  3. Rth-ja is a typical value, obtained with PCB according to JEDEC 2s2p without vias.
  4. Human body model: HBM test according to the standard ESDA-JS-001-2017.
  5. Human body model: HBM test according to the standard AEC-Q100-002.

Table 5. Operating conditions

3 Electrical characteristics

Table 6. Electrical characteristics at VCC = 5 V, Vicm = VOUT = VCC / 2, T = 25 °C (unless otherwise specified), RL and CL (if any specified) connected to VCC / 2.

Electrical characteristics

Symbol Parameter Conditions Min. Typ. Max. Unit GBP Gain bandwidth product CL = 100 pF 1.6 MHz SR Slew rate (2) measured from 10% to 90% AV = 1 V/V, Vin = 0.3 V to VCC+ -0.3 V, RL = 10 kΩ, CL = 100 pF

0.8 V/µs

Φm Phase margin CL = 100 pF 60 degrees en Input voltage noise density f = 1 kHz 27 nV/√Hz en p-p Input noise voltage 0.1 Hz ≤ f ≤ 10 Hz 0.5 µVpp trec Overload recovery time Vin from (VCC+ +100 mV) to (VCC+ -1 V) , VOUT measured at (VCC+ -100 mV), AV = +1 5 µs tinit Initialization time, VOUT at 100 mV from final value T = 25 °C 80 µs EMIRR EMI rejection rate = -20 log (VRFpeak/ΔVio) VRF = 100 mVpp, f = 400 MHz 84 dB VRF = 100 mVpp, f = 900 MHz 87 VRF = 100 mVpp, f = 1800 MHz 90 VRF = 100 mVpp, f = 2400 MHz 91 TSZ151, TSZ152

Table 7. Electrical characteristics at VCC = 3.3 V, Vicm = VOUT = VCC / 2, T = 25 °C (unless otherwise specified), RL and CL (if any specified) connected to VCC / 2.

Symbol Parameter Conditions Min. Typ. Max. Unit EMIRR EMI rejection rate = -20 log (VRFpeak/ΔVio) VRF = 100 mVpp, f = 1800 MHz dB VRF = 100 mVpp, f = 2400 MHz 91 TSZ151, TSZ152

Table 8. Electrical characteristics at VCC = 1.8 V, Vicm = VOUT = VCC / 2, T = 25 °C (unless otherwise specified), RL and CL (if any specified) connected to VCC / 2.

Symbol Parameter Conditions Min. Typ. Max. Unit EMIRR EMI rejection rate = -20 log (VRFpeak/ΔVio) VRF = 100 mVpp, f = 1800 MHz dB VRF = 100 mVpp, f = 2400 MHz 91 1. See Section 5.2. 2. The slew rate value is the average of rising and falling values. TSZ151, TSZ152 DS14459 - Rev 4 page 10/39

4 Typical performance characteristics

Figure 4. Input offset voltage distribution at VCC = 1.8 V Figure 5. Input offset voltage distribution at VCC = 3.3 V Figure 6. Input offset voltage distribution at VCC = 5 V Figure 7. Input offset voltage vs. supply voltage

Figure 40. Slew rate vs. temperature Figure 41. Noise vs. time at VCC = 5 V Figure 42. Voltage noise density vs. frequency at Figure 43. Voltage noise density vs. frequency at

Figure 48. Very large signal step response at VCC = 5 V

1 V/div

Figure 49. Output voltage saturation response at Figure 50. Positive overvoltage recovery at VCC = 1.8 V Figure 51. Positive overvoltage recovery at VCC = 5 V

Figure 52. Negative overvoltage recovery at VCC = 1.8 V Figure 53. Negative overvoltage recovery at VCC = 5 V Figure 54. Settling time on negative input step Figure 55. Settling time on positive input step

5 Application information

5.1 Operating voltages

V, and 5 V power supplies. However, the parameters are very stable over the full VCC range and several characterization curves show the TSZ151 and TSZ152 devices characteristics over the full operating range. Additionally, the main specifications are guaranteed in an extended temperature range from -40 to 125 °C. 5.2 Input offset voltage drift vs. temperature The maximum input voltage drift variation vs. temperature is defined as the offset variation related to the offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset (Vio) is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift vs. temperature enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift vs. temperature is computed using equation 1. Δ V i o Δ T = V i o _ T − V i o _ 25° C T − 25° C T = − 40 ° C an d T = 125 ° C (1) The datasheet minimum and maximum values are guaranteed by a measurement on a representative sample size ensuring a Cpk (process capability index) greater than 1.3.

5.3 Maximum power dissipation

The usable output load current drive is limited by the maximum power dissipation allowed by the device package. The absolute maximum junction temperature for the TSZ151 is 150 °C. The junction temperature can be estimated as follows: T J = P D × θ J A + T A (2) TJ is the die junction temperature. PD is the power dissipated in the package. θJA is the junction to thermal resistance of the package. TA is the ambient temperature. The power dissipated in the package PD is the sum of the quiescent power dissipated and the power dissipated by the output stage transistor. It is calculated as follows: PD = (VCC × ICC) + (VCC+ − VOUT) × IOUT when the op amp is sourcing the current. PD = (VCC × ICC) + (VOUT − VCC−) × IOUT when the op amp is sinking the current. Do not exceed the 150 °C maximum junction temperature for the device. Exceeding the junction temperature limit can cause degradation in the parametric performance or even destroy the device.

5.4 PCB layout recommendations

Particular attention must be paid to the layout of the PCB tracks connected to the amplifier, load, and power supply. The power and ground traces are critical as they must provide adequate energy and grounding for all circuits. The best practice is to use short and wide PCB traces to minimize voltage drops and parasitic inductance. In addition, to minimize parasitic impedance over the entire surface, use a multi-via technique that connects the bottom and top layer ground planes together in many locations. The copper traces that connect the output pins to the load and supply pins should be as wide as possible to minimize trace resistance.

5.5 Decoupling capacitor

In order to ensure op amp full functionality, it is mandatory to place a decoupling capacitor of at least 22 nF as close as possible to the op amp supply pin. A good decoupling helps to reduce an electromagnetic interference impact. TSZ151, TSZ152

Application information

DS14459 - Rev 4 page 26/39

5.6 Macromodel

Accurate macromodels of the TSZ151 and TSZ152 device are available on the STMicroelectronics website at: www.st.com. These models are a trade-off between the accuracy and complexity (that is, time simulation) of the TSZ151 and TSZ152 operational amplifiers. They emulate the nominal performance of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements. TSZ151, TSZ152 DS14459 - Rev 4 page 27/39

6 Typical applications

6.1 Low-side current sensing

circuit ground. The resulting voltage drop is amplified using the TSZ151 and TSZ152. Figure 62. Low-side current sensing schematic

7 Package information

To meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions, and product status are available at: www.st.com. ECOPACK is an ST trademark. TSZ151, TSZ152

Package information

DS14459 - Rev 4 page 29/39

7.1 SC70-5 (or SOT323-5) package information

Figure 63. SC70-5 (or SOT323-5) package outline Table 9. SC70-5 (or SOT323-5) package mechanical data DS14459 - Rev 4 page 30/39

7.2 SOT23-5 package information

Figure 64. SOT23-5 package outline Table 10. SOT23-5 mechanical data DS14459 - Rev 4 page 31/39

7.3 SO8 package information

Figure 65. SO8 package outline Table 11. SO-8 mechanical data

  1. Values in inches are converted from mm and rounded to 4 decimal digits.

DS14459 - Rev 4 page 32/39

7.4 MiniSO8 package information

Figure 66. MiniSO8 package outline Table 12. MiniSO8 package mechanical data DS14459 - Rev 4 page 33/39

7.5 DFN8 2 x 2 wettable flank package information

Figure 67. DFN8 2 x 2 wettable flank package outline DS14459 - Rev 4 page 34/39

Table 13. DFN8 2 x 2 wettable flank package mechanical data Figure 68. DFN8 2 x 2 wettable flank recommended footprint DS14459 - Rev 4 page 35/39

8 Ordering information

Table 14. Order codes

  1. Qualification and characterization according to AEC Q100 and Q003 or the equivalent, advanced screening according to

("Quality & Reliability" tab on www.st.com).

Ordering information

DS14459 - Rev 4 page 36/39

Revision history

Table 15. Document revision history 13-Oct-2023 1 Initial release. 20-Nov-2023 2 Added new Section 4. Updated figure and description on the cover page, Section 8. Section 7.4 and Section 7.5.

IMPORTANT NOTICE – READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2025 STMicroelectronics – All rights reserved TSZ151, TSZ152 DS14459 - Rev 4 page 39/39