TSV782 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 32
Technical content
Datasheet sections
- 1 Pin description
- 1.1 TSV782 dual operational amplifier
- 2 Absolute maximum ratings and operating conditions
- 3 Electrical characteristics
- 4 Typical performance characteristics
- 5 Application information
- 5.1 Operating voltages
- 5.2 Input offset voltage drift over the temperature
- 5.3 Long term input offset voltage drift
- 5.4 Unused channel
- 5.5 EMI rejection
- 5.6 Maximum power dissipation
- 5.7 Capacitive load and stability
- 5.8 Resistor values for high speed op amp design
- 5.9 PCB layout recommendations
- 5.10 Decoupling capacitor
- 5.11 Macromodel
- 6 Typical applications
- 6.1 Low-side current sensing
- 6.2 Photodiode transimpedance amplification
- 7 Package information
- 7.1 DFN8 2x2 package information
- 7.2 MiniSO8 package information
- 7.3 SO8 package information
- 8 Ordering information
Features
- Gain bandwidth product 30 MHz, unity gain stable
- Slew rate 20 V/µs
- Low input offset voltage 50 µV typ., 200 µV max.
- Low input bias current: 2 pA typ.
- Low input voltage noise density 7 nV/√Hz @ 10 kHz
- Wide supply voltage range: 2.0 V to 5.5 V
- Rail-to-rail input and output
- Extended temperature range: -40 °C to +125 °C
- Automotive grade version available
- Benefits: – Accuracy of measurement virtually unaffected by noise or input bias current – Signal conditioning for high frequencies
Applications
- High bandwidth low-side and high-side current sensing
- Photodiode transimpedance amplification
- A/D converters input buffers
- Power management in solar-powered systems
- Power management in HEV and EV
Description
The TSV782 is a 30 MHz-bandwidth unity-gain-stable amplifier. The rail-to-rail input stage and the slew rate of 20 V/µs make the TSV782 ideal for low-side current measurement. The TSV78x can operate from 2.0 V to 5.5 V single supply and it is fully specified on a load of 47 pF, therefore allowing easy usage as A/D converters input buffer. The TSV78x series offers rail-to-rail input and output, excellent speed/power consumption ratio, and 30 MHz gain bandwidth product, while consuming just 3.3 mA at 5 V. The devices also feature an ultra-low input bias current that enables connection to photodiodes and other sensors where current is the key value to be measured. These features make the TSV78x series ideal for high-accuracy, high-bandwidth sensor interfaces. Product status link Channel Automotive Package TSV782IQ2T 2 DFN8 TSV782IST 2 MiniSO8 TSV782IDT 2 SO8 TSV782IYST 2 • MiniSO8 TSV782IYDT 2 • SO8
Related products
TSV7722 22 MHz low-rail input op amp for more power savings TSV772 20 MHz rail-to-rail op amp for more power savings TSV792 50 MHz rail-to-rail op amp for higher gain bandwidth High bandwidth (30 MHz) low offset (200 µV) rail-to-rail 5 V op amp TSV782 Datasheet DS14011 - Rev 3 - December 2022 For further information contact your local STMicroelectronics sales office.
1 Pin description
1.1 TSV782 dual operational amplifier
Figure 1. Pin connections (top view)
- The exposed pad of the DFN8 2x2 can be connected to VCC- or left floating.
Table 1. Pin description
1 OUT1 Output channel 1
2 IN1- Inverting input channel 1
3 IN1+ Non-inverting input channel 1
4 VCC- Negative supply voltage
5 IN2+ Non-inverting input channel 2
6 IN2- Inverting input channel 2
7 OUT2 Output channel 2
8 VCC+ Positive supply voltage
2 Absolute maximum ratings and operating conditions
Table 2. Absolute maximum ratings
- All voltage values are with respect to the VCC- pin, unless otherwise specified.
- The maximum input voltage differential value may be extended to the condition that the input current is limited to ±10 mA.
- R th-ja is a typical value, obtained with PCB according to JEDEC 2s2p without vias.
- Human body model: HBM test according to the standard ESDA-JS-001-2017.
- Human body model: HBM test according to the standard AEC-Q100-002.
- Charged device model: the test CDM is done according to the standard AEC-Q100-011.
Table 3. Operating conditions
3 Electrical characteristics
Table 4. Electrical characteristics at VCC = 5 V, Vicm = VOUT = VCC / 2, T = 25 °C, CL = 47 pF and RL = 10 kΩ connected to VCC / 2 (unless otherwise specified).
Electrical characteristics
Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product RL = 10 kΩ 23 30 MHz SR Slew rate RL = 10 kΩ, AV = 1 V/V, 10% to 90% 17 20 V/µs trec Overload recovery time VOUT = 100 mV from rail, AV = +1 V/V 170 ns CR Cross talk VOUT = 4 Vpp, RL = 10 kΩ, AV = +101 V/V, f = 1 kHz 120 dB Φm Phase margin 47 degrees GM Gain margin 9 dB en Input voltage noise density f = 10 kHz 7 nV/√Hz f = 1 kHz 14 en p-p Input noise voltage 0.1 Hz ≤ f ≤ 10 Hz 9 µVpp Cin Input capacitance Differential 6.3 pF Common mode 1.6 TSV782
Table 5. Electrical characteristics at VCC = 3.3 V, Vicm = VOUT = VCC / 2, T = 25 °C, CL = 47 pF and RL = 10 kΩ connected to VCC / 2 (unless otherwise specified).
Symbol Parameter Conditions Min. Typ. Max. Unit trec Overload recovery time VOUT 100 mV from rail, AV = +1 V/V 180 ns Φm Phase margin 45 degrees GM Gain margin 9 dB en Input voltage noise density f = 10 kHz 7 nV/√Hz f = 1 kHz 14 Cin Input capacitance Differential 6.3 pF Common mode 1.6 TSV782
Table 6. Electrical characteristics at VCC = 2.0 V, Vicm = VOUT = VCC / 2, T = 25 °C, CL = 47 pF and RL = 10 kΩ connected to VCC / 2 (unless otherwise specified).
Symbol Parameter Conditions Min. Typ. Max. Unit en Input voltage noise density f = 10 kHz 13 nV/√Hz f = 1 kHz 35 Cin Input capacitance Differential 6.3 pF Common mode 1.6 1. Guaranteed by design and characterization on a sample of parts, not tested in production TSV782
4 Typical performance characteristics
RL = 10 kΩ connected to VCC / 2 and CL = 47 pF, unless otherwise specified. Figure 2. Supply current vs. supply voltage Figure 3. Input offset voltage distribution at VCC = 5 V Figure 4. Input offset voltage distribution at VCC = 2 V Figure 5. Input offset voltage vs. temperature at VCC = 5 V
5 Application information
5.1 Operating voltages
power supplies. However, the parameters are very stable over the full VCC range and several characterization curves show the TSV782 device characteristics over the full operating range. Additionally, the main specifications are guaranteed in extended temperature range from -40 to 125 °C.
5.2 Input offset voltage drift over the temperature
The maximum input voltage drift variation overtemperature is defined as the offset variation related to the offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset (Vio) is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift overtemperature enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift overtemperature is computed using Eq. (1). ∆ V i o ∆ T = max V i o T − V i o 25 ° C T − 25° C T = − 40 ° C an d T = 125 ° C (1) The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk (process capability index) greater than 1.3.
5.3 Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
- Voltage acceleration, by changing the applied voltage
- Temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. The voltage acceleration has been defined based on JEDEC results, and is defined using Eq. (2). A F V = e β . V S − V U (2) Where: AFV is the voltage acceleration factor β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1) VS is the stress voltage used for the accelerated test VU is the voltage used for the application The temperature acceleration is driven by the Arrhenius model, and is defined in Eq. (3). A F T = e E a k . 1 T U − 1 T S (3) Where: AFT is the temperature acceleration factor Ea is the activation energy of the technology based on the failure rate k is the Boltzmann constant (8.6173 x 10-5 eV . K-1) TU is the temperature of the die when VU is used (K) TS is the temperature of the die undertemperature stress (K) The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and the temperature acceleration factor (Eq. (4)). A F = A F T . A F V (4) AF is calculated using the temperature and voltage defined in the mission profile of the product. The AF value can then be used in Eq. (5) to calculate the number of months of use equivalent to 1000 hours of reliable stress duration. TSV782
Application information
DS14011 - Rev 3 page 17/32
Mo n t ℎ s = A F × 1000 ℎ × 12 m on t ℎ s / 24 ℎ × 365.25 d ay s (5) To evaluate the op amp reliability, a follower stress condition is used where VCC is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules). The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at different measurement conditions (see Eq. (6)). V C C = m ax V o p wi t ℎ V i c m = V c c 2 (6) The long term drift parameter ΔVio (in µV.month-1/2), estimating the reliability performance of the product, is obtained using the ratio of the Vio (input offset voltage value) drift over the square root of the calculated number of months (Eq. (7)). ∆ V i o = V i o d ri f t m on t ℎ s (7) Where Vio drift is the measured drift value in the specified test conditions after 1000 h stress duration. The Vio final drift, in µV, to be measured on the device in real operation conditions can be computed from Eq. (8). V i o f i na l dr i f t t o p , T op , V C C = ∆ V i o . t o p . e β . V C C − V CC n o m . e E a k . 1 297 − 1 T o p (8) Where: ΔVio is the long term drift parameter in µV.√month top is the operating time seen by the device, in months Top is the operating temperature VCC is the power supply during operating time VCC nom is the nominal VCC at which the ΔVio is computed (5 V for TSV782) Ea is the activation energy of the technology (here 0.7 eV).
5.4 Unused channel
When one of the two channels of the TSV782 is not used, it must be properly connected in order to avoid internal oscillations that can negatively impact the signal integrity on the other channel, as well as the current consumption. Two different configurations can be used: Gain configuration: the channel can be set in gain, the input can be set to any voltage within the Vicm operating range. Comparator configuration: the channel can be set to a comparator configuration (without negative feedback). In this case, positive and negative inputs can be set to any value provided these values are significantly different (100 mV or more, to avoid oscillation between positive and negative state) and the differential input is lower than the maximum specified in the operating range (maximum 2 V), or the input current is limited to less than 10 mA to avoid damaging the circuit.
5.5 EMI rejection
The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational amplifiers. An adverse effect that is common to many op amps is a change in the offset voltage as a result of RF signal rectification. EMIRR is defined in Eq. (9): E MIR R = 20 . l o g V i n pp ∆ V i o (9) The TSV782 has been specially designed to minimize susceptibility to EMIRR and shows a low sensitivity. As visible in Figure 41, EMI rejection ratio has been measured on both inputs and output, from 400 MHz to 2.4 GHz. TSV782 Unused channel DS14011 - Rev 3 page 18/32
Figure 41. EMIRR on In+ and In- pins supply and output pins. These capacitances help minimize the impedance of these nodes at high frequencies.
5.6 Maximum power dissipation
The usable output load current drive is limited by the maximum power dissipation allowed by the device package. θJA is the junction to ambient thermal resistance of the package. TA is the ambient temperature. P D = V C C × I C C + V C C + − V O U T × I Lo ad when the op amp is sourcing the current. P D = V C C × I C C + V OU T − V C C − × I Lo ad when the op amp is sinking the current. can cause degradation in the parametric performance or even destroy the device.
5.7 Capacitive load and stability
high values produces gain peaking in the frequency response, with overshoot and ringing in the step response. Generally, unity gain configuration is the worst situation for stability and the ability to drive large capacitive loads.
Figure 42. Test configuration for RISO Please note that RISO = 22 Ω is sufficient to make the TSV782 stable whatever the capacitive load.
5.8 Resistor values for high speed op amp design
mitigated by lowering the resistive impedances. resistor (Rf), typically 600 Ω. Figure 43. Inverting amplifier configuration with parasitic input capacitances currents are very low. Furthermore, this resistor can also interact with the input capacitances to generate a pole. The frequency of this pole should be kept higher than the closed-loop bandwidth frequency. evaluation of the application circuit.
5.9 PCB layout recommendations
Particular attention must be paid to the layout of the PCB tracks connected to the amplifier, load, and power supply. The power and ground traces are critical as they must provide adequate energy and grounding for all circuits. The best practice is to use short and wide PCB traces to minimize voltage drops and parasitic inductance. In addition, to minimize parasitic impedance over the entire surface, a multi-via technique that connects the bottom and top layer ground planes together in many locations is often used. The copper traces that connect the output pins to the load and supply pins should be as wide as possible to minimize trace resistance.
5.10 Decoupling capacitor
In order to ensure op amp full functionality, it is mandatory to place a decoupling capacitor of at least 22 nF as close as possible to the op amp supply pin. A good decoupling helps to reduce electromagnetic interference impact.
5.11 Macromodel
Accurate macromodels of the TSV782 device are available on the STMicroelectronics’ website at: www.st.com. These models are a trade-off between accuracy and complexity (that is, time simulation) of the TSV782 operational amplifier. They emulate the nominal performance of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements. TSV782 PCB layout recommendations DS14011 - Rev 3 page 21/32
6 Typical applications
6.1 Low-side current sensing
circuit ground. The resulting voltage drop is amplified using the TSV782 (see Figure below). Figure 44. Low-side current sensing schematic
6.2 Photodiode transimpedance amplification
Figure 45. Photodiode transimpedance amplifier circuit The feedback resistance is usually in the MΩ range, in order to get a large enough voltage output range. capacitor in parallel with the feedback resistor is mandatory to stabilize the circuit. op amp macromodel, or by prototyping. For more details on tuning this circuit, please read the application note AN4451.
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
7.1 DFN8 2x2 package information
Figure 46. DFN8 2x2 package outline Table 7. DFN8 2x2 package mechanical data
Package information
DS14011 - Rev 3 page 24/32
Figure 47. DFN8 2x2 recommended footprint Note: The exposed pad of the DFN8 2x2 can be connected to VCC- or left floating.
7.2 MiniSO8 package information
Figure 48. MiniSO8 package outline Table 8. MiniSO8 package mechanical data
7.3 SO8 package information
Figure 49. SO8 package outline Table 9. SO8 mechanical data
Figure 50. SO8 recommended footprint
8 Ordering information
Table 10. Order code
- Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 &
"Quality & Reliability" tab on www.st.com.
Ordering information
DS14011 - Rev 3 page 29/32
Revision history
Table 11. Document revision history 04-Jul-2022 1 Initial release. 02-Aug-2022 2 Added new Section 4 Typical performance characteristics.
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