TSH310 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 19
Technical content
December 2004 Revision 2 1/19 ■ OptimWattTM device featuring ultra-low consumption, 2mW, and low quiescent current, 400µA ■ Bandwidth: 120MHz (Gain=2) ■ Slew rate: 115V/µs ■ Specified on 1kΩ ■ Input noise: 7.5nV/√Hz ■ Tested on 5V power supply
Description
The TSH310 is a very low-power, high-speed operational amplifier. A bandwidth of 120MHz is achieved while drawing only 400 µA of quiescent current. This low-power characteristic is particularly suitable for high-speed, battery- powered equipment requiring dynamic performance. The TSH310 is a single operator available in SO8 and the tiny SOT23-5 plastic package, saving board space as well as providing excellent thermal performances.
Applications
■ Battery-powered and high-speed systems ■ Communication & video test equipment ■ Portable medical instrumentation ■ ADC drivers Pin Connections (top view) Order Codes Note:OptimWattTM is an STMIcroelectronics registered trademark that applies to products with specific features that optimize energy efficiency. -VCC +VCC + - OUT -IN+IN SOT23-5 +VCC NC OUT+ -VCC NC -IN +IN SO8 NC -VCC +VCC + - OUT -IN+IN SOT23-5 +VCC NC OUT+ -VCC NC -IN +IN SO8 NC Part Number Temperature Range Package Conditioning Marking TSH310ILT -40°C to +85°C SOT23-5 Tape&Reel K304 TSH310ID SO-8 T ube TSH310I TSH310IDT SO-8 Tape&Reel TSH310I TSH310 400µA High-Speed Operational Amplifier
1 Absolute Maximum Ratings
Table 1: Key parameters and their absolute maximum ratings Symbol Parameter Value Unit VCC Supply Voltage 1 1) All voltages values are measured with respect to the ground pin. Vid Differential Input Voltage2 2) Differential voltage are non-inverting input terminal with respect to the inverting input terminal. +/-0.5 V Vin Input Voltage Range3 3) The magnitude of input and output voltage must never exceed V CC +0.3V. +/-2.5 V Toper Operating Free Air T emperature Range -40 to +85 °C Tstg Storage Temperature -65 to +150 °C Tj Maximum Junction Temperature 150 °C Rthja Thermal Resistance Junction to Ambient SOT23-5 SO8 250 150 °C/W Rthjc Thermal Resistance Junction to Case SOT23-5 SO8 °C/W Pmax Maximum Power Dissipation4 (@Ta=25°C) for Tj=150°C SOT23-5 SO8 4) Short-circuits can cause excessive heating. Destructive dissipation can result from short circuit on amplifiers. 500 830 mW ESD HBM: Human Body Model 5 (pins 1, 4, 5, 6, 7 and 8) 5) Human body model, 100pF discharged through a 1.5k Ω resistor into pMin of device. 2k V HBM: Human Body Model (pins 2 and 3) 0.5 kV MM: Machine Model 6 (pins 1, 4, 5, 6, 7 and 8) 6) This is a minimum Value. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into th e IC with no external series resistor (internal resistor < 5 Ω), into pin to pin of device. 200 V MM: Machine Model (pins 2 and 3) 60 V CDM: Charged Device Model (pins 1, 4, 5, 6, 7 and 8) 1.5 kV CDM: Charged Device Model (pins 2 and 3) 1.5 kV Latch-up Immunity 200 mA Table 2: Operating conditions Symbol Parameter Value Unit VCC Supply Voltage 1 1) Tested in full production at 5V (±2.5V) supply voltage. 4.5 to 5.5 V Vicm Common Mode Input Voltage -Vcc+1.5V, +Vcc-1.5V V
2 Electrical Characteristics
Table 3: Electrical characteristics for V CC = ±2.5Volts, Tamb = 25°C (unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit DC performance Vio Input Offset Voltage Offset Voltage between both inputs Tamb 1.7 6.5 mV Tmin. < Tamb < Tmax. 2.1 ∆Vio Vio drift vs. Temperature Tmin. < Tamb < Tmax. 4 µV/°C Iib+ Non Inverting Input Bias Current DC current necessary to bias the input + Tamb 3.1 12 µA Tmin. < Tamb < Tmax. 3.5 Iib- Inverting Input Bias Current DC current necessary to bias the input - Tamb 0.1 5 µA Tmin. < Tamb < Tmax. 0.3 CMR Common Mode Rejection Rati o 20 log (∆Vic/∆Vio) ∆Vic = ±1V -57 -61 dB Tmin. < Tamb < Tmax. -59 SVR Supply Voltage Rejection Ratio 20 log (∆Vcc/∆Vio) ∆Vcc= 3.5V to 5V -65 -82 dB Tmin. < Tamb < Tmax. -79 PSR Power Supply Rejection Ratio 20 log (∆Vcc/∆Vout) AV = +1, ∆Vcc=±100mV at 1kHz -50 dB Tmin. < Tamb < Tmax. 46 ICC Positive Supply Current DC consumption with no input signal No load 400 530 µA Dynamic performance and output characteristics ROL Transimpedance Output Voltage/Input Current Gain in open loop of a CFA. For a VFA, the analog of this feature is the Open Loop Gain (A VD) RL = 1kΩ,Vout = ±1V 0.6 1.45 M Ω Tmin. < Tamb < Tmax.
1.36 M Ω
-3dB Bandwidth Frequency where the gain is 3dB below the DC gain A V Note: Gain Bandwidth Product criterion is not applicable for Current-Feedback- Amplifiers Small Signal V out=20mVp-p RL = 1kΩ AV = +1, Rfb = 3kΩ AV = +2, Rfb = 3kΩ AV = +10, Rfb = 510Ω 230 120
26 MHz
Gain Flatness @ 0.1dB Band of frequency where the gain varia- tion does not exceed 0.1dB Small Signal Vout=20mVp-p AV = +2, RL = 1kΩ 25 SR Slew Rate Maximum output speed of sweep in large signal Vout = 2Vp-p, AV = +2, RL = 1kΩ 75 115 V/ µs VOH High Level Output Voltage RL = 1kΩ 1.55 1.65 V Tmin. < Tamb < Tmax. 1.58 VOL Low Level Output Voltage RL = 1kΩ -1.66 -1.55 V Tmin. < Tamb < Tmax. -1.60
Short-circuit Output current coming in the op-amp. See fig-8 for more details Output to GND 70 110 mA Tmin. < Tamb < Tmax. 100 Isource Output current coming out from the op- amp. See fig-11 for more details Output to GND 60 100 T min. < Tamb < Tmax. Noise and distortion eN Equivalent Input Noise Voltage see application note on page 13 F = 100kHz 7.5 nV/ √Hz iN Equivalent Input Noise Current (+) see application note on page 13 F = 100kHz 13 pA/ √Hz Equivalent Input Noise Current (-) see application note on page 13 F = 100kHz 6p A / √Hz SFDR Spurious Free Dynamic Range The highest harmonic of the output spectrum when injecting a filtered sine wave Vout = 2Vp-p, AV = +2, RL = 1kΩ F = 1MHz F = 10MHz -87 -55 dBc dBc Table 4: Closed-loop gain and feedback components VCC (V) Gain Rfb (Ω) -3dB Bw (MHz) 0.1dB Bw (MHz) ±2.5 +10 510 26 4 -10 510 23 4 +2 3k 120 6 -2 1.5k 80 10 +1 3k 210 5 -1 1.3k 120 60 Table 3: Electrical characteristics for V CC = ±2.5Volts, Tamb = 25°C (unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit
3 Evaluation Boards
An evaluation board kit optimized for high-speed operational amplifiers is available (order code: KITHSEVAL/STDL). The kit includes the following evaluation boards, as well as a CD-ROM containing datasheets, articles, application notes and a user manual: /c108 SOT23_SINGLE_HF BOARD: Board for the evaluation of a single high-speed op-amp in SOT23-5 package. /c108 SO8_SINGLE_HF: Board for the evaluation of a single high-speed op-amp in SO8 package. /c108 SO8_DUAL_HF: Board for the evaluation of a dual high-speed op-amp in SO8 package. /c108 SO8_S_MULTI: Board for the evaluation of a single high-speed op-amp in SO8 package in inverting and non-inverting configuration, dual and single supply. /c108 SO14_TRIPLE: Board for the evaluation of a triple high-speed op-amp in SO14 package with video application considerations. Board material: /c108 2 layers /c108 FR4 (εr=4.6) /c108 epoxy 1.6mm /c108 copper thickness: 35µm Figure 25: Evaluation kit for high-speed op-amps
TSH310 Power Supply Considerations
4 Power Supply Considerations
Correct power supply bypassing is very important for optimizing performance in high-frequency ranges. Bypass capacitors should be placed as close as possible to the IC pins to improve high-frequency bypassing. A capacitor greater than 1 µF is necessary to minimize the distortion. For better quality bypassing, a capacitor of 10nF can be added using the same implementation conditions. Bypass capacitors must be incorporated for both the negative and the positive supply. For example: on the SO8_SINGLE_HF board, these capacitors are C6, C7, C8, C9. Single power supply In the event that a single supply system is used, new bias ing is necessary to assume a positive output dynamic range between 0V and +V CC supply rails. Considering the values of V OH and VOL, the amplifier will provide an output dynamic from +0.9V to +4.1V on 1k Ω load. The amplifier must be biased with a mid-supply (nominally +V CC/2), in order to maintain the DC component of the signal at this value. Several options are possible to provide this bias supply, such as a virtual ground using an operational amplifier or a two-resistance divider (which is the cheapest solution). A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the non-inverting input of the amplifier. If we consider this bias current (55 µA max.) as the 1% of the current through the resistance divider to keep a stable mid-supply, two resistances of 470Ω can be used. The input provides a high pass filter with a break frequency below 10Hz which is necessary to remove the original 0 volt DC component of the input signal, and to fix it at +V CC/2. Figure 27 illustrates a 5V single power supply configuration for the SO8_SINGLE evaluation board (see Evaluation Boards on page 9). Figure 26: Circuit for power supply bypassing -VCC +VCC 10microF 10nF 10microF 10nF- -VCC +VCC 10microF 10nF 10microF 10nF-
Power Supply Considerations TSH310 A capacitor C G is added in the gain network to ensure a unity gain in low frequency to keep the right DC component at the ouput. C G contributes to a high-pass filter with R fb//RG and its value is calculated with a consideration of the cut-off frequency of this low-pass filter. Figure 27: Circuit for +5V single supply RG IN +5V Rfb 10µF + 1µF +5V 10nF Rin 1kΩ OUT 470Ω 470Ω 1kΩ + CG
5 Noise Measurements
The noise model is shown in Figure 28, where: /c108 eN: input voltage noise of the amplifier /c108 iNn: negative input current noise of the amplifier /c108 iNp: positive input current noise of the amplifier The thermal noise of a resistance R is: where ∆F is the specified bandwidth. On a 1Hz bandwidth the thermal noise is reduced to where k is the Boltzmann's constant, equal to 1,374.10-23J/°K. T is the temperature (°K). The output noise eNo is calculated using the Superposition Theorem. However eNo is not the simple sum of all noise sources, but rather the square root of the sum of the square of each noise source, as shown in Equation 1: Equation 1 Equation 2 Figure 28: Noise model output iN- iN+ HP3577 Input noise: 8nV/√Hz N3 eN output iN- iN+ HP3577 Input noise: 8nV/√Hz N3 eN 4kTR ∆F 4kTR eNo V1 2 V22 V32 V42 V52 V62+++++= eNo 2 eN2 g2 iNn 2 R22 iNp 2+×+× R32× g2× R2 4kTR 14 kTR 21 R2 4kTR 3×++×+=
The input noise of the instrumentation must be extracted from the measured noise value. The real output noise value of the driver is: Equation 3 The input noise is called the Equivalent Input Noise as it is not directly measured but is evaluated from the measurement of the output divided by the closed loop gain (eNo/g). After simplification of the fourth and the fifth term of Equation 2 we obtain: Equation 4 Measurement of the input voltage noise eN If we assume a short-circuit on the non-inverting input (R3=0), from Equation 4 we can derive: Equation 5 In order to easily extract the value of eN, the resistance R2 will be chosen to be as low as possible. In the other hand, the gain must be large enough: R3=0, gain: g=100 Measurement of the negative input current noise iNn To measure the negative input current noise iNn, we set R3=0 and use Equation 5 . This time the gain must be lower in order to decrease the thermal noise contribution: R3=0, gain: g=10 Measurement of the positive input current noise iNp To extract iNp from Equation 3, a resistance R3 is connected to the non-inverting input. The value of R3 must be chosen in order to keep its thermal noise contribution as low as possible against the iNp contribution: R3=100Ω, gain: g=10 eNo Measured() 2 instrumentation() 2–= eNo 2 eN2 g2 iNn 2 R22 iNp 2+×+× R32× g2× g 4kTR 21 R2 4kTR 3×+×+= eNo eN 2 g2 iNn 2 R22 g 4kTR 2×+×+×=
TSH310 Intermodulation Distortion Product
6 Intermodulation Distortion Product
The non-ideal output of the amplifier can be described by the following series: due to non-linearity in the input-output amplitude transfer, where the input is V in=Asinωt, C0 is the DC component, C1(Vin) is the fundamental and Cn is the amplitude of the harmonics of the output signal V out. A one-frequency (one-tone) input signal contributes to harmonic distortion. A two-tone input signal contributes to harmonic distortion and to the intermodulation product. The study of the intermodulation and distortion for a two-tone input signal is the first step in characterizing the driving capability of multi-tone input signals. In this case: then: From this expression, we can extract the distortion terms, and the intermodulation terms form a single sine wave: second-order intermodulation terms IM2 by the frequencies ( ω1-ω2) and ( ω1+ω2) with an amplitude of C2A 2 and third-order intermodulation terms IM3 by the frequencies (2 ω1-ω2), (2ω1+ω2), (− ω1+2ω2) and (ω1+2ω2) with an amplitude of (3/4)C3A 3. The measurement of the intermodulation product of the driver is achieved by using the driver as a mixer by a summing amplifier configuration (see Figure 29). In this way, the non-linearity problem of an external mixing device is avoided. Figure 29: Inverting summing amplifier (using evaluation board SO8_S_MULTI) Vout C 0 C1Vin C2V2 in …CnVn in++ += Vin A ω1tsin A ω2tsin+= Vout C0 C1 A ω1tsin A ω2tsin+() C2 A ω1tsin A ω2tsin+() 2… Cn A ω1tsin A ω2tsin+() n++ += R Rfb 1kΩ Vout R2Vin2 Vin1 R1 R Rfb 1kΩ Vout R2Vin2 Vin1 R1
The Bias of an Inverting Amplifier TSH310
7 The Bias of an Inverting Amplifier
A resistance is necessary to achieve a good input biasing, such as resistance R shown in Figure 30. The magnitude of this resistance is calculated by assuming the negative and positive input bias current. The aim is to compensate for the offset bias current, which could affect the input offset voltage and the output DC component. Assuming Ib-, Ib+, R in, Rfb and a zero volt output, the resistance R will be: Figure 30: Compensation of the input bias current R Rin Rfb× Rin R+ fb R Load Output Rfb RinIb- Ib+ Vcc+ Vcc- R Load Output Rfb RinIb- Ib+ Vcc+ Vcc-
8 Active Filtering
From the resistors R fb and R G we can directly calculate the gain of the filter in a classical non-inverting amplification configuration: We assume the following expressi on as the response of the system: The cut-off frequency is not gain-dependent and so becomes: The damping factor is calculated by the following expression: The higher the gain, the more sensitive the damping factor is. When the gain is higher than 1, it is preferable to use some very stable resistor and capacitor values. In the case of R1=R2=R: Due to a limited selection of values of capacitors in comparison with resistors, we can fix C1=C2=C, so that: Figure 31: Low-pass active filtering, Sallen-Key RG IN Rfb 1kΩ OUT R1 R2 RG IN Rfb 1kΩ OUT R1 R2 AV g1 Rfb Rg Tjω Vout jω Vin jω 12 ζ jω ωc ωc ωc R1R2C1C2 ζ 1 2---ωc C1R1 C1R2 C2R1 C1R1g–++()= ζ 2C2 C1 Rfb Rg 2C 1C2 ζ 2R2 R1 Rfb Rg 2R 1R2
9 Package Mechanical Data
DIM. mm. mils A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 2.60 3.00 102.3 118.1 E1 1.50 1.75 59.0 68.8 e. 9 5 3 7 . 4 e1 1.9 74.8 L 0.35 0.55 13.7 21.6 SOT23-5L MECHANICAL DATA
DIM. mm. inch A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ˚ (max.) ddd 0.1 0.04 SO-8 MECHANICAL DATA 0016023/C
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publicati on are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectro nics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Repubic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America Date Revision Description of Changes 01 Oct 2004 1 First release corresponding to Preliminary Data version of datasheet. December 2004 2 Release of mature product datasheet.