TSF10N60C

TSF10N60C THINKISEMI | Alldatasheet

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Technical content

Features

R DS(on) (Max 0.75 Ω )@V GS =10V Gate Charge (Typical 45nC) Improved dv/dt Capability High ruggedness 100% Avalanche Tested R DS(ON) = 0.75 ohm I D = 10.3A BV DSS = 600V 2. Drain 3. Source 1. Gate TSF10N60C Pb Free Plating Product TSF10N60C Pb 10.3A,600V Insulated N-Channel Type Power MOSFET General Description This N-channel enhancement mode field-effect power transistor using THINKI Semiconductor advanced planar stripe, DMOS technol- ogy intended for off-line switch mode power supply. Also, especially designed to minimize rds(on) and high rugged avalanche characteristics. The TO-220F pkg is well suited for adaptor power unit and small power inverter application. 1 2 3 TO-220F TSP10N60C TSF10N60C TSP10N60C TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 1/7Rev.05

Electrical Characteristics

( T C = 25 °C unless otherwise noted ) Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain-Source Breakdown Voltage V GS = 0V, I D = 250uA 600 - - V Δ BV DSS Δ T J Breakdown Voltage Temperature coefficient I D = 250uA, referenced to 25 °C -0 . 5 6 -V / ° C I DSS Drain-Source Leakage Current V DS =600V, V GS = 0V -- 1 u A V DS = 480V, T C = 125 °C -- 1 0 u A I GSS Gate-Source Leakage, Forward V GS = 30V, V DS = 0V - - 100 nA Gate-source Leakage, Reverse V GS = -30V, V DS = 0V - - -100 nA On Characteristics V GS(th) Gate Threshold Voltage V DS = V GS , I D = 250uA 2.0 - 4.0 V R DS(ON) Static Drain-Source On-state Resis- tance V GS =10 V, I D =5.15A - 0.61 0.75 Ω Dynamic Characteristics C iss Input Capacitance V GS =0 V, V DS =25V, f = 1MHz 805 1046 pFC oss Output Capacitance 155 202 C rss Reverse Transfer Capacitance 21 27 Dynamic Characteristics t d(on) Turn-on Delay Time V DD =300V, I D =10.3A, R G =25 Ω ※ see fig. 13. (Note 4, 5) 25 60 ns t r Rise Time 85 180 t d(off) Turn-off Delay Time 133 276 t f Fall Time 53 116 Q g Total Gate Charge V DS =480V, V GS =10V, I D =10.3A ※ see fig. 12. (Note 4, 5) 45 56 nCQ gs Gate-Source Charge Q gd Gate-Drain Charge(Miller Charge) 12.4 - Source-Drain Diode Ratings and Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Unit. I S Continuous Source Current Integral Reverse p-n Junction Diode in the MOSFET -- 1 0 . 3 * AI SM Pulsed Source Current - - 41.2* V SD Diode Forward Voltage I S =10.3A, V GS =0V - - 1.5 V t rr Reverse Recovery Time I S =10.3A, V GS =0V, dI F /dt=100A/us - 403 - ns Q rr Reverse Recovery Charge - 4.8 - uC NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L =14.2mH, I AS =10.3A, V DD = 50V, R G = 50 Ω, Starting T J = 25°C 3. I SD ≤ 10.3A, di/dt ≤ 300A/us, V DD ≤ BV DSS , Starting T J = 25°C 4. Pulse Test : Pulse Width ≤ 300us, Duty Cycle ≤ 2% 5. Essentially independent of operating temperature. TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 2/7Rev.05

*. Notes : 1. 250uss Pulse Test 2. T C = 25 O C V GS Top : 15.0 V 10.0 V 9.0 V 8.0 V 7.0 V Bottom : 5.5 V I D , Drain Current [A] V DS , Drain-Source Voltage [V] 0 5 10 15 20 25 30 35 40 500 1000 1500 2000 2500 3000 3500 4000 C iss gs gd ds =shorted) C oss ds gd C rss gd *. Notes : 1. V GS = 0V 2. f=1MHz C iss C oss C rss Capacitance [pF] V DS , Drain-Source Voltage [V] 150 o C *. Notes : 1. V GS = 0V 2. 250us Pulse Test o C I DR , Reverse Drain Current [A] V SD , Source-Drain voltage [V] 0 5 10 15 20 0.0 0.5 1.0 1.5 2.0 V GS = 20V V GS = 10V * Note : T J = 25 o C R DS(ON) Drain-Source On-Resistance [O ] I D , Drain Current [A] 23456789 1 0 150 o C o C -55 o C *. Notes : 1. V DS = 50V 2. 250us Pulse Test I D , Drain Current [A] V GS , Gate-Source Voltage [V] Fig 4. On State Current vs. Allowable Case Temperature Fig 5. Capacitance Characteristics ( Non-Repetitive ) Fig 1. On-State Characteristics Fig 2. Transfer Characteristics Fig 3. On Resistance Variation vs. Drain Current and Gate Voltage 0 5 10 15 20 25 30 35 40 45 50 V DS = 120V V GS , Gate-Source Voltage [V] V DS = 300V V DS = 480V *. Note : I D = 5.15 A Q G , Total Gate Charge [nC] Fig 6. Gate Charge Characteristics TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 3/7Rev.05

μ s Operation in This Area is Limited by R DS(on) *. Notes : 1. T C = 25 O C 2. T J = 150 O C 3. Single Pulse I D , Drain Current [A] V DS , Drain-Source Voltage [V] 25 50 75 100 125 150 T Case Temperature [ o I Drain Current [A] 100ms DC 10ms 1ms 100us Operation in This Area is Limited by R DS(on) *. Notes : 1. T C = 25 O C 2. T J = 150 O C 3. Single Pulse I D , Drain Current [A] V DS , Drain-Source Voltage [V] Fig 9. Maximum Safe Operating Area Fig 10. Maximum Safe Operating Area (TO-220F) Fig 9. Maximum Safe Operating Area Fig 11. Maximum Drain Current vs. Case Temperature. (TO220) 25 50 75 100 125 150 T Case Temperature [ o I Drain Current [A] Fig 12. Maximum Drain Current vs. Case Temperature. (TO220F) -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 *. Notes : 1. V GS = 10 V 2. I D = 5.15 A R DS(on) , (Normalized) Drain-Source On-Resistance T J , Junction Temperature [ o -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 *. Notes : 1. V GS = 0 V 2. I D = 250uA BV DSS , (Normalized) Drain-Source Breakdown Voltage T J , Junction Temperature [ o Fig 7. Breakdown Voltage Variation vs. Junction Temperature Fig 8. On-Resistance Variation vs. Junction Temperature TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 4/7Rev.05

t t *. Notes : 1. Z ?J C (t) = 0.79 O C/W Max. 2. Duty Factor, D=t 3. T JM - T C = P DM * Z ?J C (t) single pulse D=0.5 0.02 0.2 0.05 0.1 0.01 Z ?J C (t), Thermal Response t , Square W ave Pulse Duration [sec] Fig 13. Transient Thermal Response Curve(TO220) t t *. Notes : 1. Z ?J C (t) = 2.21 O C/W Max. 2. Duty Factor, D=t 3. T JM - T C = P DM * Z ?J C (t) single pulse D=0.5 0.02 0.2 0.05 0.1 0.01 Z ?J C (t), Thermal Response t , Square W ave Pulse Duration [sec] Fig 14. Transient Thermal Response Curve(TO220F) TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 5/7Rev.05

Fig 13. Switching Time Test Circuit & Waveforms Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms Fig. 12. Gate Charge Test Circuit & Waveforms 12V 200nF 50KO 300nF V GS 1mA Same Type as DUT DUT V DS V GS Charge Q g Q gs Q gd Pulse Generator 10V R G V DS R L V DD (0.5 rated V DS DUT V DS V in 90% 10% t d(on) t r t d(off) t f t on t off Time 10V V DS R G V DS (t) DUT BV DSS L I D V DD I D (t) I AS E AS L I AS BV DSS BV DSS - V DD t p TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 6/7Rev.05

V DS Driver R G Same Type as DUT V GS

• dv/dt controlled by R G S controlled by pulse period V DD L L I S I S Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms 10V V GS ( Driver ) I S ( DUT ) V DS ( DUT ) V DD Body Diode Forward Voltage Drop V f I FM , Body Diode Forward Current Body Diode Reverse Current I RM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width 10V V GS ( Driver ) I S ( DUT ) V DS ( DUT ) V DD Body Diode Forward Voltage Drop V f I FM , Body Diode Forward Current Body Diode Reverse Current I RM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width TSF10N60C © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 7/7Rev.05