TSB14AA1A TI | Alldatasheet
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3.3-V IEEE 1394-1995 Backplane PHY Logic Performs System Initialization Arbitration Functions. Encode And Decode Provides a Backplane 1394 Environment That Functions Included for Data-Strobe Bit Level Supports an Asynchronous Transfer Rate of Encoding. Incoming Data Resynchronized to or 100 Mbits/s Across Etches Local Clock. Single 3.3-V Supply Operation With 5-V Operates Over the Extended Temperature Tolerance on the Transceiver Receive Ranges of C to C (no suffix), C to Interface C suffix), and C to 105 C suffix) Allows Utilization of 3-State Drivers as Well Packaged in the Very Compact 48-Pin x x as Open-Collector Drivers mm PFB Package Software Compatible With the TSB14CO1APM (1) IEEE Std 1394a 2000, IEEE Standard for a High Enhanced Compatibility With the 1394 Cable Performance Serial Bus Amendment Link Layer. Compatible With 1394 1995 and (2) IEEE Std 1394 1995, IEEE Standard for a High Performance 1394a 2000 Link Layers; PHY/link Interface is Serial Bus 1394a Compliant (3) Implements technology covered by one or more patents of Supports Provisions of IEEE 1394 1995 Apple Computer, Inc. and ST Microelectronics. Extensive Testability and Debug Functions Added. Expanded Register Set Including Automatic Saving of ID and Priority for Last Node Winning Arbitration 100 MHz or MHz Oscillator Provides Transmit, Receive Data, and Link Layer Controller (LLC) Clocks The TSB14AA1A (TSB14AA1A refers to all three devices: TSB14AA1A, TSB14AA1AI, and TSB14AA1AT) is the second-generation 1394 backplane physical layer device. It is recommended for use in all new designs instead of the first generation TSB14C01A. It provides the physical layer functions needed to implement a single port node in a backplane based 1394 network. The TSB14AA1A provides two pins for transmitting, two for receiving, and two pins to externally control the transceivers for data and strobe. In addition to supporting open-collector drivers, the TSB14AA1A can also support 3-state (1) (high-impedance) drivers. The TSB14AA1A is not designed to drive the backplane directly; this function must be provided externally. The TSB14AA1A is designed to interface with a link-layer controller (LLC), such as the TSB12LV01B, TSB12LV32, TSB12LV21B, etc. The TSB14AA1A requires an external 98.304-MHz reference oscillator input for S100 asynchronous only operation or 49.152-MHz for S50 asynchronous only operation. Two clock select pins (CLK_SEL0, CLK_SEL1) select the speed mode for the TSB14AA1A. For S100 operation, the 98.304-MHz reference signal is internally divided to provide the 49.152-MHz system clock signals used to control transmission of the outbound encoded strobe and data information. The 49.152-MHz clock signal is also supplied to the associated LLC for synchronization of the two chips and is used for resynchronization of the received data. For S50 operation, a 49.152-MHz reference signal is used. This reference signal is internally divided to provide the 24.576-MHz system clock signals for S50 operations. During packet transmit, data bits to be transmitted are received from the LLC on two parallel paths and are latched internally in the TSB14AA1A in synchronization with the system clock. These bits are combined serially, encoded, and transmitted as the outbound data-strobe information stream. During transmit, the encoded data information is transmitted on TDATA, and the encoded strobe information is transmitted on TSTRB. (1) 3-State means a driver may drive high, low, or may be placed in a high-impedance state Please be aware that an important notice concerning availability, standard warranty, and use in critical
applications
sheet. PRODUCTION DATA information is current as of publication date. Copyright 2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
www.ti.com TSB14AA1A TSB14AA1AI TSB14AA1AT SLLA222 JUNE 2006 During packet reception, the data information is received on RDATA and strobe information is received on RSTRB. The received data and strobe information is decoded to recover the received clock signal and the serial data bits, which are resynchronized to the local system clock. The serial data bits are split into two parallel streams and sent to the associated LLC. The PHY-Link interface has been made compliant to IEEE 1394a 2000 including timing and transfer of register to the link-layer automatically after every 1394 bus reset. The TSB14AA1A is a 3.3 V device that provides LVCMOS level outputs. The TSB14AA1A is an asynchronous only device. NOTE: This product is for high-volume only. For a complete datasheet or more information contact support@ti.com. Submit Documentation Feedback
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TSB14AA1AIPFB Active Production TQFP (PFB) | 48 250 | JEDEC TRAY (10+1) Yes NIPDAU Level-2-260C-1 YEAR - TSB14AA1AI TSB14AA1AIPFB.A Active Production TQFP (PFB) | 48 250 | JEDEC TRAY (10+1) Yes NIPDAU Level-2-260C-1 YEAR 0 to 70 TSB14AA1AI TSB14AA1AIPFBG4.A Active Production TQFP (PFB) | 48 250 | JEDEC TRAY (10+1) Yes NIPDAU Level-2-260C-1 YEAR 0 to 70 TSB14AA1AI TSB14AA1APFB Active Production TQFP (PFB) | 48 250 | JEDEC TRAY (10+1) Yes NIPDAU Level-2-260C-1 YEAR 0 to 70 TSB14AA1A TSB14AA1APFB.A Active Production TQFP (PFB) | 48 250 | JEDEC TRAY (10+1) Yes NIPDAU Level-2-260C-1 YEAR 0 to 70 TSB14AA1A (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1
www.ti.com 23-May-2025 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TRAY L - Outer tray length without tabs KO - Outer tray height W - Outer tray width P1 - Tray unit pocket pitch CW - Measurement for tray edge (Y direction) to corner pocket center CL - Measurement for tray edge (X direction) to corner pocket center Text Chamfer on Tray corner indicates Pin 1 orientation of packed units. *All dimensions are nominal Device Package Name Package Type Pins SPQ Unit array matrix Max temperature (°C) L (mm) W (mm) (µm) (mm) CL (mm) CW (mm) TSB14AA1AIPFB PFB TQFP 48 250 10 x 25 150 315 135.9 7620 12.2 11.1 11.25 TSB14AA1APFB PFB TQFP 48 250 10 x 25 150 315 135.9 7620 12.2 11.1 11.25 Pack Materials-Page 1
www.ti.com PACKAGE OUTLINE C 48X 0.27 0.1744X 0.5 PIN 1 ID (0.13) TYP
0.05 MIN0 -7
4X 5.5 9.2
8.8 TYP
0.75 0.45 B7.2 6.8 NOTE 3 A 7.2 6.8 NOTE 3 0.25 GAGE PLANE
1.2 MAX
(1) PLASTIC QUAD FLATPACK TQFP - 1.2 mm max heightPFB0048A PLASTIC QUAD FLATPACK 4215157/A 03/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration MS-026. 13 24 3748
0.08 C A B
0.08 A 16 DETAIL A TYPICAL SCALE 1.900
www.ti.com EXAMPLE BOARD LAYOUT
0.05 MAX
0.05 MIN
(8.5) (8.5) 44X (0.5) 48X (1.35) 48X (0.25) (R0.05) TYP TQFP - 1.2 mm max heightPFB0048A PLASTIC QUAD FLATPACK 4215157/A 03/2024 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM SYMM 48 37 13 24 SEE DETAILS METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL
www.ti.com EXAMPLE STENCIL DESIGN 44X (0.5) 48X (1.35) 48X (0.25) (R0.05) TYP (8.5) (8.5) TQFP - 1.2 mm max heightPFB0048A PLASTIC QUAD FLATPACK 4215157/A 03/2024 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE SCALE:8X SYMM SYMM 48 37 13 24
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