TS4990 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 33
Technical content
Datasheet sections
- 1 Absolute maximum ratings and operating conditions
- 2 Typical application sc hematics
- 3 Electrical characteristics
- 4 Application information
- 4.1 BTL configuration principle
- 4.2 Gain in a typical application
- 4.3 Low and high frequency response
- 4.4 Power dissipation and efficiency
- 4.5 Decoupling of the circuit
- 4.6 Wake-up time (t
- 4.7 Standby time
- 4.8 Pop performance
- 4.9 Application example: differential input, BTL power amplifier
- 5 Package information
- 5.1 Flip-chip package information
- 5.2 MiniSO-8 package information
- 5.3 DFN8 package information
- 5.4 SO-8 package information
- 6 Ordering information
- 7 Revision history
Features
■ Operating range from VCC = 2.2 V to 5.5 V ■ 1.2 W output power at VCC = 5 V, THD = 1%, F = 1 kHz, with 8 Ω load ■ Ultra-low consumption in standby mode (10 nA) ■ 62 dB PSRR at 217 Hz in grounded mode ■ Near-zero pop and click ■ Ultra-low distortion (0.1%) ■ Unity gain stable ■ Available in 9-bump flip-chip, miniSO-8 and DFN8 packages
Applications
■ Mobile phones (cellular / cordless) ■ Laptop / notebook computers ■ PDAs ■ Portable audio devices
Description
The TS4990 is designed for demanding audio applications such as mobile phones to reduce the number of external components. This audio power amplifier is capable of delivering
1.2 W of continuous RMS output power into an
8 Ω load at 5 V. An externally controlled standby mode reduces the supply current to less than 10 nA. It also includes an internal thermal shutdown protection. The unity-gain stable amplifier can be configured by external gain setting resistors. STANDBY BYPASS VIN+ VIN– VOUT2 GND VCC VOUT1 TS4990IJT/TS4990EIJT - Flip-chip 9 bumps TS4990IQT - DFN8 TS4990IST - MiniSO-8 Vin- GND BYPASS VOUT2 VCCVin+ VOUT1 GND STBY Vin- GND BYPASS VOUT2 VCCVin+ VOUT1 GND STBY TS4990ID/TS4990IDT - SO-8 STBY BYPASS VIN+ VIN- VOUT1 V GND VOUT21 6 CC STBY BYPASS VIN+ VIN- VOUT1 V GND VOUT21 6 CC
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
- All voltage values are measured with respect to the ground pin.
- The magnitude of the input signal must never exceed V CC + 0.3 V / GND - 0.3 V.
- The device is protected in case of over tem perature by a thermal shutdown active at 150° C.
- Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
- Machine model: A 200 pF capacitor is c harged to the specified voltage, then discharged directly between two pins of the
while the other pins are floating. Table 2. Operating conditions
- This thermal resistance is reached with a 100 mm 2 copper heatsink surface.
- When mounted on a 4-layer PCB.
2 Typical application schematics
Figure 1. Typical application schematics Table 3. Component descriptions resistor also forms a high pass filter with Cin (Fc = 1 / (2 x Pi x Rin x Cin)). Cin Input coupling capacitor that blocks the DC voltage at the amplifier input terminal. Rfeed Feed back resistor that sets the closed loop gain in conjunction with Rin. Cs Supply bypass capacitor that provides power supply filtering. Cb Bypass pin capacitor that provides half supply filtering. frequency 1/ (2 x Pi x Rfeed x Cfeed)). AV Closed loop gain in BTL configuration = 2 x (Rfeed / Rin). information on page 29 for more information.
3 Electrical characteristics
Table 4. Electrical characteristics when V CC = +5 V, GND = 0 V, Tamb =2 5 ° C
- Standby mode is active when V STBY is tied to GND.
- All PSRR data limits are guarant eed by production sampling tests.
Table 5. Electrical characteristics when V CC = +3.3 V, GND = 0 V, Tamb = 25°C
- Standby mode is active when V STBY is tied to GND.
- All PSRR data limits are guarant eed by production sampling tests.
Table 6. Electrical characteristics when V CC = 2.6V, GND = 0V, Tamb = 25°C (unless
- Standby mode is active when V STBY is tied to GND.
- All PSRR data limits are guarant eed by production sampling tests.
4 Application information
4.1 BTL configuration principle
The TS4990 is a monolithic power amplifier with a BTL output type. BTL (bridge tied load) means that each end of the load is connected to two single-ended output amplifiers. Thus, we have: Single-ended output 1 = V out1 = Vout (V) Single-ended output 2 = Vout2 = -Vout (V) and Vout1 - Vout2 = 2Vout (V) The output power is: For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single-ended configuration.
4.2 Gain in a typical application
The typical application schematics are shown in Figure 1 on page 4. In the flat region (no Cin effect), the output voltage of the first stage is (in Volts): For the second stage: Vout2 = -Vout1 (V) The differential output voltage is (in Volts): The differential gain named gain (Gv) for more convenience is: Vout2 is in phase with Vin and Vout1 is phased 180° with Vin. This means that the positive terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1.
4.3 Low and high frequency response
In the low frequency region, Cin starts to have an effect. Cin forms with Rin a high-pass filter with a -3 dB cut-off frequency. FCL is in Hz. In the high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel with Rfeed. It forms a low-pass filter with a -3 dB cut-off frequency. FCH is in Hz. Pout 2Vout RMS () 2 RL Vout1 V– in() Rfeed Rin Vout2 Vout1– 2Vin Rfeed Rin Gv Vout2 Vout1– Vin Rfeed Rin FCL 2πRin Cin FCH 2πRfeed Cfeed
The graph in Figure 60 shows an example of Cin and Cfeed influence. Figure 60. Frequency response gain vs. C in and Cfeed
4.4 Power dissipation and efficiency
- Load voltage and current are sinusoidal (Vout and Iout).
- Supply voltage is a pure DC source (VCC). The load can be expressed as: and and Therefore, the average current delivered by the supply voltage is: The power delivered by the supply voltage is: 10 100 1000 10000 -25 -20 -15 -10 Rin = Rfeed = 22kΩ Tamb = 25°C Cfeed = 2.2nF Cfeed = 680pF Cfeed = 330pF Cin = 470nF Cin = 82nF Cin = 22nF Gain (dB) Frequency (Hz) Vout = VPEAK sinωt (V) Iout = Vout RL Pout = VPEAK 2 2RL ICCAVG = 2VPEAK πRL Psupply VCC ICCAVG (W)⋅=
Therefore, the power dissipated by each amplifier is: Pdiss = Psupply - Pout (W) and the maximum value is obtained when: and its value is: Note: This maximum value is only dependent on power supply voltage and load values. The efficiency is the ratio between the output power and the power supply: The maximum theoretical value is reached when VPEAK = VCC, so:
4.5 Decoupling of the circuit
Two capacitors are needed to correctly bypass the TS4990: a power supply bypass capacitor Cs and a bias voltage bypass capacitor Cb. Cs has particular influence on the THD+N in the high frequency region (above 7 kHz) and an indirect influence on power supply disturbances. With a value for Cs of 1 µF , you can expect THD+N levels similar to those shown in the datasheet. In the high frequency region, if Cs is lower than 1 µF , it increases THD+N and disturbances on the power supply rail are less filtered. On the other hand, if Cs is higher than 1 µF , those disturbances on the power supply rail are more filtered. Cb has an influence on THD+N at lower frequencies, but its function is critical to the final result of PSRR (with input grounded and in the lower frequency region). If Cb is lower than 1 µF , THD+N increases at lower frequencies and PSRR worsens. If Cb is higher than 1 µF , the benefit on THD+N at lower frequencies is small, but the benefit to PSRR is substantial. Note that Cin has a non-negligible effect on PSRR at lower frequencies. The lower the value of Cin, the higher the PSRR. Pdiss
22 V CC
π RL δPdiss δPout Pdiss max 2VCC π2RL η = Pout Psupply πVPEAK 4VCC π 4----- = 78.5%
4.6 Wake-up time (t WU)
or tWU and specified in the electrical characteristics tables with Cb =1µ F . Figure 61. Typical wake-up time vs. C b Due to process tolerances, the maximum value of wake-up time is shown in Figure 62. Figure 62. Maximum wake-up time vs. C b
4.7 Standby time
allows a quick discharge of Cb and Cin capacitors.
4.8 Pop performance
voltage bypass capacitor Cb. The size of Cin is dependent on the lower cut-off frequency and PSRR values requested. The size of Cb is dependent on THD+N and PSRR values requested at lower frequencies. must not reach the τin maximum value as indicated in Figure 63 below. Figure 63. τin max. versus bypass capacitor pop and click will be reduced to its lowest value.
4.9 Application example: differen tial input, BTL power amplifier
Figure 64. Differential input amplifier configuration frequency required. (FL is the lower frequency required).
and a -3 dB lower cut-off frequency of about 80 Hz. Table 7. Bill of materials for differential input amplifier application
5 Package information
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
5.1 Flip-chip package information
Figure 65. Flip-chip pinout (top view) Figure 66. Marking (top view)
5.2 MiniSO-8 package information
Figure 71. MiniSO-8 package mechanical drawing Table 8. MiniSO-8 package mechanical data
5.3 DFN8 package information
heatsink. This copper area can be electrically connected to pin7 or left floating. Figure 72. DFN8 3x3x0.90mm package mechanical drawing (pitch 0.5mm) Table 9. DFN8 3x3x0.90mm package mechanical data (pitch 0.5mm)
5.4 SO-8 package information
Figure 73. SO-8 package mechanical drawing Table 10. SO-8 package mechanical data
6 Ordering information
Table 11. Order codes
- Lead-free Flip-chip part number
- Lead-free daisy chain part number
7 Revision history
Table 12. Document revision history 4-Sep-2003 2 Update mechanical data. 1-Oct-2004 3 Order code for back coating on flip-chip. 2-Apr-2005 4 Typography error on page 1: Mini-SO-8 pin connection. May-2005 5 New marking for assembly code plant. 1-Jul-2005 6 Error on Table 4 on page 5. Parameters in wrong column. 14-Mar-2006 8 SO-8 package inserted in the datasheet. 21-Jul-2006 9 Update of Figure 66 on page 25. Disclaimer update. dimensions were as in manufacturer’s drawing). Reformatted package information. removed from Table 2, and added in Table 4, Table 5, and Table 6.