TS4900

TS4900 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

■ OPERATING FROM VCC = 2.5V to 5.5V ■ 0.7W OUTPUT POWER @ Vcc= 5V, THD=1%, f=1kHz, with an 8 Ω load ■ 0.3W OUTPUT POWER @ Vcc= 3.3V, THD=1%, f=1kHz, with an 8 Ω load ■ ULTRA LOW CONSUMPTION IN STANDBY MODE (10nA) ■ 75dB PSRR @ 217Hz from 5V to 2.6V ■ ULTRA LOW POP & CLICK ■ ULTRA LOW DISTORTION (0.1%) ■ UNITY GAIN STABLE ■ AVAILABLE IN MiniSO8 & SO8

DESCRIPTION

The TS4900 is an audio power amplifier designed to provide the best price to power ratio while pre- serving high audio quality. Available in MiniSO8 & SO8 package, it is capable of delivering up to 0.7W of continuous RMS ouput power into an 8 Ω load @ 5V. TS4900 is also exhibiting an outstanding 0.1% distortion level (THD) from a 5V supply for a Pout of 200mW RMS. An externally controlled standby mode control re- duces the supply current to less than 10nA. It also includes an internal thermal shutdown protection. The unity-gain stable amplifier can be configured by external gain setting resistors.

APPLICATIONS

■ Mobile Phones (Cellular / Cordless) ■ PDAs ■ Portable Audio Devices ORDER CODE S = MiniSO Package (MiniSO) only available in Tape & Reel (ST) D = Small Outline Package (SO) - also available in Tape & Reel (DT) PIN CONNECTIONS (top view) Part Number Temperature Range Package SD TS4900IS -40, +85°C • TS4900ID • Standby Bypass V+IN VIN- V2OUT GND VCC VOUT1 TYPICAL APPLICATION SCHEMATIC TS4900IST - MiniSO8 TS4900ID-TS4900IDT - SO8 Standby Bypass V+IN VIN- V2OUT GND VCC VOUT1 January 2002 TS4900 300mW at 3.3V SUPPLY AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE HIGH

Symbol Parameter Value Unit VCC Supply voltage 1) 6V Vi Input Voltage 2) G ND to VCC V Toper Operating Free Air Temperature Range -40 to + 85 °C Tstg Storage Temperature -65 to +150 °C Tj Maximum Junction Temperature 150 °C R thja Thermal Resistance Junction to Ambient 3) SO8 MiniSO8 175 215 °C/W Pd Power Dissipation Internally Limited4) ESD Human Body Model 2 kV ESD Machine Model 200 V Latch-up Latch-up Immunity Class A Lead Temperature (soldering, 10sec) 250 °C 1. All voltages values are measured with respect to the ground pin. 2. The magnitude of input signal must never exceed VCC + 0.3V / GND - 0.3V 3. Device is protected in case of over temperature by a thermal shutdown active @ 150°C. 4. Exceeding the power derating curves during a long period, will cause abnormal operation. Symbol Parameter Value Unit VCC Supply Voltage 2.5 to 5.5 V VICM Common Mode Input Voltage Range G ND to VCC - 1.5V V VSTB Standby Voltage Input : Device ON Device OFF G ND ≤ VSTB ≤ 0.5V VCC - 0.5V ≤ VSTB ≤ VCC V R L Load Resistor 4 - 32 Ω R thja Thermal Resistance Junction to Ambient 1) SO8 MiniSO8 150 190 °C/W 1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves)

ELECTRICAL CHARACTERISTICS

VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified) VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)3) Symbol Parameter Min. Typ. Max. Unit ICC Supply Current No input signal, no load 68m A ISTANDBY Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω 1. Standby mode is actived when Vstdby is tied to Vcc 10 1000 nA Voo Output Offset Voltage No input signal, RL = 8Ω 52 0m V Po Output Power THD = 1% Max, f = 1kHz, RL = 8Ω 0.7 W THD + N Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω 0.15 % PSRR Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz 75 dB Φ M Phase Margin at Unity Gain RL = 8Ω , CL = 500pF 70 Degrees GM Gain Margin RL = 8Ω , CL = 500pF 20 dB GBP Gain Bandwidth Product RL = 8Ω 2M H z Symbol Parameter Min. Typ. Max. Unit ICC Supply Current No input signal, no load 5.5 8 mA ISTANDBY Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω 1. Standby mode is actived when Vstdby is tied to Vcc 10 1000 nA Voo Output Offset Voltage No input signal, RL = 8Ω 52 0m V Po Output Power THD = 1% Max, f = 1kHz, RL = 8Ω 300 mW THD + N Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω 0.15 % PSRR Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz 3. All electrical values are made by correlation between 2.6V and 5V measurements 75 dB Φ M Phase Margin at Unity Gain RL = 8Ω , CL = 500pF 70 Degrees GM Gain Margin RL = 8Ω , CL = 500pF 20 dB GBP Gain Bandwidth Product RL = 8Ω 2M H z

VCC = 2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified) REMARKS 1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF. 2. The standby response time is about 1µs. Symbol Parameter Min. Typ. Max. Unit ICC Supply Current No input signal, no load 5.5 8 mA ISTANDBY Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω 1. Standby mode is actived when Vstdby is tied to Vcc 10 1000 nA Voo Output Offset Voltage No input signal, RL = 8Ω 52 0m V Po Output Power THD = 1% Max, f = 1kHz, RL = 8Ω 180 mW THD + N Total Harmonic Distortion + Noise Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω 0.15 % PSRR Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz 75 dB Φ M Phase Margin at Unity Gain RL = 8Ω , CL = 500pF 70 Degrees GM Gain Margin RL = 8Ω , CL = 500pF 20 dB GBP Gain Bandwidth Product RL = 8Ω 2M H z Components Functional Description Rin Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin)) Cin Input coupling capacitor which blocks the DC voltage at the amplifier input terminal Rfeed Feed back resistor which sets the closed loop gain in conjunction with Rin Cs Supply Bypass capacitor which provides power supply filtering Cb Bypass pin capacitor which provides half supply filtering Cfeed Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed)) Rstb Pull-up resistor which fixes the right supply level on the standby pin Gv Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)

Fig. 1 : Open Loop Frequency Response Fig. 3 : Open Loop Frequency Response Fig. 5 : Open Loop Frequency Response Fig. 2 : Open Loop Frequency Response Fig. 4 : Open Loop Frequency Response Fig. 6 : Open Loop Frequency Response 0.3 1 10 100 1000 10000 -40 -20 -220 -200 -180 -160 -140 -120 -100 -80 -60 -40 -20 Vcc = 5V RL = 8Ω Tamb = 25°C Gain (dB) Frequency (kHz) Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 -240 -220 -200 -180 -160 -140 -120 -100 -80 -60 -40 -20 Gain (dB) Frequency (kHz) Vcc = 33V RL = 8Ω Tamb = 25°C Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 -240 -220 -200 -180 -160 -140 -120 -100 -80 -60 -40 -20 Gain (dB) Frequency (kHz) Vcc = 2.6V RL = 8Ω Tamb = 25°C Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 -220 -200 -180 -160 -140 -120 -100 -80 -60 -40 -20 Gain (dB) Frequency (kHz) Vcc = 5V ZL = 8Ω + 560pF Tamb = 25°C Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 -240 -220 -200 -180 -160 -140 -120 -100 -80 -60 -40 -20 Gain (dB) Frequency (kHz) Vcc = 3.3V ZL = 8Ω + 560pF Tamb = 25°C Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 -240 -220 -200 -180 -160 -140 -120 -100 -80 -60 -40 -20 Gain (dB) Frequency (kHz) Vcc = 2.6V ZL = 8Ω + 560pF Tamb = 25°C Gain Phase Phase (Deg)

Fig. 7 : Open Loop Frequency Response Fig. 9 : Open Loop Frequency Response Fig. 8 : Open Loop Frequency Response 0.3 1 10 100 1000 10000 -40 -20 100 -220 -200 -180 -160 -140 -120 -100 -80 Gain (dB) Frequency (kHz) Vcc = 5V CL = 560pF Tamb = 25°C Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 100 -240 -220 -200 -180 -160 -140 -120 -100 -80 Gain (dB) Frequency (kHz) Vcc = 2.6V CL = 560pF Tamb = 25°C Gain Phase Phase (Deg) 0.3 1 10 100 1000 10000 -40 -20 100 -240 -220 -200 -180 -160 -140 -120 -100 -80 Gain (dB) Frequency (kHz) Vcc = 3.3V CL = 560pF Tamb = 25°C Gain Phase Phase (Deg)

Fig. 10 : Power Supply Rejection Ratio (PSRR) vs Power supply Fig. 12 : Power Supply Rejection Ratio (PSRR) vs Bypass Capacitor Fig. 14 : Power Supply Rejection Ratio (PSRR) vs Feedback Resistor Fig. 11 : Power Supply Rejection Ratio (PSRR) vs Feedback Capacitor Fig. 13 : Power Supply Rejection Ratio (PSRR) vs Input Capacitor 10 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 Vcc = 5V, 3.3V & 2.6V Cb = 1µF & 0.1µF Vripple = 200mVrms Rfeed = 22Ω Input = floating RL = 8Ω Tamb = 25°C PSRR (dB) Frequency (Hz) 10 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 Cb=100 µF Cb=10 µF Cb=47 µF Cb=1 µF Vcc = 5, 3.3 & 2.6V Rfeed = 22k Rin = 22k, Cin = 1µF Rg = 100Ω , RL = 8Ω Tamb = 25°C PSRR (dB) Frequency (Hz) 10 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 Rfeed=10kΩ Rfeed=22kΩ Rfeed=47kΩ Rfeed=110kΩ Cb = 1µF & 0.1µF Vripple = 200mVrms Input = floating RL = 8Ω Tamb = 25°C PSRR (dB) Frequency (Hz) 10 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 Cfeed=680pF Cfeed=330pF Cfeed=150pF Cfeed=0Vcc = 5, 3.3 & 2.6V Cb = 1µF & 0.1µF Rfeed = 22kΩ Vripple = 200mVrms Input = floating RL = 8Ω Tamb = 25°C PSRR (dB) Frequency (Hz) 10 100 1000 10000 100000 -60 -50 -40 -30 -20 -10 Rfeed = 22kΩ , Rin = 22k Cb = 1µF Rg = 100Ω , RL = 8Ω Tamb = 25°C Cin=22nF Cin=100nF Cin=220nF Cin=330nF Cin=1µF PSRR (dB) Frequency (Hz)

Fig. 15 : Pout @ THD + N = 1% vs Supply Voltage vs RL Fig. 17 : Power Dissipation vs Pout Fig. 19 : Power Dissipation vs Pout Fig. 16 : Pout @ THD + N = 10% vs Supply Voltage vs RL Fig. 18 : Power Dissipation vs Pout Fig. 20 : Power Derating Curves 0.0 0.2 0.4 0.6 0.8 1.0 4 Ω 8 Ω 16 Ω Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25οC 32 Ω Output power @ 1% THD + N (W) Vcc (V) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Vcc=5V f=1kHz THD+N<1% RL=16 Ω RL=8 Ω RL=4 Ω Power Dissipation (W) Output Power (W) 0.0 0.1 0.2 0.3 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 RL=16 Ω RL=8 Ω RL=4 Ω Vcc=2.6V f=1kHz THD+N<1% Power Dissipation (W) Output Power (W) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 32 Ω 16 Ω 8 Ω Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C 4 Ω Output power @ 10% THD + N (W) Vcc (V) 0.0 0.2 0.4 0.6 0.0 0.1 0.2 0.3 0.4 0.5 0.6 RL=16 Ω RL=8 Ω RL=4 Ω Vcc=3.3V f=1kHz THD+N<1% Power Dissipation (W) Output Power (W)

Fig. 21 : Output Power vs Load Resistance Fig. 23 : Clipping Voltage vs Supply Voltage Fig. 25 : Noise Floor Fig. 22 : Output Power vs Load Resistance Fig. 24 : Frequency response vs Cin & Cfeed 81 6 16 24 32 32 0.0 0.2 0.4 0.6 0.8 1.0 Vcc=4.5V Vcc=5V Vcc=2.5VVcc=3V Vcc=4V Vcc=3.5V THD+N=1% Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C Output power (W) Load Resistance () 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 4Ω High Side 8Ω High Side Tamb = 25°C 8Ω Low Side 4Ω Low Side Dropout Voltage (V) Supply Voltage (V) 100 1000 10000 100 Standby = ON Vcc = 2.5V to 5V Rin = Rfeed = 22kΩ Cb = Cin = 1µF Input Grounded BW < 22kHz Tamb = 25°C VOUT1 + VOUT2 Output Noise Voltage (V) Frequency (Hz) 8 1 62 43 2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 Vcc=2.5V Vcc=4.5V Vcc=4V Vcc=3.5V Vcc=3V Vcc=5V THD+N=10% Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C Output Power (W) Load Resistance () 10 100 1000 10000 -25 -20 -15 -10 Rin = Rfeed = 22kΩ Tamb = 25°C Cfeed = 2.2nF Cfeed = 680pF Cfeed = 330pF Cin = 470nF Cin = 82nF Cin = 22nF Gain (dB) Frequency (Hz)

Fig. 26 : THD + N vs Output Power Fig. 28 : THD + N vs Output Power Fig. 30 : THD + N vs Output Power Fig. 27 : THD + N vs Output Power Fig. 29 : THD + N vs Output Power Fig. 31 : THD + N vs Output Power 1E-3 0.01 0.1 1 0.1 Rl = 4Ω Vcc = 5V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.1 RL = 4Ω , Vcc = 3.3V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.1 RL = 4Ω , Vcc = 2.6V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.1 RL = 4Ω , Vcc = 5V Gv = 10 Cb = Cin = 1µF BW < 125kHz, Tamb = 25°C 20kHz 20Hz 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.1 RL = 4Ω , Vcc = 3.3V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.1 RL = 4Ω , Vcc = 2.6V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz 1kHz THD + N (%) Output Power (W)

Fig. 32 : THD + N vs Output Power Fig. 34 : THD + N vs Output Power Fig. 36 : THD + N vs Output Power Fig. 33 : THD + N vs Output Power Fig. 35 : THD + N vs Output Power Fig. 37 : THD + N vs Output Power 1E-3 0.01 0.1 1 0.1 RL = 8Ω Vcc = 5V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.1 RL = 8Ω , Vcc = 3.3V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.1 RL = 8Ω , Vcc = 2.6V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.1 RL = 8Ω Vcc = 5V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.1 RL = 8Ω , Vcc = 3.3V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.1 RL = 8Ω , Vcc = 2.6V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz 1kHz THD + N (%) Output Power (W)

Fig. 38 : THD + N vs Output Power Fig. 40 : THD + N vs Output Power Fig. 42 : THD + N vs Output Power Fig. 39 : THD + N vs Output Power Fig. 41 : THD + N vs Output Power Fig. 43 : THD + N vs Output Power 1E-3 0.01 0.1 1 0.01 0.1 RL = 16Ω , Vcc = 5V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.01 0.1 RL = 16Ω , Vcc = 3.3V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.01 0.1 RL = 16Ω Vcc = 2.6V Gv = 2 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz, 1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 1 0.01 0.1 RL = 16Ω , Vcc = 5V Gv = 10 Cb = Cin = 1 µF BW < 125kHz Tamb = 25 20kHz 20Hz1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.01 0.1 RL = 16Ω Vcc = 3.3V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz 20Hz1kHz THD + N (%) Output Power (W) 1E-3 0.01 0.1 0.01 0.1 RL = 16Ω Vcc = 2.6V Gv = 10 Cb = Cin = 1µF BW < 125kHz Tamb = 25°C 20kHz20Hz 1kHz THD + N (%) Output Power (W)

Fig. 44 : Signal to Noise Ratio vs Power Supply with Unweighted Filter (20Hz to 20kHz) Fig. 46 : Signal to Noise Ratio vs Power Supply with Weighted Filter type A Fig. 48 : Current Consumption vs Power Supply Voltage Fig. 45 : Signal to Noise Ratio Vs Power Supply with Unweighted Filter (20Hz to 20kHz) Fig. 47 : Signal to Noise Ratio vs Power Supply with Weighted Filter Type A Fig. 49 : Current Consumption vs Standby Voltage @ Vcc = 5V 100 RL=8 Ω RL=4 ΩRL=16 Ω Gv = 2 Cb = Cin = 1µF THD+N < 0.4% Tamb = 25°C SNR (dB) Vcc (V) 100 110 RL=8 Ω RL=4 ΩRL=16 Ω Gv = 2 Cb = Cin = 1µF THD+N < 0.4% Tamb = 25°C SNR (dB) Vcc (V) 012345 Vstandby = 0V Tamb = 25°C Icc (mA) Vcc (V) RL=16 Ω RL=4 Ω RL=8 Ω Gv = 10 Cb = Cin = 1µF THD+N < 0.7% Tamb = 25°C SNR (dB) Vcc (V) RL=16 Ω RL=4 Ω RL=8 Ω Gv = 10 Cb = Cin = 1µF THD+N < 0.7% Tamb = 25°C SNR (dB) Vcc (V) Vcc = 5V Tamb = 25°C Icc (mA) Vstandby (V)

Fig. 50 : Current Consumption vs Standby Voltage @ Vcc = 3.3V Fig. 51 : Current Consumption vs Standby Voltage @ Vcc = 2.6V Vcc = 3.3V Tamb = 25°C Icc (mA) Vstandby (V) Vcc = 2.6V Tamb = 25°C Icc (mA) Vstandby (V)

■ BTL Configuration Principle The TS4900 is a monolithic power amplifier with a BTL (Bridge Tied Load) output configuration. BTL means that each end of the load is connected to two single ended output amplifiers. Thus, we have: Single ended output 1 = Vout1 = Vout (V) Single ended output 2 = Vout2 = -Vout (V) And Vout1 - Vout2 = 2Vout (V) The output power is : For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single ended configuration. ■ Gain In Typical Application Schematic (cf. page 1) In flat region (no effect of Cin), the output voltage of the first stage is : For the second stage : Vout2 = -Vout1 (V) The differential output voltage is The differential gain named gain (Gv) for more convenient usage is : Remark : Vout2 is in phase with Vin and Vout1 is 180 phased with Vin. It means that the positive terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1. ■ Low and high frequency response In low frequency region, the effect of Cin starts. Cin with Rin forms a high pass filter with a -3dB cut off frequency In high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel with Rfeed. Its form a low pass filter with a -3dB cut off frequency ■ Power dissipation and efficiency Hypothesis :

• Voltage and current in the load are sinusoidal (Vout and Iout)
• Supply voltage is a pure DC source (Vcc) Regarding the load we have: and and Then, the average current delivered by the supply voltage is: The power delivered by the supply voltage is Psupply = Vcc Icc AVG (W) Then, the power dissipated by the amplifier is Pdiss = Psupply - Pout (W) and the maximum value is obtained when: and its value is: Remark : This maximum value is only depending on power supply voltage and load values. The efficiency is the ratio between the output )W( R )Vout2(Pout L RMS= Vout1 = Vin – Rfeed Vout2 Vout1 = 2Vin – Rfeed Gv = Vout2 Vout1– F CL = 1 FCH = 1 V OUT = VPEAK sinω t (V) IOUT = V OUT R L P OUT = V PEAK 2 2R L ICC AVG = 2V PEAK π R L P diss = 22 V c c π R L ∂Pdiss ∂P OUT )W( R Vcc2maxPdiss L π

power and the power supply The maximum theoretical value is reached when Vpeak = Vcc, so ■ Decoupling of the circuit Two capacitors are needed to bypass properly the TS4900, a power supply bypass capacitor Cs and a bias voltage bypass capacitor Cb. Cs has especially an influence on the THD+N in high frequency (above 7kHz) and indirectly on the power supply disturbances. With 100µF, you can expect similar THD+N performances like shown in the datasheet. If Cs is lower than 100µF, in high frequency increases, THD+N and disturbances on the power supply rail are less filtered. To the contrary, if Cs is higher than 100µF, those disturbances on the power supply rail are more filtered. Cb has an influence on THD+N in lower frequency, but its function is critical on the final result of PSRR with input grounded in lower frequency. If Cb is lower than 1µF, THD+N increase in lower frequency (see THD+N vs frequency curves) and the PSRR worsens up If Cb is higher than 1µF, the benefit on THD+N in lower frequency is small but the benefit on PSRR is substantial (see PSRR vs. Cb curve : fig.12). Note that Cin has a non-negligible effect on PSRR in lower frequency. Lower is its value, higher is the PSRR (see fig. 13). ■ Pop and Click performance Pop and Click performance is intimately linked with the size of the input capacitor Cin and the bias voltage bypass capacitor Cb. Size of Cin is due to the lower cut-off frequency and PSRR value requested. Size of Cb is due to THD+N and PSRR requested always in lower frequency. Moreover, Cb determines the speed that the amplifier turns ON. The slower the speed is, the softer the turn ON noise is. The charge time of Cb is directly proportional to the internal generator resistance 50kΩ . Then, the charge time constant for Cb is τb = 50kΩ xCb (s) As Cb is directly connected to the non-inverting input (pin 2 & 3) and if we want to minimize, in amplitude and duration, the output spike on Vout1 (pin 5), Cin must be charged faster than Cb. The charge time constant of Cin is τin = (Rin+Rfeed)xCin (s) Thus we have the relation τin << τb (s) The respect of this relation permits to minimize the pop and click noise. Remark : Minimize Cin and Cb has a benefit on pop and click phenomena but also on cost and size of the application. Example : your target for the -3dB cut off frequency is 100 Hz. With Rin=Rfeed=22 kΩ , Cin=72nF (in fact 82nF or 100nF). With Cb=1µF, if you choose the one of the latest two values of Cin, the pop and click phenomena at power supply ON or standby function ON/OFF will be very small 50 kΩ x1µF >> 44kΩ x100nF (50ms >> 4.4ms). Increasing Cin value increases the pop and click phenomena to an unpleasant sound at power supply ON and standby function ON/OFF. Why Cs is not important in pop and click consideration ? Hypothesis :

• Cs = 100µF
• Supply voltage = 5V
• Supply voltage internal resistor = 0.1Ω
• Supply current of the amplifier Icc = 6mA At power ON of the supply, the supply capacitor is charged through the internal power supply resistor. So, to reach 5V you need about five to ten times the charging time constant of Cs (τs = 0.1xCs (s)). Then, this time equal 50µs to 100µs << τb in the majority of application. η = P OUT 4V CC π 4----- = 78.5%

At power OFF of the supply, Cs is discharged by a constant current Icc. The discharge time from 5V to 0V of Cs is Now, we must consider the discharge time of Cb. At power OFF or standby ON, Cb is discharged by a 100kΩ resistor. So the discharge time is about τb Disch ≈ 3xCbx100kΩ (s). In the majority of application, Cb=1µF, then τb Disch≈300ms >> tdischCs. ■ How to use the PSRR curves (page 7) We have finished a design and we have chosen the components values :

• Rin=Rfeed=22kΩ, Cin=100nF, Cb=1µF Now, on fig. 13, we can see the PSRR (input grounded) vs frequency curves. At 217Hz we have a PSRR value of -36dB. In fact, we want a value of about -70dB. So, we need a gain of +34dB ! Now, on fig. 12 we can see the effect of Cb on the PSRR (input grounded) vs. frequency. With Cb=100µF, we can reach the -70dB value. The process to obtain the final curve (Cb=100µF, Cin=100nF, Rin=Rfeed=22kΩ ) is a simple transfer point by point on each frequency of the curve on fig. 13 to the curve on fig. 12. The measurement result is shown on figure A. Fig. A : PSRR changes with Cb ■ Remark on PSRR measurement conditions What is the PSRR ? The PSRR is the Power Supply Rejection Ratio. It's a kind of SVR in a determined frequency range. The PSRR of a device is the ratio between the power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output. How do we measure the PSRR ? Fig. B : PSRR measurement schematic ■ Measurement process:
• Fix the DC voltage supply (Vcc)
• Fix the AC sinusoidal ripple voltage (Vripple)
• No bypass capacitor Cs is used The PSRR value for each frequency is : Remark : The measurement of the RMS voltage is not a selective RMS measurement but a full range (2 Hz to 125 kHz) RMS measurement. This means we have: the effective RMS signal + the noise. tDischCs = 5Cs 10 100 1000 10000 100000 -70 -60 -50 -40 -30 Cin=100nF Cb=100 µF Cin=100nF Cb=1 µF Rfeed = 22k, Rin = 22k Rg = 100Ω , RL = 8Ω Tamb = 25°C PSRR (dB) Frequency (Hz) Vripple Vcc Rin Cin Rg

100 Ohms

+Bypass Standby Bias Vout1 Vout2 Av=-1 TS4900 Vs- Vs+ RL VccGND PSRR dB() = 20 x Log10 Rms V ripple()

8 PINS - PLASTIC MICROPACKAGE (SO)

Dim. Millimeters Inches A 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.020 c1 45° (typ.) D 4.8 5.0 0.189 0.197 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.150 0.157 L 0.4 1.27 0.016 0.050 M 0.6 0.024 S 8° (max.) b A s L C E D M 8 5 1 4 F

8 PINS - PLASTIC MICROPACKAGE (miniSO)

Dim. Millimeters Inches A 1.100 0.043 e 0.650 0.026 L1 0.950 0.037 k 0 d3 d6 d0 d3 d6 d ccc 0.100 0.004 0,25mm .010inch GAGEPLANE Cccc C PLANE SEATING EA D b e L k c PIN1IDENTIFICA TION Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com