High performance stereo headphone amplifier with capacitorless outputs and I²C bus interface
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 28
Technical content
Datasheet sections
- 1 Absolute maximum ratings and operating conditions
- 2 Typical application sc hematics
- 3 Electrical characteristics
- 3.1 Electrical characteristics tables
- 3.2 Electrical characteristic curves
- 4 Application information
- 4.1 Common-mode sense
- 4.2 I²C bus interface
- 4.2.1 I²C bus operation
- 4.2.2 Control registers
- 4.3 Wake-up and standby time definition
- 4.4 Decoupling considerations
- 4.5 Low frequency response
- 4.6 Low pass output filter
- 4.7 Single-ended input configuration
- 5 Package information
- 6 Ordering information
- 7 Revision history
Features
■ Power supply range: 2.9 V to 5.5 V ■ 107 dB of PSRR at 217 Hz ■ Fully differential inputs ■ I²C interface for volume control ■ Digital volume control range from -60 dB to +4 dB ■ 101 dB of SNR A-weighted ■ Independent right and left channel shutdown control ■ Low quiescent current: 4.8 mA typ. at 3.0 V ■ Low standby current: 2 µA max ■ Output-coupling capacitors removed ■ Flip-chip package 2.1 mm x 2.1 mm, 500 µm pitch, 16 bumps
Applications
■ Cellular phones ■ Notebook computers ■ CD/MP3 players
Description
The TS4601 is a stereo headphone driver dedicated to high audio performance and space- constrained applications. It is based on low power dissipation amplifier core technology. Special care was taken in the design of the amplification chain to achieve peerless PSRR (107 dB typ. at 217 Hz) and 101 dB of SNR. The TS4601 can drive 0.9 V rms output voltage into 16 Ω and 1.6 Vrms into 10 k Ω, whatever the power supply voltage, in the 2.9 V to 5.5 V range. An I²C interface offers volume control in 64 steps from -60 dB to +4 dB and multiple configuration modes for the device. The traditionally used output-coupling capacitors can be removed and a dedicated common-mode sense pin removes parasitic noise from the jack. The TS4601 is designed to be used with an output serial resistor. It ensures unconditional stability over a wide range of capacitive loads. The TS4601 is packaged in a tiny 16-bump flip- chip with a pitch of 500 µm and a 300 µm diameter ball size. TS4601EIJT - Flip-chip Balls are underneath Pinout (top view) C1 C2PVCC VCC GND PVSS CMS VOUTR VOUTLINL+ INR+ INL- INR- SCLSDASDZ 4321 A B C D C1 C2PVCC VCC GND PVSS CMS VOUTR VOUTLINL+ INR+ INL- INR- SCLSDASDZ 4321 A B C D Obsolete Product(s) - Obsolete Product(s)
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
- All voltage values are measur ed with respect to the ground pin.
- The device is protected in case of over te mperature by a thermal shutdown active @ 150° C.
- Exceeding the power derating curves during a long period may provoke abnormal operation.
- Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a
while the other pins are floating.
- Machine model: A 200 pF capacitor is charged to t he specified voltage, then discharged directly between
connected pin combinations while the other pins are floating. Table 2. Operating conditions
2 Typical application schematics
Figure 1. Typical application schematics for the TS4601 Table 3. Pin description for the TS4601 C1 VCC Analog supply voltage, connect to V battery. A4 PVCC Power supply voltage, connect to V battery. A2 C1 Capacitor terminal for internal negative supply generator. A1 C2 Capacitor terminal for internal negative supply generator. B2 PVSS Capacitor terminal for internal negative supply generator filtering. D1 VOUTR Right audio channel output signal. B1 VOUTL Left audio channel output signal. A3 GND Ground of the device. B4 INL- Left audio channel negative input signal. B3 INL+ Left audio channel positive input signal. C4 INR- Right audio channel negative input signal.
C3 INR+ Right audio channel positive input signal. D3 SDA I²C signal data. Up to V CC tolerant input. D2 SCL I²C clock signal. Up to V CC tolerant input. Table 4. Component description for the TS4601 recommended to minimize ΔC/ΔV when VCC=5 V . rating voltage is recommended to minimize ΔC/ΔV when VCC=5 V . rating voltage is recommended to minimize ΔC/ΔV when VCC = 5V. mandatory for operation of the TS4601. mandatory for operation of the TS4601. Table 3. Pin description for the TS4601 (continued)
3 Electrical characteristics
3.1 Electrical characteristics tables
Table 5. Electrical characteristics of the I²C interface Table 6. Electrical characteristics of the amplifier
- Guaranteed by design and parameter correlation.
- Dynamic measurements - 20*log(rms(V out)/rms(Vripple)). Vripple is an added sinus signal to VCC @ F = 217 Hz.
- Guaranteed by design and parameter correlation.
3.2 Electrical characteristic curves
Note: When the label “RC network” is present in a curve, it means that a 12 Ω + 1 nF low pass filter connected on outputs is used (refer to Figure 1: Typical application schematics for the TS4601 on page 4). Current consumption vs. power supply voltage see Figure 2 Standby current consumption vs. power supply voltage see Figure 3 and Figure 4 Maximum output power vs. power supply voltage see Figure 5 Maximum output power vs. power supply voltage see Figure 6 Maximum output voltage vs. power supply voltage see Figure 7 PSRR vs. frequency see Figure 8 to Figure 12 PSRR vs. gain setting see Figure 13 THD+N vs. output power see Figure 14 to Figure 25 THD+N vs. output voltage see Figure 26 THD+N vs. frequency see Figure 27 THD+N vs. frequency see Figure 28 to Figure 39 CMRR vs. frequency see Figure 40 and Figure 41 Crosstalk vs. frequency see Figure 42 to Figure 45 Common mode response vs. frequency see Figure 46 THD+N vs. input voltage. Line in mode 5 see Figure 47 Input impedance vs. frequency. Line in mode 5 see Figure 48 Gain vs. frequency see Figure 49 Obsolete Product(s) - Obsolete Product(s)
4 Application information
4.1 Common-mode sense
parasitic noise in the headphone and/or line-out. the TS4601 illustrates this connection.
4.2 I²C bus interface
controlling microcontroller MCU is the master device. The slave address of the TS4601 is 1100 000x (C0h). An SDZ pin is available to shut down the circuit from a master MCU. Table 7 summarizes the pin descriptions for the I²C bus interface.
4.2.1 I²C bus operation
control registers can be accessed. In write mode, only CR1 and CR2 can be addressed. Table 7. I²C bus interface pin descriptions Table 8. The first byte after the START message for addressing the device
To write in the control registers: In order to write data into the TS4601, after the “start” message, the MCU must:
- send byte with the I²C 7-bit slave address and with a low level for the R/W bit
- send the data (control register setting) All bytes are sent with MSB first. The transfer of written data ends with a “stop” message. When transmitting several data, the data can be written with no need to repeat the “start” message and addressing byte with the slave address. When writing several bytes, the data is transmitted as follows:
- CR1 CR2 CR2 CR2... this is an advantage for a fast increase/decrease of the volume control.
Figure 50. I²C write operations
- send byte with the I²C 7-bit slave address and with a high level for the R/W bit
- receive the data (control register value) All bytes are read with MSB first. The transfer of read data ends with the “stop” message. When transmitting several data, the data can be read with no need to repeat the “start” message and the byte with the slave address. In this case, the value of the control register is read repeatedly, CR0, CR1, CR2, CR3, CR4, CR0, CR1 etc.
Table 9. Control registers summary C R 0 S C _ L S C _ R T _ S H 00000 C R 1 - m o d e s O u t p u t m o d e s 00000 CR2 - volume control Mute_L Mute_R Volume control C R 3 00000000 C R 4 - i d e n t i f i c a t i o n 01000001 SDA S 11 00 0 0 A00 D 7 D7D0D1 A P Start condition SLAVE ADDRESS CONTROL REGISTERS R/W Acknowledge from Slave Acknowledge from Slave Stop condition D6 D6 D1 D0 D7 D6 D1 D0 CR1 CR2 CR2 A A SDA S 11 00 0 0 A00 D 7 D7D0D1 A P Start condition SLAVE ADDRESS CONTROL REGISTERS R/WR/W Acknowledge from Slave Acknowledge from Slave Stop condition D6 D6 D1 D0 D7 D6 D1 D0 CR1 CR2 CR2 A A Obsolete Product(s) - Obsolete Product(s)
Figure 51. I²C read operations
4.2.2 Control registers
- A master standby from an MCU using SDZ input, can set the TS4601 in master standby. The lowest current consumption (Istby=2 µA maximum) is achieved with a 0 V on SDZ. At 0.63 V, Istby is 20 µA maximum. Note that the SDZ input has a 600 kΩ +/-20% pull-down resistor. If VSDZ > 0 V, an additional current consumption has to be taken into consideration and provided by the MCU IO. This additional current is V SDZ/600kΩ (+/-20%). During master standby mode, amplifiers, power management and I2C part are disabled thus offering the most current-saving standby mode.
- The TS4601 can also be set to I²C standby by an I²C command. In this case the Istby is slightly higher and is Istby=75 µA maximum (including current consumption on SDA and SCL inputs). When the TS4601 is in Master standby or I²C standby mode (on one or both channels), the corresponding amplifier output is forced to ground through a 16 Ω resistor. In mode 5, in which amplifiers are inactive but the power management part is active, the amplifier outputs are in high impedance state to allow line in function. SDA S 11 00 0 1 A0 0 D7 D0 D7 D0 D7 A P Start condition SLAVE ADDRESS CONTROL REGISTERS R/W Acknowledge from Slave Acknowledge Stop condition D0 D7 D0 D7 D0 CR0 CR1 CR2 CR3 CR4 A A A A SDA S 11 00 0 1 AA0 0 D7 D0 D7 D0 D7 A P Start condition SLAVE ADDRESS CONTROL REGISTERS R/WR/W Acknowledge from Slave Acknowledge Stop condition D0 D7 D0 D7 D0 CR0 CR1 CR2 CR3 CR4 AA AA AA AA
Table 10. Output mode configuration - CR1
- SD: shutdown,I NR: audio input right, INL: audio input left, G: gain for channel R and channel L, ON: when a function is
Table 11. Volume control register - CR2
000000 Mute:
In the volume register, MUTE_L, and MUTE_R are dedicated bits to enable the mute independently from the channel. When MUTE_L, MUTE_R are set to VIH, the mute function is enabled on the corresponding channel. When MUTE_L, MUTE_R are set to VIL, the gain level is applied to the channel. Control register CR0 Amplifier output short-circuit detection: The outputs of the amplifier are protected against short-circuits that might occur accidentally during manipulation of the device. In the typical application, if a short-circuit arises on the jack plug, there is no detection due to the serial resistor present on the amplifier output, thus the output current threshold is not reached. To be active, the detection has to occur directly on the amplifier output with a signal modulation on the inputs of the TS4601. If a short-circuit is detected on one channel, a flag is raised in the I²C read register CR0.
- SC_L: equals 0 during normal operation, equals 1 when a short-circuit is detected on the left channel
- SC_R: equals 0 during normal operation, equals 1 when a short-circuit is detected on the right channel The corresponding channel output stage is then set to high impedance mode. An I²C read command allows the reading of the SC_L and SC_R flags but does not reset them. An I²C write command has to be sent to reset the flags to 0 and restore normal operation. When the TS4601 is in I²C standby mode, the SC_L and SC_R flags are in an undetermined state. Thermal shutdown protection: A thermal shutdown protection is implemented to protect the device from overheating. If the temperature rises above the thermal junction of 150°C, the device is put into standby mode and a flag is raised in the read register CR0.
- T_SH: equals 0 during normal operation, equals 1 when a thermal shutdown is detected. When the temperature decreases to safe levels, the circuit switches back to normal operation and the corresponding flag is cleared. Obsolete Product(s) - Obsolete Product(s)
4.3 Wake-up and standby time definition
The wake-up time of the TS4601 is guaranteed at 12 ms typical (refer to Section 3.1: bus, the wake-up start procedure is as follows: 1. The master sends a start bit 2. The master sends the address. 3. The slave (TS4601) answers by an acknowledge. 4. The master sends the output mode configuration (CR1). 5. If the TS4601 was in I 2C standby (mode 1, 6, 7), the wake-up starts on the falling edge of the eighth clock signal (SCL) corresponding to CR1 byte. 6. 12 ms after (de-pop sequence time), the TS4601 outputs are operational. The standby time is guaranteed as 10 µs typical (refer to Section 3.1: Electrical characteristics tables on page 6). However, as the TS4601 is de-activated with an I2C bus, the standby time operates as follows: 1. The master sends a start bit 2. The master sends the address. 3. The slave (TS4601) answers by an acknowledge. 4. The master sends the output mode configuration (CR1) and in this case it corresponds to mode 1, 6, 7. 5. The standby time starts on the falling edge of the eighth clock signal (SCL) corresponding to CR1 byte. 6. After 10 µs, the TS4601 is in standby mode.
4.4 Decoupling considerations
The TS4601 needs two decoupling capacitors for the positive power supply (battery) and two capacitors for normal operation of the internal negative supply (refer to Figure 1: Typical application schematics for the TS4601 on page 4). These capacitors must be placed as close as possible of the TS4601 to minimize parasitic inductance and resistance that have a negative impact on audio performance. Two decoupling capacitors (Cs) of 1 µF and low ESR are recommended for positive power supply decoupling. Packages like the 0402 or 0603 are also recommended because the placement close to TS4601 is easier. X5R dielectric for capacitor tolerance behavior and 10 V DC rating voltage for 5 V operation or 6.3 V DC rating operation for 3.6 V operation to take into consideration the ΔC/ΔV variation of this type of dielectric. Two decoupling capacitors (C12 and Css) of respectively 1 µF and 2.2 µF and low ESR are recommended for internal negative power supply decoupling. Packages like the 0402 or 0603 are also recommended because the placement close to TS4601 is easier. X5R dielectric for capacitor tolerance behavior and 10 V DC rating voltage for 5 V operation or 6.3 V DC rating operation for 3.6 V operation to take into consideration the ΔC/ΔV variation of this type of dielectric. Obsolete Product(s) - Obsolete Product(s)
4.5 Low frequency response
Input coupling capacitors Cin (see Figure 1: Typical application schematics for the TS4601 on page 4) are mandatory for TS4601 operation. Cin with Zin (see Section 3.1: Electrical characteristics tables on page 6) form a first order high pass filter and the -3 dB cut-off frequency is: Zin is the single-ended input impedance. Because Zin is independent from the gain setting, determining the appropriate C in is very simple. However, the tolerance of Zin (refer to Section 3.1: Electrical characteristics tables on page 6) must be taken into consideration for determining Cin. Therefore, for a given Fc, the value of Cin is given by the following equation: (With Cin in µF and Fc in Hz).
4.6 Low pass output filter
The TS4601 is designed to operate with a passive first order low pass filter (see Figure 1: Typical application schematics for the TS4601 on page 4). This low pass filter is mandatory to ensure stability of the TS4601. Rout must have a value of 12 Ω minimum and Cout a value of 0.8 nF minimum up to 100 nF maximum. Values of 12 Ω and 1 nF are a good start point for a design able to drive a classic headphone (16 Ω, 32 Ω, 60 Ω) and the line-in of any Hi-fi system or sound card. The cut-off frequency of this filter (12 Ω and 1 nF) is about 13 MHz and clearly above the audio band. Fc 3dB–() 1 2πZin Cin Cin· min Fc ⎛⎞ Cintyp 13.3 Fc ⎛⎞ Cinmax Fc ⎛⎞≤≤ Obsolete Product(s) - Obsolete Product(s)
4.7 Single-ended input configuration
same PSRR performance as in differential input configuration. Figure 52 shows an example. Figure 52. Typical application schemati cs for the TS4601 in single-ended input
5 Package information
Figure 53. TS4601 footprint recommendation Figure 54. Pinout
6 Ordering information
7 Revision history
Table 12. Order codes Table 13. Document revision history 15-Jan-2008 1 Initial release, preliminary information. 20-Feb-2008 2 Complete datasheet for re lease to market of the device.